Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Election/Restrictions
Applicant’s election of claims 15-34 without traverse in the reply filed on 11/25/2025 is acknowledged.
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claim 21 is rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
This is because claim 21 recites,
“patterning the semiconductor layer into a semiconductor capping structure with a ring shape from a top-down perspective having a first opening ”
Which the Examiner may interpret as having two distinct meanings. The first meaning is that the semiconductor layer is patterned into a semiconductor capping structure wherein the semiconductor capping structure is ring shaped from a top down perspective; wherein the ring shape has a first opening.
The second meaning is that the semiconductor layer is patterned into a semiconductor capping structure wherein the semiconductor capping structure is ring shaped; wherein the semiconductor capping structure has a first opening from a top down perspective.
These two meanings are distinct as the first meaning requires that the semiconductor capping structure is ring shaped as viewed from a top down perspective and the second meaning does not. Since Applicant’s FIG. 17A shows a ring structure from a top down view, the Examiner will interpret Claim 21 according to the first meaning.
Claims 22-27 are also rejected as being indefinite as they depend on claim 21. Appropriate correction is required.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
Claims 15, 16, 19 and 28-33 are rejected under 35 U.S.C. 102(a)(2) as being anticipated by Prechtl et al US 20240030217 A1. Prechtl et al will be referenced to as Prechtl henceforth. Notice that Prechtl has foreign priority to 07/21/2022.
Regarding Claim 15,
Prechtl teaches:
“A method of forming an integrated device, comprising ([0041], FIGs. 3A-3c, 2: embodiments may be combined unless they exclude each other.):
forming a barrier layer (AlGaN barrier layer 33, [0082], FIG. 3C) and a channel layer (channel layer 32, [0082], FIG. 3C) stacked over a substrate (substrate 30, [0082-0083], FIG. 3C: The substrate is not shown in FIG. 3C, but is necessarily below layer 13 in order to support the epitaxial formation of group III nitride base layers.), the barrier layer inducing a channel in the channel layer ([0082], FIG. 1B: The 2DEG is formed between 33 and 32.);
forming an isolation structure (isolation region 37, [0069], [0089], FIG. 2) surrounding and demarcating an active region in the barrier layer and the channel layer ([0090-0091], FIG. 2: 37 laterally surrounds gate regions which may be considered active regions. 37 has a depth from a first surface 14 to a depth greater than the depth of the heterojunction. Therefore, 37 demarcates a region in the barrier layer and the channel layer.);
forming a semiconductor capping structure overlying the active region (p doped Group III nitride layer 34, [0112], FIG. 3C), wherein the semiconductor capping structure induces formation of a depletion region in the channel (The purpose of the Schottky barrier diode is to reduce the 2DEG beneath it.);
forming a first source/drain electrode and a second source/drain electrode respectively on opposite sides of the semiconductor capping structure (source contacts 16, [0098], FIG. 3A); forming a first helping gate on a first portion of the semiconductor capping structure (Schottky contact metal layer 43, [0098], FIG. 3C) and localized over the isolation structure ([0090-0091]: 37 is made from crystal damage and/or implanted species of 34. 37 has a depth from a first surface 14 to a depth greater than the depth of the heterojunction. Therefore, 37 demarcates a region in the barrier layer and the channel layer. 43 is over 34 and therefore 37.); and
forming a first gate on a second portion of the semiconductor capping structure overlying the active region (metal layer 35, [0112], FIG. 3C). ”
Regarding Claim 16,
Prechtl teaches:
“The method of claim 15, wherein the first source/drain electrode, the second source/drain electrode, and the first helping gate are concurrently formed (openings 41, 42, [0098]:source contacts 16 and Schottky contacts 19 are formed together.).”
Regarding Claim 19,
Prechtl teaches:
“The method of claim 15, further comprising:
forming a second helping gate while forming the first helping gate ([0098], annotated FIG. 3C #1: The first helping and the second helping gate are both 19. 19 is formed at once.), where the second helping gate is formed on a third portion of the semiconductor capping structure over the isolation structure (annotated FIG. 3C #1), and where the first portion and the third portion are separated by the active region (annotated FIG. 3C #1).”
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Annotated FIG. 3C #1
Regarding Claim 28,
Prechtl teaches:
“A method of forming an integrated device, comprising ([0041], FIGs. 3A-3c, 2: embodiments may be combined unless they exclude each other.):
forming a heterojunction structure (AlGaN barrier layer 33, channel layer 32, [0082], FIG. 3C) over a substrate (substrate 30, [0082-0083], FIG. 3C: The substrate is not shown in FIG. 3C, but is necessarily below layer 13 in order to support the epitaxial formation of group III nitride base layers.);
forming an isolation structure (isolation region 37, [0089], FIG. 2) around a first region of the heterojunction structure ([0090-0091], FIGs. 2, 3C: 37 laterally surrounds gate regions which may be considered active regions);
forming a semiconductor capping layer over the heterojunction structure (p doped Group III nitride layer 34, [0112], FIG. 3C), wherein the semiconductor capping layer comprises a first portion overlying the heterojunction structure and a second portion overlying the isolation structure (annotated FIG. 3C #1: Both the first portion and second portion overlap the heterojunction structure and the isolation structure.);
forming a first source/drain electrode on a first side of the semiconductor capping layer (source contacts 16, [0098], FIG. 3A, annotated FIG. 3C #2: 16 is labeled 3 times in FIG. 3C. The middle and right 16s are the first and second source/drain electrodes respectively,);
forming a second source/drain electrode on a second side of the semiconductor capping layer (annotated FIG. 3C #2), wherein the second source/drain electrode is separated from the first source/drain electrode in a first direction by the semiconductor capping layer (annotated FIG. 3C #2: The first direction is horizontal. That is along the line A-A’.);
forming a first helping gate on the second portion of the semiconductor capping structure (Schottky contacts 19, [0098], FIG. 3C), wherein the first helping gate is spaced from the first region in a second direction transverse to the first direction (FIG. 3C: the second direction is perpendicular to the first direction. 43 is spaced vertically away from the gate region beneath it.);
and forming a first gate on the first portion of the semiconductor capping structure (metal layer 35, [0112], FIG. 3C: 35 is formed over 34.) and between the first source/drain electrode and the second source/drain electrode (FIG. 3C: 35 is between the middle and right 16s.), wherein the first gate is separated from the first helping gate in the first direction and the second direction (FIG. 3C). ”
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Annotated FIG. 3C #2
Regarding Claim 29,
Prechtl teaches:
“The method of claim 28, wherein the first portion of the semiconductor capping layer comprises a first segment having a length extending from a first side to a second side of the first region in the second direction (annotated FIG. 3C #3), and wherein the second portion of the semiconductor capping layer comprises a second segment having a length extending over the isolation structure and alongside the second side of the first region in the first direction (annotated FIG. 3C #3: The second portion and the second side are alongside the same side: 14.).”
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Annotated FIG. 3C #3
Regarding Claim 30,
Prechtl teaches:
“The method of claim 28, wherein the semiconductor capping layer further comprises a third portion overlying the isolation structure (annotated FIG. 3C #1) and spaced from the first portion by the first region (annotated FIG. 3C #1), and further comprising:
forming a second helping gate concurrent with forming the first helping gate (Schottky contacts 19, [0098]: all Schottky contacts 19 are formed together.), wherein the second helping gate is on the third portion of the semiconductor capping layer and is spaced from the first gate in the first direction and the second direction (annotated FIG. 3C #1).”
Regarding Claim 31,
Prechtl teaches:
“The method of claim 28, wherein the first source/drain electrode is coupled to the heterojunction structure and extends beneath the semiconductor capping layer (FIG. 3C). ”
Regarding Claim 32,
Prechtl teaches:
“The method of claim 28, wherein forming the heterojunction structure further comprises:
forming a channel layer over the substrate ([0082]: The substrate is not shown in FIG. 3C, but is necessarily below layer 13 in order to support the epitaxial formation of group III nitride base layers.); and
forming a barrier layer over the channel layer ([0082]: The substrate is not shown in FIG. 3C, but is necessarily below layer 13 in order to support the epitaxial formation of group III nitride base layers.). ”
Regarding Claim 33,
Prechtl teaches:
“The method of claim 32, wherein the channel layer is gallium nitride and wherein the barrier layer is aluminum gallium nitride ([0082]).”
Allowable Subject Matter
Claims 17-18, 20, 21-27 and 34are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
Regarding Claim 17,
Prechtl fails to explicitly teach :
“performing a planarization into the conductive layer to concurrently form the first source/drain electrode, the second source/drain electrode, and the first helping gate” In view of the rest of the limitations of claim 17.
Prechtl fails to explicitly teach the above limitation because it is not obvious to combine the invention of Prechtl with other art which teaches the above limitation. This is because Prechtl teaches that the completion of Schottky contacts and ohmic contacts are complete when the ohmic metal layer is deposited on the Schottky metal layer. Because these layers overlap, one of ordinary skill in the art would not consider it obvious to form the Schottky contacts and ohmic contacts in a planarization step.
The Examiner did not find prior art which one of ordinary skill in the art would use alone or would find obvious to combine with the invention of Prechtl to reach all of the limitations of the claim.
Regarding Claim 18, this claim depend on claim 17 and is objectionable for the same reasons.
Regarding Claim 20,
Pechtl fails to explicitly teach :
“depositing a dielectric over the semiconductor capping structure;
patterning the dielectric to form an opening exposing the semiconductor capping structure after the forming the first helping gate” In view of the rest of the limitations of claim 20.
Pechtl fails to explicitly teach the above limitation because it is not obvious to combine the invention of Pechtl with other art which teaches the above limitation. This is because the first helping gate is deposited over a dielectric which covers a gate metal which covers the semiconductor capping structure. Therefore, one of ordinary skill in the art would find it unreasonable to pattern the dielectric to form an opening exposing the semiconductor capping structure as the helping gate is formed over a dielectric layer and a gate metal covering the capping structure. Such a great deviation in the geometry of the device is non-obvious.
The Examiner did not find prior art which one of ordinary skill in the art would use alone or would find obvious to combine with the invention of Pechtl to reach all of the limitations of the claim.
Regarding Claim 21,
Prechtl fails to explicitly teach :
“removing portions of the barrier layer and the channel layer surrounding a first region of the channel layer, thereby forming a trench within the channel layer surrounding the first region;
filling the trench with an insulative material
” In view of the rest of the limitations of claim 21.
Prechtl fails to explicitly teach the above limitation because the limitation cannot be found in the prior art of record. Namely, Prechtl teaches the formation of an insulative region through crystal damage or the implantation of species.
The Examiner found similar art to Prechtl which covers several, but not all limitations, such as: US 20160043208 A1. US 20160043208 A1 fails to teach both a helping gate and a first gate localized on first and second portions of a semiconductor capping structure.
The Examiner did not find prior art which one of ordinary skill in the art would use alone or would find obvious to combine with the invention of Prechtl to reach all of the limitations of the claim.
Regarding Claims 22-27, these claims depend on claim 21 and are objectionable for the same reasons.
Regarding Claim 34,
Prechtl fails to explicitly teach :
“further comprising forming a first gate dielectric over the semiconductor capping layer after forming the first helping gate and before forming the first gate” In view of the rest of the limitations of claim 34.
Prechtl fails to explicitly teach the above limitation because it is not obvious to combine the invention of Prechtl with other art which teaches the above limitation because the helping gate of Prechtl is made after the first gate of Prechtl is formed.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to ALEXANDRE XAVIER RAMIREZ whose telephone number is (571)272-2715. The examiner can normally be reached Monday - Friday 8:30 AM to 6:00 PM.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, William Partridge can be reached at (571) 270-1402. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/ALEXANDRE X RAMIREZ/Examiner, Art Unit 2812
/William B Partridge/Supervisory Patent Examiner, Art Unit 2812