DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Response to Amendment
The Office acknowledges receipt on 2 June 2026 of Applicants’ amendments in which claims 16, 24, 28, and 31 are amended, claims 21, 23, 26, 27, 35, and 36 are cancelled, and claims 37-42 are newly added. The Office withdraws the drawing rejection, the section 112(a) rejection, and the section 112(b) rejection applied in the Office Communication dated 6 March 2026 in view of the amendments.
Response to Arguments
With the exception discussed below, Applicants’ arguments with respect to claim(s) 16, 24, and 28 have been considered but are moot because the new ground of rejection does not rely on any reference applied in the prior rejection of record for any teaching or matter specifically challenged in the argument.
Applicants argue in the second paragraph of page 10 and with respect to independent claim 16 that:
modifying Park to space field dispersion layers 110 from channel layer 10 and barrier layer 20 so as to read on claim 1 would preclude the ability of field dispersion layers 110 to provide holes to the interface of the barrier layer 20 and the channel layer 10. See paragraph 95 of Park. Providing holes is employed to reduce the electronic trap at the barrier/channel interface, thereby reducing the ON resistance of channel layer 10. Hence, spacing field dispersion layers 110 from channel layer 10 and barrier layer 20 frustrates an intended purpose of Park in contravention of MPEP 2143.01(V).
Claim 16 is rejected for obviousness over the combined teachings of Park, Guenard and Ning and recites, in relevant part, “the plurality of field plates are formed spaced from the drain electrode and the channel and barrier layers and are further formed closer to the drain electrode than to the gate electrode.” Arguments presented by applicant cannot take the place of evidence in the record. MPEP 2145(I); as this principle applies to the present circumstance, Applicants argue that Park’s paragraph [0095] explains why modifying Park to space field dispersion layers 110 from channel layer 10 and barrier layer 20 so as to read on claim 1 would preclude the ability of field dispersion layers 110 to provide holes to the interface of the barrier layer 20 and the channel layer 10. But Park’s paragraph [0095] provides no disclosure linking a spatial/positional modification of field plates (110) – relative to a drain electrode and channel and barrier layers – to an inability for the field plates (110) to provide holes to an interface of a barrier layer (20) and a channel layer (10). And because Applicants have identified no finding of fact to support their contention that a special/positional modification of the Park’s field plates (110) precludes them from providing holes to a recipient interface, it follows that the record lacks sufficient evidence to support an inference that such modification necessarily frustrates an intended purpose of Park.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 16 is/are rejected under 35 U.S.C. 103 as being unpatentable over Park et al. (US20230019799A1) in view of Guenard (WO2017182739A1), English translation enclosed, and Ning et al. (CN114975608A), English translation enclosed.
Regarding claim 16, Park teaches in Fig. 1A a method comprising:
forming a channel layer (10) and a barrier layer (20), wherein the channel layer (10) accommodates a two-dimensional carrier gas (2DCG) (2DEG) {[0063]};
forming a cap structure (33) overlying the channel (10) and barrier (20) layers {[0077]};
forming a source electrode (40) and a drain electrode (50) overlying the channel (10) and barrier layers (20), respectively on opposite sides of the cap structure (33) {[0061]};
forming a gate electrode (31) atop the cap structure (33) {[0071]}; and
forming a plurality of field plates (110) laterally between the gate electrode (31) and the drain electrode (50) {Fig. 3/4/5/6/7; [0099]}, wherein
the plurality of field plates (110) are spaced from the gate electrode (31) in a direction (horizontal) and are spaced from each other laterally in a line extending orthogonal to the direction (horizontal) {Fig. 3/4/5/6/7}.
Park does not teach the channel layer and the barrier layer stacked on the substrate.
In an analogous art, Guenard teaches in Figs. 6a and 6b and paragraph [0025] a substrate (not shown); and a channel layer (11) and a barrier layer (12) stacked on the substrate (not shown). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify Park’s method based on the teachings of Guenard – to include a substrate; with Park’s channel layer and barrier layer stacked on the substrate – so as to provide a reliable foundation for the mechanical support/stability, crystal quality, and/or lattice constant compatibility for the overlying layers of the semiconductor device. See, e.g., Guenard [0025]. Moreover, all the claimed elements (e.g., substrate, channel layer, barrier layer) were known in the prior art and one skilled in the art could have combined the elements as claimed by known methods (e.g., as taught by Guenard) with no change in their respective functions, and the combination yielding nothing more than predictable results to one of ordinary skill in the art. MPEP §2143(I)(A). Furthermore, [t]he selection of a known … [structure] based on its suitability for its intended use [is] … prima facie obviousness. MPEP §2144.07.
Park does not teach the plurality of field plates are formed spaced from the drain electrode and the channel and barrier layers and are further formed closer to the drain electrode than to the gate electrode.
In an analogous art, Ning teaches in Fig. 2 and paragraphs [0104-0106] a plurality of field plates (rightmost ones of 61, 62, and/or 63) are formed spaced from the drain electrode (73) and the channel and barrier layers (30, 40) and are further formed closer to the drain electrode (73) than to the gate electrode (71). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify Park’s method as modified by Guenard based on the teachings of Ning, as described above, because all the claimed elements (e.g., field plates, drain electrode, channel and barrier layers, gate electrode) were known in the prior art and one skilled in the art could have combined the elements as claimed by known methods (e.g., as taught by Ning) with no change in their respective functions, and the combination yielding nothing more than predictable results to one of ordinary skill in the art. MPEP §2143(I)(A). Furthermore, [t]he selection of a known … [structure] based on its suitability for its intended use [is] … prima facie obviousness. MPEP §2144.07.
Claim(s) 17 is/are rejected under 35 U.S.C. 103 as being unpatentable over Park in view of Guenard and Ning as applied to claim 16 above, and further in view of More et al. (US20190244864A1) and Abiko et al. (US20230420556A1).
Regarding claim 17, Park as modified by Guenard and Ning teaches the method according to claim 16, but Park does not teach further comprising:
depositing a dielectric layer overlying the cap structure;
performing a first etch into the dielectric layer to form an opening exposing the cap structure;
depositing a conductive layer overlying the dielectric layer and filling the opening; and
performing a second etch into the conductive layer to form the gate electrode and the plurality of field plates.
In an analogous art reasonably pertinent to a problem (of electrically connecting a conductive contact with a semiconductor through a cap structure) faced by the inventors, More teaches depositing a dielectric layer (88 and/or 100) overlying a cap structure (84) {Fig. 16B; [0043]}; performing a first etch into the dielectric layer (88 and/or 100) to form an opening (112) exposing the cap structure (84) {Fig. 16B; [0043]}; and depositing a conductive layer (118 or {114 and 118}) overlying the dielectric layer (88 and/or 100) and filling the opening (112) {Fig. 19B; [0051]}. It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify Park’s method as modified by Guenard and Ning based on the teachings of More – to include depositing a dielectric layer overlying the cap structure; performing a first etch into the dielectric layer to form an opening exposing the cap structure; and depositing a conductive layer overlying the dielectric layer and filling the opening – to electrically connect a conductive contact with a semiconductor through a cap structure through an opening formed in a dielectric material. More [0052].
Park as modified by Guenard, Ning, and More does not teach performing a second etch into the conductive layer to form the gate electrode and the plurality of field plates.
In an analogous art, Abiko teaches in claim 8 performing an etch into a conductive layer to form a gate electrode and a field plate. It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify Park’s method as modified by Guenard, Ning, and More based on the teachings of Abiko – to include performing a second etch into the conductive layer to form the gate electrode and a field plate – because the skilled artisan could have applied Abiko’s technique in the same way to the method taught by Park, Guenard, Ning, and More and the results (e.g., formation of a gate electrode and a field plate) would have been predictable to the skilled artisan. MPEP §2143(I)(C).
Park as modified by Guenard, Ning, More, and Abiko does not teach the etch into the conductive layer forms a plurality of field plates.
However, as discussed in the preceding paragraph, Abiko teaches the etch into the conductive layer forms one field plate and the mere duplication of parts [(e.g., field plates)] has no patentable significance unless a new and unexpected result is produced. MPEP 2144.04(VI)(B).
Claim(s) 18 is/are rejected under 35 U.S.C. 103 as being unpatentable over Park in view of Guenard, Ning, More, and Abiko as applied to claim 17 above, and further in view of Haynie et al. (US20230352580A1).
Regarding claim 18, Park as modified by Guenard, Ning, More, and Abiko teaches the method according to claim 17, and Park further teaches wherein the plurality of field plates (110) are between the gate electrode (31) and the drain electrode (50) {Fig. 3/4/5/6/7; [0099]}.
Park does not teach the second etch further forms a gate field plate (GFP) integrated with and protruding from a top of the gate electrode.
In an analogous art, Haynie teaches in Fig. 7 and paragraph [0058] an etch forms a gate field plate (GFP) (132) integrated with and protruding from a top of a gate electrode (130). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify Park’s method as modified by Guenard, Ning, More, and Abiko based on the teachings of Haynie – to include forming a gate field plate (GFP) integrated with and protruding from a top of the gate electrode – because the skilled artisan could have applied Haynie’s technique in the same way to the method taught by Park, Guenard, More, and Abiko and the results (e.g., formation of an integrated gate electrode and gate field plate) would have been predictable to the skilled artisan. MPEP §2143(I)(C). A consequence of this modification is that Park’s plurality of field plates are disposed between Park’s modified gate field plate (integrated with the gate electrode) and Park’s drain electrode.
Claim(s) 20 is/are rejected under 35 U.S.C. 103 as being unpatentable over Park in view of Guenard and Ning as applied to claim 16 above, and further in view of More and Wong (US20200350399A1).
Regarding claim 20, Park as modified by Guenard and Ning teaches the method according to claim 16, but Park does not teach further comprising:
depositing a dielectric layer overlying the cap structure; and
selectively implanting oxygen into the channel layer and the barrier layer through the dielectric layer to form an isolation structure surrounding and demarcating an active region individual to a semiconductor device defined by the source and drain electrodes and the gate electrode.
More teaches depositing a dielectric layer (88 and/or 100) overlying a cap structure (84) {Fig. 16B; [0043]}. It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify Park’s method as modified by Guenard and Ning based on the teachings of More – to include depositing a dielectric layer overlying the cap structure – because the skilled artisan could have applied More’s technique in the same way to the method taught by Park, Guenard, and Ning and the results (e.g., formation of a dielectric layer on a cap structure) would have been predictable to the skilled artisan. MPEP §2143(I)(C).
Park does not teach selectively implanting oxygen into the channel layer and the barrier layer through the dielectric layer to form an isolation structure surrounding and demarcating an active region individual to a semiconductor device defined by the source and drain electrodes and the gate electrode.
In an analogous art, Wong teaches in Fig. 8H and paragraph [0098] selectively implanting oxygen into a channel layer (104) and a barrier layer (106) through a dielectric layer (152) to form an isolation structure (128) surrounding and demarcating an active region (region of 105 between adjacent portions of 128 in Fig. 8H) individual to a semiconductor device (left semiconductor component/right semiconductor component) defined by source (118) and drain (120) electrodes and a gate electrode (112) {Fig. 1}. It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify Park’s method as modified by Guenard, Ning, and More based on the teachings of Wong – to include selectively implanting oxygen into the channel layer and the barrier layer through the dielectric layer to form an isolation structure surrounding and demarcating an active region individual to a semiconductor device defined by the source and drain electrodes and the gate electrode – to separate the source contact … and the drain contact … of the left and right [semiconductor] components. Wong [0098].
Claim(s) 22 is/are rejected under 35 U.S.C. 103 as being unpatentable over Park in view of Guenard, Ning, More, and Wong as applied to claim 20 above, and further in view of Le et al. (US20230369422A1).
Regarding claim 22, Park as modified by Guenard, Ning, More, and Wong teaches the method according to claim 20, but Park does not teach wherein a field plate of the plurality of field plates is formed overlying and straddling a sidewall boundary between the isolation structure and the barrier layer.
In an analogous art, Le teaches in Figs. 1 and 2 and paragraph [0007, 0008, 0044] a field plate (6) is formed overlying and straddling a sidewall boundary between an isolation structure (T) and a barrier layer (3). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify Park’s method as modified by Guenard, Ning, More, and Wong based on the teachings of Le – such that Park’s plurality of field plates comprises a field plate overlying and straddling a sidewall boundary between the isolation structure and the barrier layer – so: (1) the electric field strength [of the field plate] … can be dispersed at the boundary between the isolation area and the channel {Le [0008]}, (2) an electric field peak [of the field plate] … can be reduced {Le [0008]}, and/or (3) the electric field of the field plate may be more uniformly distributed throughout the active region. Moreover, all the claimed elements (e.g., isolation structure, barrier layer, field plate) were known in the prior art and one skilled in the art could have combined the elements as claimed by known methods (e.g., as taught by Le) with no change in their respective functions, and the combination yielding nothing more than predictable results to one of ordinary skill in the art. MPEP §2143(I)(A). Furthermore, [t]he selection of a known … [structure] based on its suitability for its intended use [is] … prima facie obviousness. MPEP §2144.07.
Claim(s) 38 is/are rejected under 35 U.S.C. 103 as being unpatentable over Park in view of Guenard and Ning as applied to claim 16 above, and further in view of Bao et al. (US20220109053A1).
Regarding claim 38, Park as modified by Guenard and Ning teaches the method according to claim 16, but Park does not teach expressly wherein the plurality of field plates are within 0.5 micrometers of the drain electrode.
In an analogous art, Bao teaches in paragraph [0036] that capacitance is inversely proportional to distance between conducting plates. It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify Park’s method as modified by Guenard and Ning based on the teachings of Bao for discovering an optimum or workable range of capacitance – such that the plurality of field plates are within 0.5 micrometers of the drain electrode – because where the general conditions of a claim are disclosed in the prior art, it is not inventive to discover the optimum or workable ranges by routine experimentation. MPEP §2144.05(II)(A).
Claim(s) 24, 25, 29, 30, and 39 is/are rejected under 35 U.S.C. 103 as being unpatentable over Park in view of Guenard, More, Du et al. (US20220293779A1), Ning, and Wong.
Regarding claim 24, Park teaches in Fig. 1A a method, comprising:
forming a channel layer (10) and a barrier layer (20), wherein the channel (10) and barrier layers (20) comprise group III-V semiconductor material (e.g., Al, Ga) {[0062-0064]};
forming a cap structure (33) overlying the channel (10) and barrier layers (20) {[0077]};
forming a gate electrode (31) and a field plate (110) {Fig. 3/4/5/6/7; [0071, 0099]}; and
forming a pair of source/drain electrodes (40, 50) overlying the channel (10) and barrier (20) layers, wherein the gate electrode (31) and the field plate (110) are between the pair of source/drain electrodes (40, 50) after the pair of source/drain electrodes (40, 50), the gate electrode (31), and the field plate (110) are formed {[0061]}.
Park does not teach the channel layer and the barrier layer are stacked on the substrate.
Guenard teaches in Figs. 6a and 6b and paragraph [0025] a substrate (not shown); and a channel layer (11) and a barrier layer (12) stacked on the substrate (not shown). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify Park’s method based on the teachings of Guenard – to include a substrate; with Park’s channel layer and barrier layer stacked on the substrate – so as to provide a reliable foundation for the mechanical support/stability, crystal quality, and/or lattice constant compatibility for the overlying layers of the semiconductor device. See, e.g., Guenard [0025]. Moreover, all the claimed elements (e.g., substrate, channel layer, barrier layer) were known in the prior art and one skilled in the art could have combined the elements as claimed by known methods (e.g., as taught by Guenard) with no change in their respective functions, and the combination yielding nothing more than predictable results to one of ordinary skill in the art. MPEP §2143(I)(A). Furthermore, [t]he selection of a known … [structure] based on its suitability for its intended use [is] … prima facie obviousness. MPEP §2144.07.
Park as modified by Guenard does not teach:
forming a dielectric layer overlying the cap structure and the channel and barrier layers;
performing a first etch into the dielectric layer to form an opening exposing the cap structure;
depositing a conductive layer overlying the dielectric layer and filling the opening.
More teaches forming a dielectric layer (88 and/or 100) overlying a cap structure (84) and channel (within fins 56; [0026]) and barrier layers (liner with no reference character; [0045]) {Fig. 16,A, 16B; [0043]}; performing a first etch into the dielectric layer (88 and/or 100) to form an opening (112) exposing the cap structure (84) {Fig. 16B; [0043]}; and depositing a conductive layer (118 or {114 and 118}) overlying the dielectric layer (88 and/or 100) and filling the opening (112) {Fig. 19B; [0051]}. It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify Park’s method as modified by Guenard based on the teachings of More – to include forming a dielectric layer overlying the cap structure and the channel and barrier layers; performing a first etch into the dielectric layer to form an opening exposing the cap structure; depositing a conductive layer overlying the dielectric layer and filling the opening – to electrically connect a conductive contact with a semiconductor through a cap structure through an opening formed in a dielectric material. More [0052].
Park as modified by Guenard and More does not teach performing a second etch into the conductive layer to concurrently form the gate electrode, a gate field plate, and the field plate from respective portions of the conductive layer, wherein the gate field plate protrudes from a top of the gate electrode.
In an analogous art, Du teaches in Figs. 7 and 8 and paragraph [0048] performing an etch into a conductive layer (122) to concurrently form a gate electrode (120), a gate field plate (121), and a field plate (150) from respective portions of the conductive layer (122), wherein the gate field plate (121) protrudes from a top of the gate electrode (120). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify Park’s method as modified by Guenard and More based on the teachings of Du, to achieve the above-described subject matter, – because the skilled artisan could have applied Du’s technique in the same way to the method taught by Park, Guenard, and More and the results (e.g., formation of a gate electrode, a gate field plate, and a field plate) would have been predictable to the skilled artisan. MPEP §2143(I)(C).
Park does not teach forming a via extending to a drain electrode of the pair of source/drain electrodes, wherein the field plate is between the via and the gate field plate, is spaced from the via and the drain electrode.
Ning teaches in Fig. 2 forming a via (via to 73) extending to a drain electrode (73) of a pair of source/drain electrodes (72, 73), wherein a field plate (62/63) is between the via (via to 73) and a gate field plate (71, 61), is spaced from the via (via to 73) and the drain electrode (73) {Ning teaches in paragraph [0123] field plates (61 may be connected to gate electrode (71) to become a gate field plate}. It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify Park’s method as modified by Guenard, More, and Du based on the teachings of Ning, to achieve the above-described subject matter, – because all the claimed elements (e.g., via, drain electrode, pair of source/drain electrodes, field plate, gate field plate, gate electrode) were known in the prior art and one skilled in the art could have combined the elements as claimed by known methods (e.g., as taught by Ning) with no change in their respective functions, and the combination yielding nothing more than predictable results to one of ordinary skill in the art. MPEP §2143(I)(A). Furthermore, [t]he selection of a known … [structure] based on its suitability for its intended use [is] … prima facie obviousness. MPEP §2144.07.
Park does not teach the field plate is closer to the via than to the gate electrode and to the gate field plate.
Wong teaches in Fig. 1 and paragraph [0031, 0047] a field plate (132) is closer to a via (170) than to a gate electrode (112) and to a gate field plate (portion of 112 overlapping 154). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify Park’s method as modified by Guenard, More, Du, and Ning based on the teachings of Wong, to achieve the above-described subject matter, – because all the claimed elements (e.g., field plate, via, gate electrode, gate field plate) were known in the prior art and one skilled in the art could have combined the elements as claimed by known methods (e.g., as taught by Wong) with no change in their respective functions, and the combination yielding nothing more than predictable results to one of ordinary skill in the art. MPEP §2143(I)(A). Furthermore, [t]he selection of a known … [structure] based on its suitability for its intended use [is] … prima facie obviousness. MPEP §2144.07.
Regarding claim 25, Park as modified by Guenard, More, Du, Ning, and Wong teaches the method according to claim 24, but Park does not teach wherein the gate electrode is formed filling the opening and overlying the dielectric layer.
More teaches a conductive layer (118 or {114 and 118}) is formed filling an opening (112) and overlying a dielectric layer (88 and/or 100 {Fig. 19B; [0051]}. It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify Park’s method as modified by Guenard, More, Du, Ning, and Wong based on the further teachings of More – such that the conductive layer is formed filling the opening and overlying the dielectric layer – to electrically connect a conductive contact with a semiconductor through a cap structure through an opening formed in a dielectric material. More [0052]. A consequence of this modification is that More’s conductive layer is subjected to the second etching operation identified in base claim 24 that transforms the conductive layer into a gate electrode.
Regarding claim 29, Park as modified by Guenard, More, Du, Ning, and Wong teaches the method according to claim 24, and Park further teaches a plurality of field plates (110) spaced from each other in a line {Fig. 3/4/5/6/7; [0099]}.
Park does not teach the second etch forms the field plate.
Du teaches in Figs. 7 and 8 and paragraph [0048] performing an etch into a conductive layer (122) to form a field plate (150). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify Park’s method as modified by Guenard, More, Du, Ning, and Wong based on the further teachings of Du – to include performing a second etch into the conductive layer to form a field plate – because the skilled artisan could have applied Du’s technique in the same way to the method taught by Park, Guenard, More Ning, and Wong and the results (e.g., formation of a field plate) would have been predictable to the skilled artisan. MPEP §2143(I)(C).
Park does not teach the etch into the conductive layer concurrently forms a plurality of field plates.
However, as discussed in the preceding paragraphs, Du teaches the etch into the conductive layer forms one field plate and the mere duplication of parts [(e.g., field plates)] has no patentable significance unless a new and unexpected result is produced. MPEP 2144.04(VI)(B). And forming the multiplicity of field plates concurrently saves manufacturing resources (e.g., time, manufacturing operations, materials, etc.).
Regarding claim 30, Park as modified by Guenard, More, Du, Ning, and Wong teaches the method according to claim 24, but Park does not teach wherein the pair of source/drain electrodes are formed inset into the dielectric layer before the first etch.
More teaches in Fig. 18B and paragraphs [0042, 0043] that a pair of source/drain electrodes (116) are formed inset into a dielectric layer (88 or 88, 100). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify Park’s method as modified by Guenard, More, Du, Ning, and Wong based on the further teachings of More – such that the pair of source/drain electrodes are formed inset into the dielectric layer – to electrically connect a conductive contact with source/drain electrodes through an opening formed in a dielectric material. More [0052]. Moreover, all the claimed elements (e.g., source/drain electrodes, dielectric layer) were known in the prior art and one skilled in the art could have combined the elements as claimed by known methods (e.g., as taught by More) with no change in their respective functions, and the combination yielding nothing more than predictable results to one of ordinary skill in the art. MPEP §2143(I)(A). Furthermore, [t]he selection of a known … [structure] based on its suitability for its intended use [is] … prima facie obviousness. MPEP §2144.07.
Park does not teach the pair of source/drain electrodes are formed before the first etch. However, the instant application does not identify a new or unexpected result occurring from the recited sequence of operations and the selection of any order of performing process steps is prima facie obvious in the absence of a new or unexpected result. MPEP 2144.04(IV)(C).
Regarding claim 39, Park as modified by Guenard, More, Du, Ning, and Wong teaches the method according to claim 24, but Park does not teach wherein a top surface of the field plate is level with a top surface of the gate electrode and a top surface of the gate field plate at completion of the second etch, and wherein the gate field plate and the field plate share a common height less than a height of the gate electrode.
Du teaches in Figs. 7 and 8 and paragraph [0048] a top surface of a field plate (150) is level with a top surface of a gate electrode (120) and a top surface of a gate field plate (121) at completion of the second etch, and wherein the gate field plate (121) and the field plate (150) share a common height (e.g., vertical height) less than a height (e.g., vertical height) of the gate electrode (120). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify Park’s method as modified by Guenard, More, Du, Ning, and Wong based on the further teachings of Du, as described above, because all the claimed elements (e.g., field plate, gate electrode, gate field plate) were known in the prior art and one skilled in the art could have combined the elements as claimed by known methods (e.g., as taught by Du) with no change in their respective functions, and the combination yielding nothing more than predictable results to one of ordinary skill in the art. MPEP §2143(I)(A). Furthermore, [t]he selection of a known … [structure] based on its suitability for its intended use [is] … prima facie obviousness. MPEP §2144.07.
Claim(s) 28 is/are rejected under 35 U.S.C. 103 as being unpatentable over Park in view of Guenard, More, Du, Ning, Wong as applied to claim 24 above, and further in view of Yang et al. (US20080073670A1) and Zhu et al. (US20240266406A1).
Regarding claim 28, Park as modified by Guenard, More, Du, Ning, and Wong teaches the method according to claim 24, but Park does not teach further comprising:
forming an additional field plate overlying the gate field plate and non-overlapping with the gate electrode in a top-layout view, wherein the field plate is closer to the drain electrode than to the additional field plate in the top-layout view; and
forming an interconnect structure overlying the additional field plate and electrically coupling the additional field plate to a source electrode of the pair of source/drain electrodes.
Ning teaches in Fig. 2 and paragraph [0106] forming an additional field plate (63) overlying a gate field plate (61, 71) and non-overlapping with a gate electrode (71) in a top-layout view. It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify Park’s method as modified by Guenard, More, Du, Ning, and Wong based on the further teachings of Ning, to achieve the above-identified subject matter, because all the claimed elements (e.g., additional field plate, gate field plate, gate electrode) were known in the prior art and one skilled in the art could have combined the elements as claimed by known methods (e.g., as taught by Ning) with no change in their respective functions, and the combination yielding nothing more than predictable results to one of ordinary skill in the art. MPEP §2143(I)(A). Furthermore, [t]he selection of a known … [structure] based on its suitability for its intended use [is] … prima facie obviousness. MPEP §2144.07.
Park does not teach the field plate is closer to the drain electrode than to the additional field plate in the top-layout view.
In an analogous art, Yang teaches in Fig. 2 and paragraphs [0037, 0038] an additional field plate (leftmost 80) non-overlapping with a gate electrode (50) in a top-layout view, wherein a field plate (rightmost 80) is closer to a drain electrode (40) than to the additional field plate (leftmost 80) in the top-layout view. It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify Park’s method as modified by Guenard, More, Du, Ning, and Wong based on the teachings of Yang, to achieve the above-identified subject matter, because all the claimed elements (e.g., additional field plate, gate field plate, gate electrode) were known in the prior art and one skilled in the art could have combined the elements as claimed by known methods (e.g., as taught by Yang) with no change in their respective functions, and the combination yielding nothing more than predictable results to one of ordinary skill in the art. MPEP §2143(I)(A). Furthermore, [t]he selection of a known … [structure] based on its suitability for its intended use [is] … prima facie obviousness. MPEP §2144.07.
Park does not teach forming an interconnect structure overlying the additional field plate and electrically coupling the additional field plate to a source electrode of the pair of source/drain electrodes.
In an analogous art, Zhu teaches in Fig. 1 and paragraph [0043] forming an interconnect structure (137, 140) overlying an additional field plate (135) and electrically coupling the additional field plate (135) to a source electrode (134) of a pair of source/drain electrodes (134, 136). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify Park’s method as modified by Guenard, More, Du, Ning, Wong, and Yang based on the teachings of Zhu, to achieve the above-identified subject matter, because all the claimed elements (e.g., additional field plate, source electrode, source/drain electrodes, interconnect structure) were known in the prior art and one skilled in the art could have combined the elements as claimed by known methods (e.g., as taught by Zhu) with no change in their respective functions, and the combination yielding nothing more than predictable results to one of ordinary skill in the art. MPEP §2143(I)(A).
Claim(s) 31 is/are rejected under 35 U.S.C. 103 as being unpatentable over Park in view of Guenard, More, Lien et al. (US20240178285A1), and Luo et al. (US20210104601A1).
Regarding claim 31, Park teaches in Fig. 1A a method, comprising:
forming a semiconductor heterojunction structure (10, 20) overlying and having a material composition (implicit) {[0004, 0063]; 10 and 20 form a semiconductor heterojunction structure};
forming a cap structure (33) overlying the semiconductor heterojunction structure (10, 20) {[0077]};
forming a source electrode (40) and a drain electrode (50) on opposite sides of the cap structure (33) , wherein the cap structure (33) is closer to the source electrode (40) than to the drain electrode (50) {[0061]}; and
form[ing] a gate electrode (31) overlying the cap structure (33) and a plurality of field plates (110) between the cap structure (33) and the drain electrode (50) {Fig. 3/4/5/6/7; [0070, 0099]}.
Park does not teach a semiconductor heterojunction structure overlying and spaced from a semiconductor substrate and having a material composition different than a material composition of the semiconductor substrate.
Guenard teaches in Figs. 6a and 6b and paragraph [0025] a semiconductor heterojunction structure (11, 12) overlying and spaced from a semiconductor substrate (not shown) and having a material composition (e.g., GaN, AlGaN) different than a material composition of the semiconductor substrate (e.g., sapphire). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify Park’s method based on the teachings of Guenard – to include a semiconductor heterojunction structure overlying and spaced from a semiconductor substrate and having a material composition different than a material composition of the semiconductor substrate – so as to provide a reliable foundation for the mechanical support/stability, crystal quality, and/or lattice constant compatibility for the overlying layers of the semiconductor device. See, e.g., Guenard [0025]. Moreover, all the claimed elements (e.g., substrate, semiconductor heterojunction structure) were known in the prior art and one skilled in the art could have combined the elements as claimed by known methods (e.g., as taught by Guenard) with no change in their respective functions, and the combination yielding nothing more than predictable results to one of ordinary skill in the art. MPEP §2143(I)(A). Furthermore, [t]he selection of a known … [structure] based on its suitability for its intended use [is] … prima facie obviousness. MPEP §2144.07.
Park as modified by Guenard does not teach:
depositing a dielectric layer overlying the cap structure;
the source electrode and drain electrode inset into the dielectric layer;
extending the dielectric layer over the source electrode and the drain electrode;
forming a conductive layer overlying the dielectric layer and the cap structure and having a protrusion extending to the cap structure.
More teaches depositing a dielectric layer (88 and/or 100) overlying a cap structure (116) {Fig. 19B}; a source electrode (leftmost 84) and a drain electrode (rightmost 84) inset into the dielectric layer (88 and/or 100); extending the dielectric layer (88 and/or 100) over the source electrode (leftmost 84) and the drain electrode (rightmost 84); forming a conductive layer (114 and/or 118) overlying the dielectric layer (88 and/or 100) and the cap structure (116) and having a protrusion extending to the cap structure (116). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify Park’s method as modified by Guenard based on the teachings of More – to include depositing a dielectric layer overlying the cap structure; the source electrode and drain electrode inset into the dielectric layer; extending the dielectric layer over the source electrode and the drain electrode; and forming a conductive layer overlying the dielectric layer and the cap structure and having a protrusion extending to the cap structure – to electrically connect a conductive contact with a semiconductor through a cap structure and through an opening formed in a dielectric material. More [0052].
Park as modified by Guenard and More does not teach patterning the conductive layer to concurrently form a gate electrode overlying the cap structure and a plurality of field plates between the cap structure and the drain electrode.
In an analogous art, Lien teaches in Figs. 1, 8, and 9 and paragraph [0042], patterning a conductive layer (140) to concurrently form a gate electrode (118) overlying a cap structure (109) and a field plate (119) between the cap structure (109) and a drain electrode (114). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify Park’s method as modified by Guenard and More based on the teachings of Lien – to include patterning the conductive layer to concurrently form a gate electrode overlying the cap structure and a field plate between the cap structure and the drain electrode – because the skilled artisan could have applied Lien’s technique in the same way to the method taught by Park, Guenard, and More and the results (e.g., formation of a gate electrode and a field plate) would have been predictable to the skilled artisan. MPEP §2143(I)(C).
Park as modified by Guenard, More, and Lien does not teach patterning the conductive layer to concurrently form a plurality of field plates.
However, as discussed in the preceding paragraph, Lien teaches patterning the conductive layer to form one field plate and the mere duplication of parts [(e.g., field plates)] has no patentable significance unless a new and unexpected result is produced. MPEP 2144.04(VI)(B). And forming the multiplicity of field plates concurrently saves manufacturing resources (e.g., time, manufacturing operations, materials, etc.).
Park does not teach in the embodiment illustrated by Fig. 1A the plurality of field plates are spaced from and capacitively coupled to the drain electrode and border the drain electrode in a top-layout view.
In an analogous art, Luo teaches in Figs. 8 and 9 and paragraph [0044] a plurality of field plates (7) are spaced from and capacitively coupled to a drain electrode (6) and border the drain electrode (6) in a top-layout view {Luo teaches in paragraph [0006] the drain (6) is an Ohmic contact (i.e., a conductor), in paragraphs [0044] the field plates (7) are doped semiconductor, and Figs. 8 and 9 the field plates (7) and drain (6) are coupled through a(n) space/air gap (i.e., a dielectric)}. A conductor and a doped semiconductor separated by space/air gap (e.g., a dielectric) are implicitly capacitively coupled.}. It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify Park’s method as modified by Guenard, More, and Lien based on the teachings of Luo, as described above, because all the claimed elements (e.g., field plates, capacitively coupled, drain electrode) were known in the prior art and one skilled in the art could have combined the elements as claimed by known methods (e.g., as taught by Luo) with no change in their respective functions, and the combination yielding nothing more than predictable results to one of ordinary skill in the art. MPEP §2143(I)(A). Furthermore, [t]he selection of a known … [structure] based on its suitability for its intended use [is] … prima facie obviousness. MPEP §2144.07.
Claim(s) 32 is/are rejected under 35 U.S.C. 103 as being unpatentable over Park in view of Guenard, More, Lien, and Luo as applied to claim 31 above, and further in view of You et al. (US20180233577A1).
Regarding claim 32, Park as modified by Guenard, More, Lien and Luo teaches the method according to claim 31, but Park does not teach further comprising: depositing an etch stop layer overlying the dielectric layer, wherein the conductive layer is formed overlying the etch stop layer with the protrusion extending through the etch stop layer.
You teaches in Figs. 8 and 13 and paragraphs [0025, 0027], depositing an etch stop layer (photoresist layer within 150) overlying a dielectric layer (150), wherein a conductive layer (160) is formed overlying the etch stop layer (photoresist layer within 150) with a protrusion (portion of 160 extending through 150) extending through the etch stop layer (photoresist layer within 150) {photoresist layer must necessarily be disposed in top portion of 150; otherwise, the top portion of 150 would be etched away by subsequent etching operation, which etching away is neither illustrated nor described by You}. It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify Park’s method as modified by Guenard, More, Lien, and Luo based on the teachings of You – to include depositing an etch stop layer overlying the dielectric layer, wherein the conductive layer is formed overlying the etch stop layer with the protrusion extending through the etch stop layer – to form a gate electrode. You [0035]. Moreover, all the claimed elements (e.g., etch stop layer, dielectric layer, conductive layer, protrusion) were known in the prior art and one skilled in the art could have combined the elements as claimed by known methods (e.g., as taught by You) with no change in their respective functions, and the combination yielding nothing more than predictable results to one of ordinary skill in the art. MPEP §2143(I)(A). Furthermore, [t]he selection of a known … [structure] based on its suitability for its intended use [is] … prima facie obviousness. MPEP §2144.07.
Claim(s) 33 is/are rejected under 35 U.S.C. 103 as being unpatentable over Park in view of Guenard, More, Lien, and Luo as applied to claim 31 above, and further in view of Yasumoto et al. (US20150076506A1).
Regarding claim 33, Park as modified by Guenard, More, Lien, and Luo teaches the method according to claim 31, and Park further teaches wherein the source electrode (40), the drain electrode (50), the cap structure (33), the gate electrode (31), and the plurality of field plates (110) are formed on the device region (region illustrated by Fig. 1A) {Figs. 1 and 3/4/5/6/7}.
Park as modified by Guenard, More, Lien, and Luo does not teach:
patterning the semiconductor heterojunction structure to form a trench demarcating a device region; and
filling the trench with dielectric material.
Yasumoto teaches in Figs. 1A and 1B and paragraph [0044] patterning a semiconductor heterojunction structure (12b, 12c) to form a trench (trench filled by 20) demarcating a device region (region of 12b and 12c surrounded by 20); and filling the trench (trench filled by 20) with dielectric material (silicon oxide). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify Park’s method as modified by Guenard, More, Lien, and Luo based on the teachings of Yasumoto – to include patterning the semiconductor heterojunction structure to form a trench demarcating a device region; and filling the trench with dielectric material – so as to isolate and insulate the device region from undesired electrical signals and define/demarcate the boundaries of the device region. Yasumoto [0043]. Moreover, all the claimed elements (e.g., semiconductor heterojunction structure, patterning, trench, device region) were known in the prior art and one skilled in the art could have combined the elements as claimed by known methods (e.g., as taught by Yasumoto) with no change in their respective functions, and the combination yielding nothing more than predictable results to one of ordinary skill in the art. MPEP §2143(I)(A). Furthermore, [t]he selection of a known … [structure] based on its suitability for its intended use [is] … prima facie obviousness. MPEP §2144.07.
Park as modified by Guenard, More, Lien, Luo, and Yasumoto does not teach the drain electrode, the cap structure, the gate electrode, and the plurality of field plates are formed on the device region after the filling. However, the instant application does not identify a new or unexpected result occurring from the recited sequence of operations and the selection of any order of performing process steps is prima facie obvious in the absence of a new or unexpected result. MPEP 2144.04(IV)(C).
Claim(s) 34 is/are rejected under 35 U.S.C. 103 as being unpatentable over Park in view of Guenard, More, Lien, and Luo as applied to claim 31 above, and further in view of Le.
Regarding claim 34, Park as modified by Guenard, More, Lien, and Luo teaches the method according to claim 31, and Park further teaches further comprising:
a device region (region illustrated by Fig. 1A) on which the source electrode (40), the drain electrode (50), the cap structure (33), the gate electrode (31), and the plurality of field plates (110) are formed {Figs. 1 and 3/4/5/6/7}.
Park does not teach forming an isolation structure extending into the semiconductor heterojunction structure and surrounding and demarcating a device region, wherein a field plate of the plurality of field plates is formed overlying and straddling a sidewall of the isolation structure that contacts the device region.
Le teaches in Figs. 1-4 and paragraph [0007, 0008, 0040, 0044] forming an isolation structure (T) extending into a semiconductor heterojunction structure (2’, 3’) and surrounding and demarcating a device region (A1), wherein a field plate (61/62) of field plates (61, 62) is formed overlying and straddling a sidewall of the isolation structure (T) that contacts the device region (A1). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify Park’s method as modified by Guenard, More, Lien, and Luo based on the teachings of Le – to include forming an isolation structure extending into the semiconductor heterojunction structure and surrounding and demarcating a device region, wherein a field plate of the plurality of field plates is formed overlying and straddling a sidewall of the isolation structure that contacts the device region – so: (1) the electric field strength [of the field plate] … can be dispersed at the boundary between the isolation area and the channel {Le [0008]}, (2) an electric field peak [of the field plate] … can be reduced {Le [0008]}, and/or (3) the electric field of the field plate may be more uniformly distributed throughout the active region. Moreover, all the claimed elements (e.g., isolation structure, active region, field plate) were known in the prior art and one skilled in the art could have combined the elements as claimed by known methods (e.g., as taught by Le) with no change in their respective functions, and the combination yielding nothing more than predictable results to one of ordinary skill in the art. MPEP §2143(I)(A). Furthermore, [t]he selection of a known … [structure] based on its suitability for its intended use [is] … prima facie obviousness. MPEP §2144.07.
Claim(s) 40 is/are rejected under 35 U.S.C. 103 as being unpatentable over Park in view of Guenard, More, Lien, and Luo as applied to claim 31 above, and further in view of Zhu.
Regarding claim 40, Park as modified by Guenard, More, Lien, and Luo teaches the method according to claim 31, and Park further teaches wherein the plurality of field plates (110) are closer to the drain electrode (50) than to an additional field plate (60) in the top-layout view {Fig. 1A}.
Park does not teach does not teach further comprising: forming a first via extending to the source electrode; and forming a first additional field plate overlying the gate electrode and the first via, wherein the first via extends from the first additional field plate to the source electrode, wherein the first additional field plate is closer to the drain electrode than the gate electrode is to the drain electrode in a top-layout view.
Zhu teaches in Fig. 1 and paragraphs [0043, 0051] forming a first via (137) extending to a source electrode (134); and forming a first additional field plate (135) overlying a gate electrode (128) and the first via (137), wherein the first via (137) extends from the first additional field plate (135) to the source electrode (134), wherein the first additional field plate (135) is closer to the drain electrode (136) than the gate electrode (128) is to the drain electrode (136) in a top-layout view. It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify Park’s method as modified by Guenard, More, Lien, and Luo based on the teachings of Zhu, as described above, because all the claimed elements (e.g., via, source electrode, field plate, gate electrode, drain electrode) were known in the prior art and one skilled in the art could have combined the elements as claimed by known methods (e.g., as taught by Zhu) with no change in their respective functions, and the combination yielding nothing more than predictable results to one of ordinary skill in the art. MPEP §2143(I)(A). Furthermore, [t]he selection of a known … [structure] based on its suitability for its intended use [is] … prima facie obviousness. MPEP §2144.07.
Claim(s) 41 is/are rejected under 35 U.S.C. 103 as being unpatentable over Park in view of Guenard, More, Lien, Luo, and Zhu as applied to claim 40 above, and further in view of Ning and Lin et al. (US20190280092A1).
Regarding claim 41, Park as modified by Guenard, More, Lien, Luo, and Zhu teaches the method according to claim 40, but Park does not teach further comprising: a second additional field plate over the gate electrode and under the first additional field plate, wherein the second additional field plate is closer to the drain electrode than the gate electrode is to the drain electrode in the top-layout view, and wherein the first additional field plate is closer to the drain electrode than the second additional field plate is to the drain electrode in the top-layout view; and a second via extending from the second additional field plate to the first additional field plate.
Ning teaches in Fig. 2 and paragraphs [0104-0106] a second additional field plate (61) over a gate electrode (71) and under a first additional field plate (62/63), wherein the second additional field plate (61) is closer to a drain electrode (73) than a gate electrode (71) is to the drain electrode (73) in a top-layout view, and wherein the first additional field plate (62/63) is closer to the drain electrode (73) than the second additional field plate (61) is to the drain electrode (73) in the top-layout view. It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify Park’s method as modified by Guenard, More, Lien, Luo, and Zhu based on the teachings of Ning, as described above, because all the claimed elements (e.g., second additional field plate, gate electrode, first additional field plate, drain electrode) were known in the prior art and one skilled in the art could have combined the elements as claimed by known methods (e.g., as taught by Ning) with no change in their respective functions, and the combination yielding nothing more than predictable results to one of ordinary skill in the art. MPEP §2143(I)(A). Furthermore, [t]he selection of a known … [structure] based on its suitability for its intended use [is] … prima facie obviousness. MPEP §2144.07.
Park does not teach a second via extending from the second additional field plate to the first additional field plate.
Lin teaches in Fig. 4 and paragraph [0027] a second via (1321) extending from a second additional field plate (1241) to a first additional field plate (134). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify Park’s method as modified by Guenard, More, Lien, Luo, Zhu, and Ning based on the teachings of Lin, as described above, because all the claimed elements (e.g., via, second additional field plate, first additional field plate) were known in the prior art and one skilled in the art could have combined the elements as claimed by known methods (e.g., as taught by Lin) with no change in their respective functions, and the combination yielding nothing more than predictable results to one of ordinary skill in the art. MPEP §2143(I)(A). Furthermore, [t]he selection of a known … [structure] based on its suitability for its intended use [is] … prima facie obviousness. MPEP §2144.07.
Allowable Subject Matter
Claims 37 and 42 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
The following is a statement of reasons for the indication of allowable subject matter:
Regarding claim 37, the prior art does not teach, suggest or motivate one having ordinary skill in the art to have the recited subject matter whereby “the plurality of field plates are capacitively coupled to the drain electrode while being completely surrounded by dielectric material.” Modifying the art applied in the rejection of base claim 16 to include this subject matter would render the primary reference (i.e., Park) unsatisfactory for its intended purpose because Park’s field plates would be surrounded by a dielectric layer and would no longer supply holes to a channel layer as described by Park in paragraph [0095].
Regarding independent claim 42, the prior art does not teach, suggest or motivate one having ordinary skill in the art to have the recited subject matter whereby “the plurality of field plates are metal.” Modifying the art applied in the rejection of base claim 42 to include this subject matter would render the primary reference (i.e., Park) unsatisfactory for its intended purpose because Park’s field plates would be modified from a semiconductor to a metal and would no longer supply holes to a channel layer as described by Park in paragraph [0095].
Citation of Pertinent Prior Art
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure.
Jung et al. (US20240120386A1) teaches a power semiconductor device and a manufacturing method thereof and, more particularly, a power semiconductor device and a manufacturing method thereof seeking to capture electrons trapped on one side of a transistor during transistor operation, prevent current collapse effects, and improve reliability consequently by forming or including one or more hole injection regions in a separation space between a gate electrode and a drain electrode. But Jung does not teach the subject matter of claims 37 and 42.
Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
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/D.W.W./Examiner, Art Unit 2891
/MATTHEW C LANDAU/Supervisory Patent Examiner, Art Unit 2891
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