Prosecution Insights
Last updated: April 19, 2026
Application No. 18/351,877

SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF

Non-Final OA §102§103§112
Filed
Jul 13, 2023
Examiner
DIAZ, JOSE R
Art Unit
2815
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Taiwan Semiconductor Manufacturing Company Ltd.
OA Round
1 (Non-Final)
87%
Grant Probability
Favorable
1-2
OA Rounds
2y 6m
To Grant
94%
With Interview

Examiner Intelligence

Grants 87% — above average
87%
Career Allow Rate
799 granted / 922 resolved
+18.7% vs TC avg
Moderate +8% lift
Without
With
+7.5%
Interview Lift
resolved cases with interview
Typical timeline
2y 6m
Avg Prosecution
26 currently pending
Career history
948
Total Applications
across all art units

Statute-Specific Performance

§101
0.2%
-39.8% vs TC avg
§103
39.3%
-0.7% vs TC avg
§102
36.3%
-3.7% vs TC avg
§112
7.8%
-32.2% vs TC avg
Black line = Tech Center average estimate • Based on career data from 922 resolved cases

Office Action

§102 §103 §112
Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Claim Rejections - 35 USC § 112 The following is a quotation of the first paragraph of 35 U.S.C. 112(a): (a) IN GENERAL.—The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor or joint inventor of carrying out the invention. The following is a quotation of the first paragraph of pre-AIA 35 U.S.C. 112: The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor of carrying out his invention. Claims 1-8 and 17-28 are rejected under 35 U.S.C. 112(a) or 35 U.S.C. 112 (pre-AIA ), first paragraph, as failing to comply with the written description requirement. The claim(s) contains subject matter which was not described in the specification in such a way as to reasonably convey to one skilled in the relevant art that the inventor or a joint inventor, or for applications subject to pre-AIA 35 U.S.C. 112, the inventor(s), at the time the application was filed, had possession of the claimed invention. In this case, it is unclear whether the term “density” and its variances, “varying density” and “density level”, refers to: the density of a material (e.g. atoms) within the electrode [Applicant’s Specification, paragraph 0081], “microstructure changes in the form of desired roughness, grain size, crystal alignment” [Applicant’s Specification, paragraph 0057] or to “integration density of components” [Applicant’s Specification, paragraph 0002]. Clarification is required. Claim Rejections - 35 USC § 102 The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. As far as understood, claim 1 is rejected under 35 U.S.C. 102(a)(1) as being anticipated by Shen et al. (US 2021/0376058). Regarding claim 1, Shen discloses a fabrication method, comprising: forming, above a substrate (200) [Figure 3], a first electrode (262) having a varying density (amount of titanium) that increases from a first density level (TiN) at a bottom surface (262-1) of the first electrode (262) to a second density level (262-2: Ti) that is higher than (amount of titanium, more conductive) the first density level (TiN) at a top surface (262-2/262-3) of the first electrode (262) [Fig. 4 and paragraphs 0020-0022]; forming a high-K (HK) dielectric layer (264) over the first electrode [Fig. 5 and paragraph 0024]; and forming a second electrode (266) over the HK dielectric layer having a varying density (amount of titanium) that increases from a third density level (TiN) at a bottom surface (266-1) of the second electrode (266) that bonds to the HK dielectric layer (264) to a fourth density level (266-2: Ti) that is higher than (amount of titanium, more conductive) the third density level (TiN) at a top surface (266-2/266-3) of the second electrode (266) [Fig. 6 and paragraphs 0025-0027]. Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claim 4 is rejected under 35 U.S.C. 103 as being unpatentable over Shen et al. (US 2021/0376058). Regarding claim 4, Shen discloses wherein forming the first electrode and the second electrode comprises depositing a first Titanium nitride (TiN) electrode and a second TiN electrode via plasma-based physical vapor deposition (PVD) techniques [paragraphs 0020-0021]. In regards to the limitation about “using a power source to cause magnetron sputtering”, Official Notice is taken with respect to this limitation since it is well known in the art that PVD techniques include magnetron sputtering as an option. Hence, Shen makes obvious the recited limitation. Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to JOSE R DIAZ whose telephone number is (571)272-1727. The examiner can normally be reached Monday-Friday. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Joshua Benitez can be reached at 571-270-1435. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /Jose R Diaz/Primary Examiner, Art Unit 2815
Read full office action

Prosecution Timeline

Jul 13, 2023
Application Filed
Jan 10, 2026
Non-Final Rejection — §102, §103, §112 (current)

Precedent Cases

Applications granted by this same examiner with similar technology

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HIGH-DENSITY METAL-INSULATOR-METAL CAPACITOR INTEGRATION WTH NANOSHEET STACK TECHNOLOGY
2y 5m to grant Granted Apr 07, 2026
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Patent 12588226
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2y 5m to grant Granted Mar 24, 2026
Patent 12578645
METHOD OF MANUFACTURING A SEMICONDUCTOR DEVICE
2y 5m to grant Granted Mar 17, 2026
Patent 12581667
MULTISTACK METAL-INSULATOR-METAL (MIM) STRUCTURE USING SPACER FORMATION PROCESS FOR HETEROGENEOUS INTEGRATION WITH DISCRETE CAPACITORS
2y 5m to grant Granted Mar 17, 2026
Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
87%
Grant Probability
94%
With Interview (+7.5%)
2y 6m
Median Time to Grant
Low
PTA Risk
Based on 922 resolved cases by this examiner. Grant probability derived from career allow rate.

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