DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Election/Restrictions
Applicant’s election without traverse of claims 11-30 in the reply filed on 10/28/2025 is acknowledged.
Drawings
The drawings are objected to under 37 CFR 1.83(a). The drawings must show every feature of the invention specified in the claims. Therefore, the in claim 20, “wherein etching the trenches in the front side provides the trenches a greater width within the semiconductor body”, because right after etching according to the applicant’s specification the front side of the trench is widest compared to the rest of the trench” therefore, this feature must be shown or the feature(s) canceled from the claim(s). No new matter should be entered.
Corrected drawing sheets in compliance with 37 CFR 1.121(d) are required in reply to the Office action to avoid abandonment of the application. Any amended replacement drawing sheet should include all of the figures appearing on the immediate prior version of the sheet, even if only one figure is being amended. The figure or figure number of an amended drawing should not be labeled as “amended.” If a drawing figure is to be canceled, the appropriate figure must be removed from the replacement sheet, and where necessary, the remaining figures must be renumbered and appropriate changes made to the brief description of the several views of the drawings for consistency. Additional replacement sheets may be necessary to show the renumbering of the remaining figures. Each drawing sheet submitted after the filing date of an application must be labeled in the top margin as either “Replacement Sheet” or “New Sheet” pursuant to 37 CFR 1.121(d). If the changes are not accepted by the examiner, the applicant will be notified and informed of any required corrective action in the next Office action. The objection to the drawings will not be held in abeyance.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 11,15,20,25 is/are rejected under 35 U.S.C. 103 as being unpatentable over Kim et al (US Pub No. 20220013566).
With respect to claim 11, Kim et al discloses providing a semiconductor body (Para 36,100,Fig.5) having a front side (top side) and a back side (bottom side); etching trenches in the front side (Fig.14), wherein the trenches form a grid (Fig.4); growing p-doped semiconductor in the trenches (Para 83-86) ; and forming an array of photodiodes in the semiconductor body (Para 75), wherein the photodiodes are laterally separated by the trenches (Fig.11). However, Kim et al does not explicitly disclose epitaxially growing P-doped semiconductor. On the other hand, it would have been obvious to one of ordinary skill in the art at the time of the filing of the invention to modify Kim et al such that that the P-doped semiconductor is epitaxially grown in order to for a high quality film in the trench which would not have any voids.
With respect to claim 15, Kim et al discloses wherein epitaxially growing the p- doped semiconductor in the trenches seals the trenches (Para 89).
With respect to claim 20, Kim et al discloses wherein etching the trenches in the front side provides the trenches a greater width within the semiconductor body than at the front side (Fig.14, this is accordance with the applicant’s specification).
With respect to claim 25, Kim et al discloses providing a first semiconductor body (100,Fig.14) having a first side (top side of 103p) and a second side (100b); etching trenches in the first side (Fig.14), wherein the trenches form a grid (Fig.14); and growing p-doped semiconductor on sidewalls of the trenches (Para 83-89), wherein growing p-doped semiconductor on sidewalls closes the trenches against further epitaxial growth (Para 89); and forming an array of photodiodes in the first semiconductor body (Para 75,Fig.4), wherein the photodiodes are laterally separated by the trenches (Fig.21). However, Kim et al does not explicitly disclose epitaxially growing P-doped semiconductor. On the other hand, it would have been obvious to one of ordinary skill in the art at the time of the filing of the invention to modify Kim et al such that that the P-doped semiconductor is epitaxially grown in order to for a high quality film in the trench which would not have any voids.
Claim(s) 12-14,26-27 is/are rejected under 35 U.S.C. 103 as being unpatentable over Kim et al (US Pub No. 20220013566), in view of Tekleab (US Pub No. 20170133426).
With respect to claim 12, Kim et al dos not explicitly discloses further comprising annealing the front side of the semiconductor body after epitaxially growing the p-doped semiconductor in the trenches. On the other hand, Tekleab discloses that annealing the front side of the semiconductor body after epitaxially growing the doped semiconductor material in the trench (Abstract,Fig.14). It would have been obvious to one of ordinary skill in the art at the time of the filing of the invention to modify Kim et al according to the teachings of the Tekleab such that annealing the front side of the semiconductor body after epitaxially growing the p-doped semiconductor in the trenches, in order to activate the ions in the film, in order to increase the polarity of the film thereby making the film more effective to isolate the pixels.
With respect to claim 13, Tekleab discloses wherein the annealing comprises laser annealing (Fig.14).
With respect to claim 14, Kim et al does not explicitly discloses, further comprising performing chemical mechanical polishing on the front side of the semiconductor body after annealing. On the other hand, Tekleab discloses performing chemical mechanical polishing (Fig.14) on the side of the semiconductor body where trenches are formed (Fig.12) after annealing (Fig.14). It would have been obvious to one of ordinary skill in the art at the time of the filing of the invention to modify Kim et al according to the teachings of the Tekleab such that CMP is used to flatten the trench surface, in order to remove the excess material thereby preventing device malfunction.
With respect to claim 26, Kim et al does not explicitly disclose further comprising removing dislocations that result from epitaxially growing p-doped semiconductor on sidewalls of the trenches by laser annealing. On the other hand, Tekleab discloses that annealing the front side of the semiconductor body after epitaxially growing the doped semiconductor material in the trench (Abstract,Fig.14). It would have been obvious to one of ordinary skill in the art at the time of the filing of the invention to modify Kim et al according to the teachings of Tekleab such that removing dislocations that result from epitaxially growing p-doped semiconductor on sidewalls of the trenches by laser annealing, in order to make a void free isolation region, thereby increase the yield of the device.
With respect to claim 27, Kim et al does not explicitly disclose further comprising, further comprising performing chemical mechanical polishing on the first side of the semiconductor body after epitaxially growing p-doped semiconductor on sidewalls of the trenches. On the other hand, Tekleab discloses performing chemical mechanical polishing (Fig.14) on the side of the semiconductor body where trenches are formed (Fig.12) after annealing (Fig.14). It would have been obvious to one of ordinary skill in the art at the time of the filing of the invention to modify Kim et al according to the teachings of the Tekleab such that CMP is used to flatten the trench surface, in order to remove the excess material thereby preventing device malfunction.
Claim(s) 16,21,24,28-29 is/are rejected under 35 U.S.C. 103 as being unpatentable over Kim et al (US Pub No. 20220013566), in view of Huang et al (US Pub No. 20210391361).
With respect to claim 16, Kim et al does not explicitly disclose thinning the semiconductor body from the back side; and depositing dielectric in the trenches from the back side. On the other hand, Huang et al discloses thinning the semiconductor body from the back side (Fig.2, Para 22); and depositing dielectric in the trenches from the back side (164, Para 26). It would have been obvious to one of ordinary skill in the art at the time of the filing of the invention to modify Kim et al according to the teachings of the Huang et al such that thinning the semiconductor body from the back side; and depositing dielectric in the trenches from the back side, in order to make an effective isolating structure for the pixels, so the crosstalk between the pixels is minimized.
With respect to claim 21, Kim et al discloses providing a first semiconductor body (100,Fig.16) having a first side (top side) and a second side (bottom side); etching trenches in the first side (Fig.14), wherein the trenches form a grid (Fig.4); growing p-doped semiconductor on sidewalls of the trenches (153P,Fig.16, para 83-86) wherein growing p-doped semiconductor on sidewalls of the trenches narrows the trenches (Fig.17), However, Kim et al does not explicitly epitaxially growing the P-doped semiconductor, forming a back end of line metal interconnect structure on the first side; bonding the first semiconductor body to a second semiconductor body; and thinning the first semiconductor body from the second side. On the other hand, Huang et al discloses forming a back end of line metal interconnect structure (150,Fig.1) on the first side (110A); bonding the first semiconductor body to a second semiconductor body (200,Fig.2); and thinning the first semiconductor body from the second side (Fig.2; para 22). It would have been obvious to one of ordinary skill in the art at the time of the filing of the invention to modify Kim et al according to the teachings of the Huang et al such that forming a back end of line metal interconnect structure on the first side; bonding the first semiconductor body to a second semiconductor body; and thinning the first semiconductor body from the second side, in order to make additional trench from the backside of the substrate so the pixels are effectively isolated from each thereby decreasing crosstalk between the pixels. However, the arts cited above do not explicitly disclose epitaxially growing P-doped semiconductor. On the other hand, it would have been obvious to one of ordinary skill in the art at the time of the filing of the invention to modify Kim et al such that that the P-doped semiconductor is epitaxially grown in order to for a high quality film in the trench which would not have any voids.
With respect to claim 24, Kim et al discloses further comprising forming an oxide (Para 96, 157,Fig.20) over the epitaxially grown p-doped semiconductor on the sidewalls of the trenches (Fig.20).
With respect to claim 28, Kim et al does not explicitly disclose bonding the first semiconductor body to a second semiconductor body; and thinning the first semiconductor body from the second side. On the other hand, Huang et al discloses bonding the first semiconductor body to a second semiconductor body (200,Fig.2); and thinning the first semiconductor body from the second side (Fig.2-3). It would have been obvious to one of ordinary skill in the art at the time of the filing of the invention to modify Kim et al according to the teachings of the Huang et al such that thinning the semiconductor body from the back side; and depositing dielectric in the trenches from the back side, in order to make an effective isolating structure for the pixels, so the crosstalk between the pixels is minimized.
With respect to claim 29, Huang et al discloses wherein thinning the first semiconductor body from the second side opens the trenches (112), and the method further comprises depositing dielectric in the trenches from the second side (160).
Claim(s) 22-23 is/are rejected under 35 U.S.C. 103 as being unpatentable over Kim et al (US Pub No. 20220013566), in view of Huang et al (US Pub No. 20210391361), in view of Tekleab (US Pub No. 20170133426).
With respect to claim 22, the arts cited above do not explicitly disclose further comprising laser annealing the first side of the semiconductor body. On the other hand, Tekleab discloses wherein the annealing comprises laser annealing (Fig.14).It would have been obvious to one of ordinary skill in the art at the time of the filing of the invention to modify the arts cited above according to the teachings of the Tekleab such that laser annealing the first side of the semiconductor body is done, in order to harden the epitaxial layer thereby removing any voids.
With respect to claim 23, the arts cited above do not explicitly disclose further performing chemical mechanical polishing of the first side after epitaxially growing p-doped semiconductor on sidewalls of the trenches. On the other hand, Tekleab discloses performing chemical mechanical polishing (Fig.14) on the side of the semiconductor body where trenches are formed (Fig.12) after annealing (Fig.14). It would have been obvious to one of ordinary skill in the art at the time of the filing of the invention to modify Kim et al according to the teachings of the Tekleab such that CMP is done on the first side to flatten the trench surface, in order to remove the excess material thereby preventing device malfunction.
Claim(s) 30 is/are rejected under 35 U.S.C. 103 as being unpatentable over Kim et al (US Pub No. 20220013566), in view of Huang et al (US Pub No. 20210391361), in view of Fukase et al (US Pub No. 20160284746)
With respect to claim 30, Huang et al discloses wherein depositing dielectric in the trenches from the second side seals the trenches (Fig.8). However, the arts cited above do not explicitly disclose while voids remain within the trenches. On the other hand, Fukase et al discloses voids (9,Fig.10) remain within the trenches (40b). It would have been obvious to one of ordinary skill in the art at the time of the filing of the invention to modify the arts cited above such that voids are formed within the trenches in order to save cost.
Allowable Subject Matter
Claims 17-19 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
Conclusion
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/ALI NARAGHI/Primary Examiner, Art Unit 2817