Prosecution Insights
Last updated: April 19, 2026
Application No. 18/355,197

ELECTRONIC DEVICE AND METHOD FOR MANUFACTURING THE SAME

Non-Final OA §103§112
Filed
Jul 19, 2023
Examiner
JONES, ERIC W
Art Unit
2892
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Samsung Display Co., Ltd.
OA Round
1 (Non-Final)
61%
Grant Probability
Moderate
1-2
OA Rounds
3y 3m
To Grant
79%
With Interview

Examiner Intelligence

Grants 61% of resolved cases
61%
Career Allow Rate
418 granted / 685 resolved
-7.0% vs TC avg
Strong +18% interview lift
Without
With
+17.9%
Interview Lift
resolved cases with interview
Typical timeline
3y 3m
Avg Prosecution
33 currently pending
Career history
718
Total Applications
across all art units

Statute-Specific Performance

§101
0.1%
-39.9% vs TC avg
§103
60.8%
+20.8% vs TC avg
§102
25.8%
-14.2% vs TC avg
§112
10.3%
-29.7% vs TC avg
Black line = Tech Center average estimate • Based on career data from 685 resolved cases

Office Action

§103 §112
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Priority Receipt is acknowledged of certified copies of papers required by 37 CFR 1.55. Information Disclosure Statement The information disclosure statement (IDS) submitted on 7/19/2023 is in compliance with the provisions of 37 CFR 1.97. Accordingly, the information disclosure statement is being considered by the examiner. Specification The title of the invention is not descriptive. A new title is required that is clearly indicative of the invention to which the claims are directed. The following title is suggested: ELECTRONIC DEVICE WITH LIGHT TRANSMITTANCE FILLING PART AND METHOD FOR MANUFACTURING THE SAME. Claim Rejections - 35 USC § 112 The following is a quotation of 35 U.S.C. 112(b): (b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention. Claims 1-17 are rejected under 35 U.S.C. 112(b), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention. A. Claim 1 recites wherein a module hole is defined in the display device through which the circuit element layer, the display element layer, the encapsulation layer, the cover inorganic layer, and the cover organic layer overlapping the first area passes through to expose the base layer, and wherein the filling part is disposed inside the module hole and is in contact with a portion of the base layer exposed by the module hole in lines 16-20. These limitations are unclear to the examiner as they relate to any of FIGS. 4-8B of the instant application that appear to be depict the claimed features in question. For clarity and examination purposes, wherein a module hole is defined in the display device through which the circuit element layer, the display element layer, the encapsulation layer, the cover inorganic layer, and the cover organic layer overlapping the first area passes through to expose the base layer, and wherein the filling part is disposed inside the module hole and is in contact with a portion of the base layer exposed by the module hole in lines 16-20 will be interpreted to read as: wherein a module hole is defined in the display device which passes through the circuit element layer, the display element layer, the encapsulation layer, the cover inorganic layer, and the cover organic layer overlapping the first area to expose the base layer, and wherein the filling part is disposed inside the module hole and is in contact with a portion of the base layer exposed by the module hole. In Re claims 2-12 and 14-17, they are rejected due to their dependence from claim 1. B. Claim 13 recites “on the same layer” in line 2. There is insufficient antecedent basis for this limitation in the claim. For examination purposes, “on the same layer” in line 2 will be interpreted to read as “on a same layer”. Claim Rejections - 35 USC § 103 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention. Claim(s) 1-2, 5, 7-10, 16-17; 18-19, 21, 23 and 24 are rejected under 35 U.S.C. 103 as being unpatentable over KIM et al (US 2021/0226174 A1, hereafter Kim) in view of SUNG et al (US 2021/0249488 A1, hereafter Sung). Re claim 1, Kim discloses in FIGS. 1, 2, 7, 9 and 16 (with references to FIG. 13) an electronic device (phone; [0055]) comprising: a display device (10; [0055] and [0289]) comprising: a base layer (SUB; [0113]) comprising a first area (TA; [0128]) and a second area (region of 1st pixels SPi; [0128]) having a light transmittance (of obstructed external light) less (more obstructed) than a light transmittance (of unobstructed external light) of the first area (TA) and surrounds (FIG. 9; [0128]) a portion (some) of the first area (TA); a circuit element layer (TFTL; [0177]) comprising insulating layers (IL1/IL2/IL3/IL4; [0177]) and a transistor (TFT; [0112] and [0181]) and disposed on ([0114] and [0177]) the base layer (SUB); a display element layer (EML; [0112] and [0116]) comprising a light emitting element (ANO/EL/CAT; [0068] and [0199]) connected to ([0200]) the transistor (TFT) and disposed on the circuit element layer (TFTL); an encapsulation layer (TFEL; [0112]) covering (on; [0118]) the display element layer (EML); a cover inorganic layer (SIL1; [0162]) disposed on ([0232]) the encapsulation layer TFEL); a cover organic layer (SOC; [0279] and [0285]) disposed on ([0279]) the cover inorganic layer (SIL1); an anti-reflection layer (RFL; [0112]) disposed on the cover organic layer (SOC); and a sensor (720/730/740/750; [0130]) disposed below (FIG. 2) the base layer (SUB) and overlapping the first area (TA). Kim fails to disclose the anti-reflection layer (RFL) comprising a hole opening overlapping the first area (TA); and a filling part overlapping the first area (TA); and wherein a module hole is defined in the display device (10) which passes through the circuit element layer (TFTL), the display element layer (EML), the encapsulation layer (TFEL), the cover inorganic layer (SIL1), and the cover organic layer (SOC) overlapping the first area (TA) to expose the base layer (SUB), and wherein the filling part is disposed inside the module hole and is in contact with a portion of the base layer (SUB) exposed by the module hole. However, Sung discloses in FIGS. 9A-9D (with references to FIGS. 3, 6) a display device comprising: an optical layer (800; [0230]) comprising a hole opening (upper region of 1001; [0230]) overlapping a first area (above 1020); a filling part (1003; [0236]) overlapping the first area (above 1020); and wherein a module hole (lower region of 1001; [0230]) is defined in the display device ([0211]) which passes through a circuit element layer (FIG. 3; [0082]), a display element layer (FIG. 6; [0158]), and an encapsulation layer (750; [0235]) overlapping the first area (above 1020) to expose a base layer (110; [0228]), and wherein the filling part (1003) is disposed inside the module hole (lower region of 1001) and is in contact with (physically touching) a portion (sidewalls) of the base layer (110) exposed by the module hole (lower region of 1001). Thus, it would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to modify the structure of Kim by adding the hole opening, the module hole, and the filling of Sung, such the anti-reflection layer (RFL) comprises a hole opening overlapping the first area (TA); the filling part overlapping the first area (TA); and the module hole is defined in the display device (10) which passes through the circuit element layer (TFTL), the display element layer (EML), the encapsulation layer (TFEL), the cover inorganic layer (SIL1), and the cover organic layer (SOC) overlapping the first area (TA) to expose the base layer (SUB), and wherein the filling part is disposed inside the module hole and is in contact with a portion of the base layer (SUB) exposed by the module hole, reducing the refractive index differences between the display device window, the filling part and the sensor, to improve the distortion of incident light to the sensor (Sung; [0042] and [0244]). Re claim 2, Kim discloses the electronic device of claim 1, further comprising a first adhesive layer (resin SPVX; [0172]-[0173]) disposed between the cover organic layer (SOC) and the anti-reflection layer (RFL). But, fails to disclose the first adhesive layer (resin SPVX) comprising a first opening corresponding to the hole opening (upper part of 1001 of Sung), wherein the filling part (1003 of Sung) is in contact with a side surface of the anti-reflection layer (RFL) defining the hole opening (upper part of 1001 of Sung), and a side surface of the first adhesive layer (resin SPVX) defining the first opening. However, the hole opening (upper part of 1001 of Sung) would further pass through the first adhesive layer (resin SPVX), wherein the filling part (1003 of Sung) would be in contact with a side surface (sidewalls) of the anti-reflection layer (RFL) defining the hole opening (upper part of 1001 of Sung), and a side surface (sidewall) of the first adhesive layer (resin SPVX) defining a first opening (upper part of 1001 of Sung in resin SPVX), as would be part of the distortion reduction discussed for claim 1. Re claim 5, Kim discloses the electronic device of claim 2, further comprising: a window (100; [0060]) disposed on the anti-reflection layer (RFL). But, fails to disclose a second adhesive layer disposed on the anti-reflection layer (RFL). However, Sung would render these limitations obvious by disclosing a second adhesive layer (1030; [0230]) disposed on the optical layer (800), where the second adhesive layer (1030) would be disposed on the anti-reflection layer (RFL) as would be part of the distortion reduction discussed for claim 1. Re claim 7, Kim discloses the electronic device of claim 5. But, fails to disclose wherein the second adhesive layer comprises a second opening corresponding to the hole opening, and wherein the filling part is in contact with a side surface of the second adhesive layer defining the second opening. However, Sung discloses the second adhesive layer (1030) comprises a second opening (upper region of 1001; [0230]) corresponding to the hole opening (upper region of 1001), and wherein the filling part (1003) is in contact with (physically touching) a side surface (sidewalls) of the second adhesive layer (1030) defining the second opening (upper region of 1001), as would be part of the distortion reduction discussed for claim 1. Re claim 8, Kim and Sung discloses the electronic device of claim 7, wherein the filling part (Sung: 1003) is in contact with (physically touching) a rear surface (bottom plane) of the window (Kim: 100/Sung: 1010) exposed from the second adhesive layer (Sung: 1030) by the second opening (Sung: upper region of 1001), as would be part of the distortion reduction discussed for claim 1. Re claim 9, Kim and Sung discloses the electronic device of claim 1, wherein the filling part (Sung: 1003) comprises a polymer resin (Sung: acrylic silicon-based organic material; [0043]), as would be part of the distortion reduction discussed for claim 1. Re claim 10, Kim discloses the electronic device of claim 1, wherein the first area comprises a hole area (SH; [0074]) corresponding to the sensor (720/730/740/750). But, fails to disclose the hole area (SH) corresponding to the module hole and a blocking area surrounding the hole area (SH) and adjacent to the second area (region of 1st pixels SPi), and wherein the circuit element layer (TFTL) comprises a dam part overlapping the blocking area, comprises a same material as at least one of the insulating layers (IL1/IL2/IL3/IL4), and surrounds the hole area (SH). However, Sung discloses a hole area (region around 1001 in FIG. 7; [0175]) corresponding to the module hole (lower region of 1001) and a blocking area (1120; [0199]) surrounding the hole area (region around 1001) and adjacent to a second area (region beyond 1120), and wherein a circuit element layer (120/140/150/160; [0117]) comprises a dam part (left/right stacks of 114/120/140/150/160) overlapping the blocking area (1120), comprises a same material (SiOx, SiNx or SiON; [0119]; [0128]; [0140] and [0146]) as at least one of insulating layers (120/140/150/160), and surrounds (FIG. 7) the hole area (region around 1001), for improving bonding strength between the base layer and the encapsulation layer (Sung; [0210]), as would be part of the distortion reduction discussed for claim 1. Re claim 16, Kim discloses the electronic device of claim 1, wherein the sensor (720/730/740/750) comprises a camera (750; [0078]). Re claim 17, Kim discloses the electronic device of claim 1, wherein the base layer (SUB) comprises a rigid substrate ([0113]), and Sung discloses wherein the base layer (110) comprises glass ([0111]), for desired mechanical properties, as would be part of the distortion reduction discussed for claim 1. Re claim 18, Kim discloses in FIGS. 1, 2, 7, 9 and 16 (with references to FIG. 13) a method for manufacturing an electronic device (phone; [0055]), the method comprising: forming a preliminary display panel (300; [0112]) comprising a base layer (SUB; [0113]) comprising an active area (A1; [0067]), on which a hole processing area (portion of 300 overlapping SH) is defined (orthographic projection of SH; [0074]), and a circuit element layer (see claim 1), a display element layer (see claim 1), an encapsulation layer (see claim 1), a cover inorganic layer (see claim 1), and a cover organic layer (see claim 1), which are sequentially laminated (stacked bottom-to-top) on the base layer (SUB); forming a first adhesive layer (see claim 2) on the cover organic layer (see claim 2); and forming an anti-reflection layer (see claims 1 and 2) on the first adhesive layer (see claims 1 and 2). Kim fails to disclose removing a portion of the circuit element layer (TFTL), the display element layer (EML), the encapsulation layer (TFEL), the cover inorganic layer (SIL1), and the cover organic layer (SOC), which overlap the hole processing area (portion of 300 overlapping SH), to form a module hole; the first adhesive layer comprising a first opening corresponding to the module hole; the anti-reflection layer (RFL) comprising a hole opening corresponding to the first opening; and filling the module hole with a filling part, wherein the module hole exposes the base layer (SUB) overlapping the hole processing area (portion of 300 overlapping SH). However, Sung discloses in FIGS. 9A-9D (with references to FIGS. 3, 6) a method for manufacturing an electronic device (phone; [0055]), the method comprising: forming an optical layer (800; [0230]) comprising a hole opening (upper region of 1001; [0230]) overlapping a first area (above 1020); forming a filling part (1003; [0236]) overlapping the first area (above 1020); and forming a module hole (lower region of 1001; [0230]) defined in the display device ([0211]) which passes through a circuit element layer (FIG. 3; [0082]), a display element layer (FIG. 6; [0158]), and an encapsulation layer (750; [0235]) overlapping the first area (above 1020) to expose a base layer (110; [0228]), and wherein the filling part (1003) is disposed inside the module hole (lower region of 1001) and is in contact with (physically touching) a portion (sidewalls) of the base layer (110) exposed by the module hole (lower region of 1001). Thus, it would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to modify the method of Kim by adding the forming a hole opening, forming a module hole, and the filling of Sung, thereby removing a portion of the circuit element layer, the display element layer, the encapsulation layer, the cover inorganic layer, and the cover organic layer, which overlap the hole processing area, to form a module hole; the first adhesive layer comprising a first opening corresponding to the module hole; the anti-reflection layer comprising a hole opening corresponding to the first opening; and filling the module hole with a filling part, wherein the module hole exposes the base layer overlapping the hole processing area, to improve the distortion of incident light to the sensor (Sung; [0042] and [0244]). For the record, the method disclosed by Sung would form the module hole and the first opening in the same process of forming opening (1001) as opposed to separate processes as the claim appears to read. It would have been obvious to one of ordinary skill in the art at the time the invention was made to form the module hole and the first opening in the same process since the selection of any order of performing process steps is prima facie obvious in the absence of new or unexpected results. In re Burhans, 154 F.2d 690, 69 USPQ 330 (CCPA 1946); In re Gibson, 39 F.2d 975, 5 USPQ 230 (CCPA 1930). See MPEP § 2144.04. Re claim 19, Kim and Sung disclose the method of claim 18, wherein the filling part is in contact with a side surface of the anti-reflection layer defining the hole opening, and a side surface of the first adhesive layer defining the first opening (see claim 2). Re claim 21, Kim and Sung disclose the method of claim 18, further comprising: forming a second adhesive layer on the anti-reflection layer; and forming a window on the second adhesive layer (see claim 5). Re claim 23, Kim and Sung disclose the method of claim 18, further comprising forming an electronic device (Kim: camera 750; [0078]/Sung: camera 1020; [0236]) below the base layer (SUB/110) overlapping the module hole (Sung: lower region of 1001), as would be part of the distortion reduction discussed for claim 18. Re claim 24, Kim and Sung disclose the method of claim 18, wherein the filling part comprises a polymer resin (see claim 9), as would be part of the distortion reduction discussed for claim 18. Claim(s) 3-4; and 20 are rejected under 35 U.S.C. 103 as being unpatentable over Kim and Sung as applied to claim 2; and claim 19 above, and further in view of Du et al (US 2019/0293849 A1, hereafter Du). Re claims 3-4, Kim and Sung disclose the electronic device of claim 2. But, fail to disclose wherein a width of the hole opening (of Sung) in one direction is greater than a width of the first opening (of Sung) in the one direction, and wherein a top surface of the first adhesive layer (of Kim) exposed from the anti-reflection layer (of Kim) by the hole opening (of Sung) is in contact with the filling part (of Sung); and wherein a width of each of the hole opening (of Sung) and the first opening (of Sung) in one direction is greater than a width of the module hole (of Sung) in the one direction, and wherein a top surface of the cover organic layer (of Kim) exposed from the anti-reflection layer (of Kim) and the first adhesive layer (of Kim) by the hole opening (of Sung) and the first opening (of Sung) is in contact with the filling part (of Sung). However, Du discloses in FIGS. 3A-3B (with references to FIG. 2B) an electronic device comprising: a module hole (20; [0032]), optical elements (44/46/48/50/52; [0032]) of varying widths (stepped; [0032]-[0033]), and a filling part (56; [0025] and [0038]) contacting exposed surfaces (sidewalls and horizontal planes) of the optical elements (44/46/48/50/52). Thus, it would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to modify the structure of Kim and Sung by using the stepped formation of Du with the components of Kim and Sung, such that a width of the hole opening (of Sung) in one direction is greater than a width of the first opening (of Sung) in the one direction, and wherein a top surface of the first adhesive layer (of Kim) exposed from the anti-reflection layer (of Kim) by the hole opening (of Sung) is in contact with the filling part (of Sung); and wherein a width of each of the hole opening (of Sung) and the first opening (of Sung) in one direction is greater than a width of the module hole (of Sung) in the one direction, and wherein a top surface of the cover organic layer (of Kim) exposed from the anti-reflection layer (of Kim) and the first adhesive layer (of Kim) by the hole opening (of Sung) and the first opening (of Sung) is in contact with the filling part (of Sung), to focus the incident light to the sensor more narrowly. Re claim 20, Kim and Sung disclose the method of claim 19. But, fail to disclose wherein a width of each of the hole opening (of Sung) and the first opening (of Sung) in one direction is greater than that of the module hole (of Sung) in the one direction, and a top surface of the cover organic layer (of Kim) exposed from the anti-reflection layer (of Kim) and the first adhesive layer (of Kim) by the hole opening (of Sung) and the first opening (of Sung) is in contact with the filling part (of Sung). However, Du would render these limitations obvious, as part of the more narrowly focused light discussed for see claims 3-4. Claim 6 is rejected under 35 U.S.C. 103 as being unpatentable over Kim and Sung as applied to claim 5 above, and further in view of JO et al (US 2021/0066410 A1, hereafter Jo). Re claim 6, Kim and Sung disclose the electronic device of claim 5. But, fail to disclose wherein the filling part is in contact with a rear surface of the second adhesive layer. However, Jo discloses in FIG. 2A an electronic device comprising: a second adhesive layer (OCA; [0056]) overlapped with a module hole (40H/50H; [0064]). Thus, it would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to modify the structure of Kim and Sung by using the non-patterned second adhesive layer of Jo, as a design choice (Jo: [0064]) and MPEP § 2144.04), so that the filling part is in contact with a rear surface of the second adhesive layer, affecting the adhesive and optical properties of the filling part. Claim(s) 11-15; and 22 are rejected under 35 U.S.C. 103 as being unpatentable over Kim and Sung as applied to claim 10; and claim 18 above, and further in view of PARK et al (US 2020/0235180 A1, hereafter Park). Re claim 11, Kim and Sung disclose the electronic device of claim 10. But, fail to disclose wherein a lower insulating layer and an upper insulating layer contacting the lower insulating layer, among the insulating layers (of Kim/Sung) inside the blocking area (of Sung) comprise a tip opening, and the circuit element layer (of Kim/Sung) further comprises a protruding pattern having a first side protruding between a side surface of the lower insulating layer and a side surface of the upper insulating layer, which define the tip opening, and a second other side disposed between the lower insulating layer and the upper insulating layer. However, Park discloses in FIG. 15F an electronic device comprising: wherein a lower insulating layer (209; [0217]) and an upper insulating layer (211; [0217]) contacting the lower insulating layer (209), among insulating layers (201/203/205/207/209/211) inside a blocking area (MA) comprise a tip opening (G; [0221]), and a circuit element layer (unseen active device on/in 201/203/205/207/209/211) further comprises a protruding pattern (210; [0221]) having a first side (horizontal part of 210) protruding between a side surface (left edge) of the lower insulating layer (209) and a side surface (left edge) of the upper insulating layer (211), which define the tip opening (G), and a second other side (slanted part of 210) disposed between the lower insulating layer (209) and the upper insulating layer (211). Thus, it would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to modify the structure of Kim and Sung by incorporating the protruding pattern of Park, wherein a lower insulating layer and an upper insulating layer contacting the lower insulating layer, among the insulating layers (of Kim/Sung) inside the blocking area (of Sung) comprise a tip opening, and the circuit element layer (of Kim/Sung) further comprises a protruding pattern having a first side protruding between a side surface of the lower insulating layer and a side surface of the upper insulating layer, which define the tip opening, and a second other side disposed between the lower insulating layer and the upper insulating layer, the protruding pattern providing improved adhesion for the lower and upper insulating layers (Park; [0230]), as well as being used in structures for reducing the progression of moisture to the display area of the device. Re claims 12-13, Kim and Sung and Park disclose the electronic device of claim 11. But, fail to disclose the electronic device (phone) further comprising a lower pattern connected to the protruding pattern (Park: 210) through a contact hole defined in the lower insulating layer (Park: 209) and disposed between the lower insulating layer (209) and the base layer (of Kim/Sung/Park); and wherein at least one of the protruding pattern (210) and the lower pattern is disposed on a same layer as one of a plurality of electrodes in the transistor (Kim: TFT). However, Park discloses in the embodiments of FIGS. 10A and 10B, a lower pattern (208; [0183]) connected to the protruding pattern (210) through a contact hole (209OD; [0184]) defined in the lower insulating layer (209) and disposed between the lower insulating layer (209) and the base layer (100); and wherein at least one of the protruding pattern (210) and the lower pattern (208) is disposed on a same layer ([0183]) as one of a plurality of electrodes (SE/DE; [0183]) in the transistor (TFT; [0183]). Thus, it would have been obvious to modify the structure of Kim and Sung and Park by using the lower pattern of FIG. 10A or 10B, as another design for improved adhesion for the lower and upper insulating layers (Park; [0184] and [0230]), as well as being used in structures for reducing the progression of moisture to the display area of the device as discussed for claim 11. Re claim 14, Kim and Sung and Park disclose the electronic device of claim 11, wherein the encapsulation layer (Kim: TEFL) comprises: a first inorganic layer (TFE1; [0221]-[0223]) in contact with (physically touching) the display element layer (TFTL); a second inorganic layer (TFE2; [0221]) disposed on the first inorganic layer (TFE1); and an organic layer (TFE3; [0224]-[0225]) disposed between the first inorganic layer (TFE1) and the second inorganic layer (TFE2). But, fails to disclose wherein the first inorganic layer (TFE1) is in contact with the side surface (Park: left edge) of the lower insulating layer (209), the side surface (Park: left edge) of the upper insulating layer (211), and the first side (horizontal part of 210) the protruding pattern (210), which define the tip opening (G). However, Park discloses in the embodiment of FIG. 17 exposed side surfaces of the side surface (left edge) of the lower insulating layer (209), the side surface (left edge) of the upper insulating layer (211), and the first side (horizontal part of 210) the protruding pattern (210). Thus, it would have been obvious to modify the structure of Kim and Sung and Park by using the shape of the upper insulating layer (211), wherein the first inorganic layer (TFE1) is in contact with the side surface (Park: left edge) of the lower insulating layer (209), the side surface (Park: left edge) of the upper insulating layer (211), and the first side (horizontal part of 210) the protruding pattern (210), which define the tip opening (G), as another design for improved adhesion for the lower and upper insulating layers (Park; [0184] and [0230]), as well as being used in structures for reducing the progression of moisture to the display area of the device as discussed for claim 11. Re claim 15, Kim and Sung and Park disclose the electronic device of claim 11, wherein the light emitting element (Kim: ANO/EL/CAT) comprises a first electrode (ANO) connected to the transistor (TFT), a second electrode (CAT) disposed on the first electrode (ANO), and an emission layer (EL) disposed between the first electrode (ANO) and the second electrode (CAT). But, fails to disclose and wherein the circuit element layer (TFTL) further comprises a tip pattern disposed inside the tip opening, wherein the tip pattern comprises a same material as the second electrode (CAT). However, Park discloses a tip pattern (210; see claim 11) disposed inside the tip opening (G), wherein the tip pattern (210) comprises a same material (Al; [0148] and [0161]) as a second electrode (223; [0148]) for fewer materials with desired electrical characteristics, as part of the protruding pattern structures discussed for claim 11. Re claim 22, Kim and Sung disclose the method of claim 18. But, fail to disclose wherein the forming of the module hole (of Sung) comprises removing the portion of the circuit element layer (of Kim/Sung), the display element layer (of Kim/Sung), the encapsulation layer (of Kim/Sung), the cover inorganic layer (of Kim), and the cover organic layer (of Kim), which overlap the hole processing area (of Kim), by applying a laser beam to the portion. However, Park discloses laser cutting ([0261]) of at least one module hole (10H), and other module holes (40H/50H) aligned (FIG. 2A; [0097]) with the at least one module hole (10H). Thus, it would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to modify the method of Kim and Sung by using the laser cutting of Park, wherein the forming of the module hole (of Sung) comprises removing the portion of the circuit element layer (of Kim/Sung), the display element layer (of Kim/Sung), the encapsulation layer (of Kim/Sung), the cover inorganic layer (of Kim), and the cover organic layer (of Kim), which overlap the hole processing area (of Kim), by applying a laser beam to the portion, to minimize process steps forming the module hole with precise alignment dimensions with the underlaying sensor. Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to ERIC W JONES whose telephone number is (408)918-9765. The examiner can normally be reached M-F 7:00 AM - 6:00 PM PT. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, N. Drew Richards can be reached at (571) 272-1736. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /ERIC W JONES/Primary Examiner, Art Unit 2892
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Prosecution Timeline

Jul 19, 2023
Application Filed
Dec 05, 2025
Non-Final Rejection — §103, §112 (current)

Precedent Cases

Applications granted by this same examiner with similar technology

Patent 12604617
DISPLAY DEVICE INCLUDING PROTECTIVE MEMBER AND METHOD OF MANUFACTURING THE SAME
2y 5m to grant Granted Apr 14, 2026
Patent 12598883
DISPLAY APPARATUS INCLUDING TANDEM ORGANIC LIGHT-EMITTING DIODE
2y 5m to grant Granted Apr 07, 2026
Patent 12593583
DISPLAY DEVICE WITH LIGHT EMISSION SEPARATION LAYERS OF DIFFERING THICKNESSES
2y 5m to grant Granted Mar 31, 2026
Patent 12593598
DISPLAY APPARATUS HAVING DAM STRUCTURES AND AN INSULATING MATERIAL AND METHOD OF MANUFACTURING THE SAME
2y 5m to grant Granted Mar 31, 2026
Patent 12593568
METAL OVERHANG FOR ADVANCED PATTERNING
2y 5m to grant Granted Mar 31, 2026
Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
61%
Grant Probability
79%
With Interview (+17.9%)
3y 3m
Median Time to Grant
Low
PTA Risk
Based on 685 resolved cases by this examiner. Grant probability derived from career allow rate.

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