Prosecution Insights
Last updated: May 29, 2026
Application No. 18/357,361

Semiconductor Device and Method of Integrating eWLB with E-bar Structures and RF Antenna Interposer

Final Rejection §102§103
Filed
Jul 24, 2023
Examiner
CHOUDHRY, MOHAMMAD M
Art Unit
2899
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Stats Chippac Pte. Ltd.
OA Round
2 (Final)
82%
Grant Probability
Favorable
3-4
OA Rounds
0m
Est. Remaining
94%
With Interview

Examiner Intelligence

Grants 82% — above average
82%
Career Allowance Rate
563 granted / 690 resolved
+13.6% vs TC avg
Moderate +12% lift
Without
With
+12.2%
Interview Lift
resolved cases with interview
Typical timeline
2y 9m
Avg Prosecution
25 currently pending
Career history
729
Total Applications
across all art units

Statute-Specific Performance

§101
0.3%
-39.7% vs TC avg
§103
93.3%
+53.3% vs TC avg
§102
1.7%
-38.3% vs TC avg
§112
1.0%
-39.0% vs TC avg
Black line = Tech Center average estimate • Based on career data from 690 resolved cases

Office Action

§102 §103
Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Election/Restrictions In response to Election/Restriction, applicant elected claims 1-13. Election was made without traverse in the reply filed on 10/31/2025. Claim Rejections - 35 USC § 102 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention. Claims 1-12 are rejected under 35 U.S.C. 102(a)(2) as being anticipated by Lee (KR 20200012440, hereinafter Lee). With respect to claim 1, Lee discloses a semiconductor device (Fig. 9), comprising: a substrate (see below) including a plurality of e-bar structures (see below); disposed adjacent to an electrical component (see below); PNG media_image1.png 832 618 media_image1.png Greyscale an antenna interposer (100) disposed over a first surface of the substrate (100 is over top surface of the substrate). With respect to claim 2, Lee discloses the semiconductor device of claim 1, further including a redistribution layer (e.g. 290&255) formed over a second surface of the substrate opposite the first surface of the substrate (e.g. 290&255 is formed on the backside of the substrate). With respect to claim 3, Lee discloses the semiconductor device of claim 2, wherein the redistribution layer includes: a conductive layer (290); and an insulating layer (230) formed over the conductive layer (e.g. Page 41; Para 01). With respect to claim 4, Lee discloses the semiconductor device of claim 1, further including an encapsulant (240) deposited over the electrical component (240 is deposited over 221/222). With respect to claim 5, Lee discloses the semiconductor device of claim 1, wherein the antenna interposer includes: a first conductive layer (lower subset of layers 112); an insulating layer (111) formed over the first conductive layer (layer 111 is formed over the lower subset of layers 112); and a second conductive layer (upper subset of layers 112) formed over the insulating layer (upper subset of layers 112 is formed over 111). With respect to claim 6, Lee discloses the semiconductor device of claim 5, wherein the second conductive layer operates as an antenna (Page 24; para 01 and Page 30; para 01). With respect to claim 7, Lee discloses a semiconductor device (Fig. 9), comprising: an electrical component (221/222); a plurality of e-bar structures disposed adjacent to the electrical component (see below); PNG media_image1.png 832 618 media_image1.png Greyscale and an antenna interposer (100) disposed over a first surface of the e-bar structures (100 is over top surface of the e-bar structures). With respect to claim 8, Lee discloses that the semiconductor device of claim 7, further including a redistribution layer (290 & 255) formed over a second surface of the e-bar structures opposite the first surface of the e-bar structures (290 & 255 is formed on the backside of the e-bar structures). With respect to claim 9, Lee discloses the semiconductor device of claim 8, wherein the redistribution layer includes: a conductive layer (290); and an insulating layer (230) formed over the conductive layer (Page 41; Para 01). With respect to claim 10, Lee discloses that the semiconductor device of claim 7, further including an encapsulant (240) deposited over the electrical component (240 is deposited over 221/222). With respect to claim 11, Lee discloses that the semiconductor device of claim 7, wherein the antenna interposer includes: a first conductive layer (lower subset of layers 112); an insulating layer (111) formed over the first conductive layer (layer 111 is formed over the lower subset of layers 112); and a second conductive layer (upper subset of layers 112) formed over the insulating layer (upper subset of layers 112 is formed over 111). With respect to claim 12, Lee discloses that the semiconductor device wherein the second conductive layer is arranged as a plurality of islands (Fig. 9; top part of 112 is arranged in a plurality of islands). Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. The text of those sections of Title 35, U.S. Code not included in this action can be found in a prior Office action. Claim 13 is rejected under 35 U.S.C. 103 as being unpatentable over Lee in view of Pavate et al. (US 2010/0127084, hereinafter Pavate). With respect to claim 13, Lee discloses the semiconductor device of claim 11. Lee does not explicitly disclose wherein the second conductive layer is arranged in a serpentine pattern. In an analogous art, Pavate discloses wherein the second conductive layer is arranged in a serpentine pattern (Para 0060; 452/456 of Figs 4C-4D). Therefore, it would have been obvious to one of an ordinary skilled in the art before the effective filing date of the claimed invention to modify Lee’s device by having Pavate’s disclosure in order to create an antenna of low profile, light weight with easy construction. Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to MOHAMMAD M CHOUDHRY whose telephone number is (571)270-5716. The examiner can normally be reached Monday - Friday. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Zandra Smith can be reached on 571-272-2429. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. MOHAMMAD M. CHOUDHRY Primary Examiner Art Unit 2816 /MOHAMMAD M CHOUDHRY/Primary Examiner, Art Unit 2899
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Prosecution Timeline

Jul 24, 2023
Application Filed
Dec 02, 2025
Non-Final Rejection mailed — §102, §103
Jan 19, 2026
Response Filed
May 27, 2026
Final Rejection mailed — §102, §103 (current)

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

3-4
Expected OA Rounds
82%
Grant Probability
94%
With Interview (+12.2%)
2y 9m (~0m remaining)
Median Time to Grant
Moderate
PTA Risk
Based on 690 resolved cases by this examiner. Grant probability derived from career allowance rate.

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