Prosecution Insights
Last updated: October 01, 2026
Application No. 18/357,459

ELECTRONIC PACKAGE AND MANUFACTURING METHOD THEREOF

Final Rejection §103
Filed
Jul 24, 2023
Priority
May 11, 2023 — TW 112117567
Examiner
PARTHASARATHY, ROHIT
Art Unit
2899
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Siliconware Precision Industries Co., Ltd.
OA Round
4 (Final)
90%
Grant Probability
Favorable
5-6
OA Rounds
0m
Est. Remaining
99%
With Interview

Examiner Intelligence

Grants 90% — above average
90%
Career Allowance Rate
43 granted / 48 resolved
+21.6% vs TC avg
Moderate +14% lift
Without
With
+13.9%
Interview Lift
resolved cases with interview
Typical timeline
3y 2m
Avg Prosecution
22 currently pending
Career history
65
Total Applications
across all art units

Statute-Specific Performance

§103
59.1%
+19.1% vs TC avg
§102
19.8%
-20.2% vs TC avg
§112
18.6%
-21.4% vs TC avg
Black line = Tech Center average estimate • Based on career data from 48 resolved cases

Office Action

§103
Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Response to Amendment The amendment filed 7/06/2026 has been entered. Claims 1-2, 6-11, and 15-18 remain pending in the application. Applicant’s amendments have overcome all the 112(b) and 112(a) rejections. Thus, Examiner is withdrawing all the 112(b) and 112(a) rejections. Regarding the 102 and 103 rejections, please see Response to Arguments below. Response to Arguments Applicant's arguments with respect to Claims 1 and 10 have been fully considered but they are not persuasive. Regarding Claims 1 and 10, Applicant argues that neither Park nor Refai-Ahmed alone disclose the elements of Claims 1 and 10. Specifically, Applicant argues that Park does not that the TIM encapsulates the underfill, and Refai-Ahmed does not disclose the dam. However, the standard of obviousness is whether a person of ordinary skill in the art would find the claim obvious in light of the combination of the references, not either reference alone (MPEP 2145 IV). In the view of the Examiner, the amended claim language of Claims 1 and 10 are obvious over Park and Refai-Ahmed. Park discloses a dam and a TIM, where the TIM does not touch the bumps. Refai-Ahmed discloses a TIM that covers the underfill. Refai-Ahmed provides a clear motivation for having the TIM fully cover the pocket where the package lies (see Claim rejection below). Although Park’s TIM does not touch the conductive bumps, there is not teaching in Park that precludes this, and if it is advantageous to do so, then a person of ordinary skill in the art would be motivated to make such a modification. Because the references teach all the limitations, and there is a clear motivation to modify Park based on Refai-Ahmed, Examiner is issuing a 103 rejection of Claims 1 and 10 in view of these references. Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claims 1-2 and 6-8 are rejected under 35 U.S.C. 103 as being unpatentable over US20240371719A1 (Park) in view of 20120098119A1 (Refai-Ahmed). Regarding Claim 1, Park discloses an electronic package (Figs. 1 – 4E), comprising: a carrier structure (Figs. 4A-4E, el. 120, Para. [0028]); an electronic component disposed on the carrier structure (Figs. 4A-4E, el. 104, Para. [0021] – different figure, but refers to the same component) via a plurality of conductive bumps (Fig. 4e, els. 114, Para. [0020]); a dam (Figs. 4A-4E, el. 148, Para. [0026]) disposed on the carrier structure and surrounding the electronic component (Fig. 3C, Para. [0027]); a thermal conduction layer (Figs. 4A-4e, el. 150, Para. [0028]) encapsulating the electronic component and located between the electronic component and the dam (Fig. 4e, Para. [0030]); and a heat sink (Figs. 3a-3e, el. 140, Para. [0026]) disposed on the carrier structure (Figs. 4A-E, Para. [0028]) and covering the electronic component, the dam and the thermal conduction layer (Para. [0028]), wherein the thermal conduction layer is further located between the heat sink and the electronic component (Fig. 4e, Para. [0030]), wherein the dam and the heat sink are integrally formed (Fig. 3a, Para. [0026]) and made of metal material (Para. [0026]). Park does not disclose (in the embodiment of Fig. 4e) an underfill that encapsulates the plurality of conductive bumps, and does not disclose that the thermal conduction layer encapsulates the underfill. Refai-Ahmed discloses an electronic package (Fig. 2, el. 10, Para. [0027]) with an underfill material (Fig. 2, el. 75, Para. [0027]) encapsulating a plurality of conductive bumps (Fig. 2), and a thermal conduction layer (Fig. 2, el. 45, Para. [0024]) that encapsulates the underfill material (Fig. 2) It would have been obvious to one skilled in the art before the effective filing date of the claimed invention to modify Park by adding an underfill material, as disclosed by Refai-Ahmed. As disclosed by Refai-Ahmed, adding an underfill material has the benefit of lessening the effects of differential CTE (Para. [0027]). Further, it would have been obvious to have the thermal conduction layer encapsulate the underfill, as disclosed by Refai-Ahmed. As disclosed by Refai-Ahmed, it is desirable to have the thermal conduction layer fill any voids in the cavity (which would mean that the thermal conduction layer would encapsulate the underfill) for more favorable thermal conduction (Para. [0028]). Regarding Claim 2, Park in view of Refai-Ahmed discloses the electronic package of claim 1, wherein the dam is a frame or a wall structure (Para. [0026]). Regarding Claim 6, Park in view of Refai-Ahmed discloses the electronic package of claim 1, wherein the thermal conduction layer is made of a liquid metal (Para. [0028]). Regarding Claim 7, Park discloses the electronic package of claim 1, wherein the heat sink has a heat dissipation body bonded to the thermal conduction layer (Para. [0032]) and has a plurality of supporting legs (Fig. 3A, els. 142 and 144, Para. [0026]) disposed on the heat dissipation body (Fig. 3A) and bonded to the carrier structure (Fig. 4C, Para. [0030]). Regarding Claim 8, Park in view of Refai-Ahmed discloses the electronic package of claim 7, wherein the heat dissipation body and the supporting legs are integrally formed (Fig. 3A). Claim 9 is rejected under 35 U.S.C. 103 as being unpatentable over Park in view of Refai-Ahmed. Regarding Claim 9, Park in view of Refai-Ahmed discloses the electronic package of Claim 7. Refai-Ahmed further discloses an electronic package (Fig. 2, el. 10, Para. [0027]) with a heat sink (Fig. 2, el. 35, Para. [0024]) with a heat dissipation body (Fig. 2, el. 60) and supporting legs (Fig. 2, el. 25, Para. [0024]) where the supporting legs are bonded to the heat dissipation body via an adhesive (Fig. 2, el. 85, Para. [0027]). It would have been obvious to one skilled in the art before the effective filing date of the claimed invention to use an adhesive to bond the supporting legs to the heat dissipation body in Park, as in Refai-Ahmed, as a simple substitution of one known element (the supporting legs with an adhesive) for another (the supporting legs without an adhesive) to obtain predictable results (a heat sink where the supporting legs are bonded to the body via an adhesive). Claims 10-11 and 15-17 are rejected under 35 U.S.C. 103 as being unpatentable over Park in view of Refai-Ahmed. Regarding Claim 10, Park discloses a method of manufacturing an electronic package (Figs. 2A-2C and 4A-4e, Para. [0022] and [0028]), the method comprising: disposing an electronic component on a carrier structure (Fig. 2b, Para. [0023]) via a plurality of conductive bumps (Fig. 2b, Para. [0023]); encapsulating the electronic component by a thermal conduction layer (Fig. 4a, Para. [0028]); and disposing a heat sink with a dam on the carrier structure to cover the electronic component and the thermal conduction layer (Figs. 4B-4E, Paras. [0029-0032]), wherein the electronic component is surrounded by the dam (Fig. 4e, Para. [0032]), and the thermal conduction layer is located between the electronic component and the dam (Fig. 4E, Para. [0032]) and between the heat sink and the electronic component (Fig. 4E, Para. [0032]), wherein the dam and the heat sink are integrally formed and made of metal material (Para. [0026]). Park does not disclose an underfill that encapsulates the plurality of conductive bumps, and does not disclose that the thermal conduction layer encapsulates the underfill. Refai-Ahmed discloses an electronic package (Fig. 2, el. 10, Para. [0027]) with an underfill material (Fig. 2, el. 75, Para. [0027]) encapsulating a plurality of conductive bumps (Fig. 2), and a thermal conduction layer (Fig. 2, el. 45, Para. [0024]) that encapsulates the underfill material (Fig. 2) It would have been obvious to one skilled in the art before the effective filing date of the claimed invention to modify Park by adding an underfill material, as disclosed by Refai-Ahmed. As disclosed by Refai-Ahmed, adding an underfill material has the benefit of lessening the effects of differential CTE (Para. [0027]). Further, it would have been obvious to have the thermal conduction layer encapsulate the underfill, as disclosed by Refai-Ahmed. As disclosed by Refai-Ahmed, it is desirable to have the thermal conduction layer fill any voids in the cavity (which would mean that the thermal conduction layer would encapsulate the underfill) for more favorable thermal conduction (Para. [0028]). Regarding Claim 11, Park in view of Refai-Ahmed discloses the method of claim 10, wherein the dam is a frame or a wall structure (Para. [0026]). Regarding Claim 15, Park in view of Refai-Ahmed discloses the method of Claim 10, wherein the thermal conduction layer is made of a liquid metal (Para. [0028]). Regarding Claim 16, Park in view of Refai-Ahmed discloses the method of Claim 10, wherein the heat sink has a heat dissipation body bonded to the thermal conduction layer (Para. [0032]) and has a plurality of supporting legs (Fig. 3A, els. 142 and 144, Para. [0026]) disposed on the heat dissipation body (Fig. 3A) and bonded to the carrier structure (Fig. 4C, Para. [0030]). Regarding Claim 17, Park in view of Refai-Ahmed discloses the method of Claim 16, wherein the heat dissipation body and the supporting legs are integrally formed (Fig. 3A). Claim 18 is rejected under 35 U.S.C. 103 as being unpatentable over Park in view of Refai-Ahmed. Regarding Claim 18, Park in view of Refai-Ahmed discloses the method of Claim 16. Refai-Ahmed further discloses an electronic package (Fig. 2, el. 10, Para. [0027]) with a heat sink (Fig. 2, el. 35, Para. [0024]) with a heat dissipation body (Fig. 2, el. 60) and supporting legs (Fig. 2, el. 25, Para. [0024]) where the supporting legs are bonded to the heat dissipation body via an adhesive (Fig. 2, el. 85, Para. [0027]). It would have been obvious to one skilled in the art before the effective filing date of the claimed invention to use an adhesive to bond the supporting legs to the heat dissipation body in Liang, as in Refai-Ahmed, as a simple substitution of one known element (the supporting legs with an adhesive) for another (the supporting legs without an adhesive) to obtain predictable results (a heat sink where the supporting legs are bonded to the body via an adhesive). Conclusion Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a). A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action. Any inquiry concerning this communication or earlier communications from the examiner should be directed to ROHIT PARTHASARATHY whose telephone number is (571)272-2572. The examiner can normally be reached Monday-Friday 8:30a-5p. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Dale Page can be reached at 5712707877. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /ROHIT PARTHASARATHY/Examiner, Art Unit 2899 /DALE E PAGE/Supervisory Patent Examiner, Art Unit 2899
Read full office action

Prosecution Timeline

Show 1 earlier event
Sep 16, 2025
Non-Final Rejection mailed — §103
Nov 26, 2025
Response Filed
Dec 30, 2025
Final Rejection mailed — §103
Mar 27, 2026
Request for Continued Examination
Mar 30, 2026
Response after Non-Final Action
Apr 06, 2026
Non-Final Rejection mailed — §103
Jul 06, 2026
Response Filed
Aug 17, 2026
Final Rejection mailed — §103 (current)

Precedent Cases

Applications granted by this same examiner with similar technology

Patent 12730135
Chip Package with Contact Clip
3y 11m to grant Granted Sep 08, 2026
Patent 12733543
Power Semiconductor Module and Manufacturing Method
3y 7m to grant Granted Sep 08, 2026
Patent 12727462
CONTACT STRUCTURE, SEMICONDUCTOR DEVICE COMPRISING THE SAME, AND METHOD FOR FABRICATING THE SAME
2y 11m to grant Granted Sep 01, 2026
Patent 12721187
SEMICONDUCTOR DEVICE
3y 1m to grant Granted Aug 25, 2026
Patent 12713923
SEMICONDUCTOR DEVICE MODULE AND METHOD FOR MANUFACTURING SAME
3y 8m to grant Granted Aug 18, 2026
Study what changed to get past this examiner. Based on 5 most recent grants.

Strategy Recommendation AI-generated — please review before filing

Get a prosecution strategy drawn from examiner precedents, rejection analysis, and claim mapping.
Typically takes 5-10 seconds — AI-generated, attorney review required before filing

Prosecution Projections

5-6
Expected OA Rounds
90%
Grant Probability
99%
With Interview (+13.9%)
3y 2m (~0m remaining)
Median Time to Grant
High
PTA Risk
Based on 48 resolved cases by this examiner. Grant probability derived from career allowance rate.

Sign in with your work email

Enter your email to receive a magic link. No password needed.

Personal email addresses (Gmail, Yahoo, etc.) are not accepted.

Free tier: 3 strategy analyses per month