Prosecution Insights
Last updated: July 17, 2026
Application No. 18/358,267

COMPOSITE DEEP TRENCH ISOLATION STRUCTURE IN AN IMAGE SENSOR

Non-Final OA §103§112
Filed
Jul 25, 2023
Priority
Jan 08, 2021 — divisional of 12/027,554
Examiner
NARAGHI, ALI
Art Unit
2817
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Taiwan Semiconductor Manufacturing Company, Ltd.
OA Round
1 (Non-Final)
86%
Grant Probability
Favorable
1-2
OA Rounds
0m
Est. Remaining
92%
With Interview

Examiner Intelligence

Grants 86% — above average
86%
Career Allowance Rate
672 granted / 778 resolved
+18.4% vs TC avg
Moderate +5% lift
Without
With
+5.4%
Interview Lift
resolved cases with interview
Typical timeline
2y 6m
Avg Prosecution
28 currently pending
Career history
810
Total Applications
across all art units

Statute-Specific Performance

§101
0.4%
-39.6% vs TC avg
§103
87.1%
+47.1% vs TC avg
§102
4.9%
-35.1% vs TC avg
§112
2.5%
-37.5% vs TC avg
Black line = Tech Center average estimate • Based on career data from 778 resolved cases

Office Action

§103 §112
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Election/Restrictions Applicant’s election without traverse of claims 9-15,21-33 in the reply filed on 02/27/2026 is acknowledged. Claim Rejections - 35 USC § 112 The following is a quotation of 35 U.S.C. 112(b): (b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention. The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph: The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention. Claim 10 is rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention. the limitations “the upper portion of the composite deep trench isolation structure directly contacts the lower portion of the composite deep trench isolation structure” would make the structure circular which is not shown in applicants’ specification. Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claim(s) 9-12,21-22,24-27,29-31,33 is/are rejected under 35 U.S.C. 103 as being unpatentable over Chien et al (Us Pub No. 20150243805). With respect to claim 9, Chien et al discloses a plurality of image sensing elements (116,Fig.2C) arranged over or within a substrate (110);; and a composite deep trench isolation structure arranged over or within the substrate (164a,162a), separating the plurality of image sensing elements from one another (Fig.2C), and comprising :a lower portion (162a) comprising a first material having a first reflectivity (Para 40-47), and an upper portion comprising a second material (164a) having a second reflectivity less than the first reflectivity (because it is made from absorption material ,para 42), , wherein the upper portion of the composite deep trench isolation structure has a bottommost surface arranged below topmost surfaces of the plurality of image sensing elements (Fig.2C). However, Chien et al does not explicitly disclose processing circuitry coupled to the plurality of photodiodes. On the other hand, it would have been obvious to one of ordinary skill in the art at the time of the filing of the invention to modify Chien et al such that circuitry is coupled to plurality to the photodiodes, in order to process light signals for devices such as cell phone cameras. With respect to claim 10, Chien et al discloses wherein the upper portion of the composite deep trench isolation structure directly contacts the lower portion of the composite deep trench isolation structure (Fig.2C). With respect to claim 11, Chien et al doses not explicitly disclose wherein the composite deep trench isolation structure continuously surrounds outer sidewalls of respective ones of the plurality of image sensing elements. On the other hand, it would have been obvious to one of ordinary skill in the art at the time of the filing of the invention to modify Chien et al such that deep trench isolation structure continuously surrounds outer sidewalls of respective ones of the plurality of image sensing elements, in order to reduce cross talk between pixels, thereby enhancing picture quality. With respect to claim 12, Chien et al discloses wherein the lower portion of the composite deep trench isolation structure has a larger thickness (in the y direction, Fig.2C) than the upper portion of the composite deep trench isolation structure (Fig.2C). With respect to claim 21, Chien et al discloses an integrated chip (Fig.2C), comprising: a plurality of photodiodes (116) arranged within a semiconductor material (110); and a composite deep trench isolation structure (162a,164a) extending through the semiconductor material (Fig.2C) and between the plurality of photodiodes (Fig.2c) and comprising: a lower portion (162a) comprising a first material (Para 40), and an upper portion arranged over the lower portion (164a) and comprising a second material (Para 42) that has a lower reflectivity than the first material (Para 40-42), wherein the lower portion of the composite deep trench isolation structure has a topmost surface arranged between tops and bottoms of the plurality of photodiodes (Fig.2C); furthermore, Chien et al discloses that the photodiode formed in the semiconductor material (110) over a substrate (140). However, Chien et al does not explicitly disclose processing circuitry coupled to the plurality of photodiodes. It would have been obvious to one of ordinary skill in the art at the time of the filing of the invention to modify Chien et al such that circuitry is coupled to plurality to the photodiodes, in order to process light signals for devices such as cell phone cameras. With respect to claim 22, Chien discloses further comprising: an interconnect structure (134) coupled to the plurality of photodiodes (Fig.2C) and arranged between the substrate (140) and the plurality of photodiodes (Fig.2C). With respect to claim 24, Chien et al discloses wherein a bottommost surface of the upper portion (bottom surface of 164a) of the composite deep trench isolation structure is below uppermost surfaces of the plurality of photodiodes (top of 116). With respect to claim 25, the arts cited above do not explicitly disclose wherein the composite deep trench isolation structure continuously surrounds outermost sidewalls of the plurality of photodiodes. On the other hand, it would have been obvious to one of ordinary skill in the art at the time of the filing of the invention to modify Chien et al such that deep trench isolation structure continuously surrounds outer sidewalls of respective ones of the plurality of image sensing elements, in order to reduce cross talk between pixels, thereby enhancing picture quality. With respect to claim 26, Chien et al does not explicitly disclose wherein the first material is a metal, and wherein the second material is a dielectric material. On the other hand, it would have been obvious to one of ordinary skill in the art at the time of the filing of the invention to modify Chien such that the first material is a metal like aluminum, and wherein the second material is a dielectric material like polymers, in order to save cost or as a design choice. With respect to claim 27, Chien discloses a barrier layer (150) arranged directly between the composite deep trench isolation structure and the plurality of photodiodes (Fig.2C). With respect to claim 29, Chien et al discloses an integrated chip (Fig.2C) comprising an image sensing element (116) arranged within a semiconductor material (110) over a substrate (140); an upper isolation layer (170) on the image sensing element (Fig.2C); and a composite deep trench isolation structure (162a,164a) arranged over the substrate and abutting outer walls of the image sensing element (Fig.2C), comprising: a lower portion (162a) having a first reflectivity (Para 39) and a first thickness (in the y direction), and an upper portion (164a) having a second reflectivity (Para 42-43) and a second thickness (Fig.2C),wherein the first thickness is greater than or equal to approximately half of a height of the image sensing element (Fig.2C), wherein the second thickness is less than or equal to the first thickness (Fig.2C), and wherein the first reflectivity is greater than the second reflectivity (Para 39-43). Furthermore, "[W]here the general conditions of a claim are disclosed in the prior art, it is not inventive to discover the optimum or workable ranges by routine experimentation." In re Aller, 220 F.2d 454, 456, 105 USPQ 233, 235 (CCPA 1955). However, Chien et al does not explicitly disclose processing circuitry coupled to the image sensing element. On the other hand, it would have been obvious to one of ordinary skill in the art at the time of the filing of the invention to modify Chien et al such that circuitry is coupled to plurality to the photodiodes, in order to process light signals for devices such as cell phone cameras. With respect to claim 30, Chien et al discloses, further comprising a barrier layer (150) lining sidewalls of the composite deep trench isolation structure (Fig.2C). With respect to claim 31, Chien et al does not explicitly disclose wherein the image sensing element is arranged within one of a plurality of pixel regions, and wherein from a top view the plurality of pixel regions are disposed within a two-dimensional array having a plurality of rows and a plurality of columns. On the other hand, it would have been obvious to one of ordinary skill in the art at the time of the filing of the invention to modify Chien et al wherein the image sensing element is arranged within one of a plurality of pixel regions, and wherein from a top view the plurality of pixel regions are disposed within a two-dimensional array having a plurality of rows and a plurality of columns, so the pixels can be used to process variety of colors, in order to be used in cell phone. With respect to claim 33, Chien et al in view of Jun discloses wherein the image sensing element comprises a photodiode (PD,Fig.2), however, they do not explicitly disclose and wherein the photodiode includes a first region having a first doping type, and a second region having a second doping type different than the first doping type. On the other hand, it would have been obvious to one of ordinary skill in the art at the time of the filing of the invention to modify the arts cited above such that the photodiode includes a first region having a first doping type, and a second region having a second doping type different than the first doping type, in order to make a PN junction sensitive to light signal which would use photovoltaic effect to send signals to the transistors for processing light signals. Claim(s) 13,15 is/are rejected under 35 U.S.C. 103 as being unpatentable over Chien et al (Us Pub No. 20150243805), in view of Zang et al (US Pub No. 20210193702) With respect to claim 13, Chien et al a passivation layer (150) arranged directly on outermost sidewalls of the image sensing elements (Fig.2C); however, it does not explicitly disclose and a barrier layer arranged directly on the passivation layer and outermost sidewalls of the composite deep trench isolation structure. On the other hand, Zang et al discloses a passivation layer (126,Fig.1; has multiple layers the outer layer such Sio2 is the passivation layer); and a barrier layer (the second layer in the combination such as TaO; 126,Fig.1) arranged directly on the passivation layer (Fig.1) and outermost sidewalls of the composite deep trench isolation structure (114,130). It would have been obvious to one of ordinary skill in the art at the time of the filing of the invention to modify Chien et al according to the teachings Of Zang et al such that isolation structure has multiple layers in order to prevent reflecting and absorption material to diffuse into the photo sensing area; thereby increasing the lifetime of the device. With respect to claim 15, Chien et al in view of Zang et al discloses wherein the barrier layer and the passivation layer are arranged below a bottommost surface (where 128 is pointed at,Fig.1) of the composite deep trench isolation structure. Claim(s) 14 is/are rejected under 35 U.S.C. 103 as being unpatentable over Chien et al (Us Pub No. 20150243805), in view of Zang et al (US Pub No. 20210193702), in view of Lim et al (US Pub No. 20200127025). With respect to claim 14, the arts cited above do not explicitly disclose wherein the barrier layer is arranged directly between the upper portion and the lower portion of the composite deep trench isolation structure. On the other hand, Lim et al discloses wherein the barrier layer (43a,Fig.5) is arranged directly between the upper portion (45C) and the lower portion (39a) of the composite deep trench isolation structure. It would have been obvious to one of ordinary skill in the art at the time of the filing of the invention to modify the arts cited above according to the teachings of the Lim et al such that the barrier layer is arranged directly between the upper portion and the lower portion of the composite deep trench isolation structure, in order to prevent mixture of the reflective and the absorption regions, thereby improving the performance of the pixels. Claim(s) 23, is/are rejected under 35 U.S.C. 103 as being unpatentable over Chien et al (Us Pub No. 20150243805), in view of Borthakur (US Pub No. 20200021754). With respect to claim 23, Chien et al discloses wherein the lower portion has a first height (Fig.2C), the upper portion has a second height (Fig.2C), and the plurality of photodiodes have a third height (116), and wherein the first height is at least 50 percent of the third height (Fg.2C). However, Chien et al does not explicitly disclose wherein a sum of the first and second heights is about equal to the third height. On the other hand, Borthakur discloses that in Fig.8 discloses that isolation region (106b,706b,Fig.8) goes through all of the semiconductor layer (116). It would have been obvious to one of ordinary skill in the art at the time of the filing of the invention to modify Chien et al according to the teachings of the Borthakur such that composite trench goes through entire substrate, thereby is equal to the height of the photosensor region, in order to minimize the crosstalk between pixels as much as possible, thereby improving the picture quality. Furthermore, "[W]here the general conditions of a claim are disclosed in the prior art, it is not inventive to discover the optimum or workable ranges by routine experimentation." In re Aller, 220 F.2d 454, 456, 105 USPQ 233, 235 (CCPA 1955). Claim(s) 28 is/are rejected under 35 U.S.C. 103 as being unpatentable over Chien et al (Us Pub No. 20150243805), in view of Lim et al (US Pub No. 20200127025). With respect to claim 28, Chien does not explicitly disclose wherein the barrier layer is also arranged directly between the upper portion and the lower portion of the composited deep trench isolation structure. On the other hand, Lim et al discloses wherein the barrier layer (43a,Fig.5) is arranged directly between the upper portion (45C) and the lower portion (39a) of the composite deep trench isolation structure. It would have been obvious to one of ordinary skill in the art at the time of the filing of the invention to modify the arts cited above according to the teachings of the Lim et al such that the barrier layer is arranged directly between the upper portion and the lower portion of the composite deep trench isolation structure, in order to prevent mixture of the reflective and the absorption regions, thereby improving the performance of the pixels. Claim(s) 32 is/are rejected under 35 U.S.C. 103 as being unpatentable over Chien et al (Us Pub No. 20150243805), in view of Jung (US Patent No. 10937821). With respect to claim 32, Chien et al discloses wherein the upper isolation layer continuously extends across a width of the image sensing element (Fig.2C), however, it does not explicitly disclose and wherein the upper isolation layer has a same material as the upper portion of the composite deep trench isolation structure. On the other hand, Jung discloses wherein the upper isolation layer which is anti-reflective (40, Fig.2) extends in to the isolation trench (Ti). It would have been obvious to one of the ordinary skills in the art at the time of the filing of the invention to modify Chien et al according the teachings of Jung such that the upper isolation layer has a same material as the upper portion of the composite deep trench isolation structure, in order to expedite the manufacturing thereby saving cost. Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to ALI N NARAGHI whose telephone number is (571)270-5720. The examiner can normally be reached 10am-6pm. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Marlon Fletcher can be reached at 571-272-2063. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /ALI NARAGHI/Primary Examiner, Art Unit 2817
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Prosecution Timeline

Jul 25, 2023
Application Filed
Jun 01, 2026
Non-Final Rejection mailed — §103, §112 (current)

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Prosecution Projections

1-2
Expected OA Rounds
86%
Grant Probability
92%
With Interview (+5.4%)
2y 6m (~0m remaining)
Median Time to Grant
Low
PTA Risk
Based on 778 resolved cases by this examiner. Grant probability derived from career allowance rate.

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