DETAILED ACTION
Specification
1. The title of the invention is not descriptive. A new title is required that is clearly indicative of the invention to which the claims are directed.
Claim Rejections - 35 USC § 103
2. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
3. Claims 1 - 7, 9 – 11, 14 - 20 are rejected under 35 U.S.C. 103 as being unpatentable over ZHANG (2025/0185476) in view of Lee et al. (10985068).
With regard to claim 1, ZHANG discloses a display device (for example, see fig. 12) comprising:
a semiconductor pattern (31);
a first capacitor electrode (80) under the semiconductor pattern (31); a second capacitor electrode (32) on (on the lateral side or on sidewall) the semiconductor pattern (31);
a first electrode (electrode layers 72, 73 functioning as a first electrode) and a second electrode (74) at a same layer (the source-drain layer, includes a source electrode 71, a drain electrode 72, a first auxiliary electrode 73, and a second auxiliary electrode 74, functioning as a same layer; for example, see paragraph [0055]) on a second capacitor electrode (32);
at least one light emitting element (a light emitting element including light emitting layer 182) between the first electrode (electrode layers 72, 73 functioning as a first electrode) and the second electrode (74);
a first pixel electrode (an electrode 110, forming under the pixel defining layer 170, functioning as a first pixel electrode) on the first electrode (electrode portion 73 of the first electrode 72, 73) and connected to a first end (for example, a left end) of the at least one light emitting element (the light emitting element including light emitting layer 182); and
a second pixel electrode (an electrode 192, forming under the pixel defining layer 170, functioning as a second pixel electrode) on the second electrode (74) and connected to a second end (for example, a right end) of the at least one light emitting element (the light emitting element including light emitting layer 182),
wherein the first electrode (electrode layers 72, 73 functioning as a first electrode) is electrically connected (connected via the semiconductor pattern 31) to the first capacitor electrode (80) and the semiconductor pattern (31),
wherein the semiconductor pattern (31) and the gate electrode (50) form a transistor (a transistor TFT), wherein a first capacitor is formed by the first capacitor electrode (80) and the second capacitor electrode (32).
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ZHANG does not clearly disclose the second capacitor electrode comprising a portion forming a gate electrode and wherein a second capacitor is formed by the second capacitor electrode and the first electrode.
However, Lee et al. disclose the second capacitor electrode (the second conductive material 132, 136, forming a gate electrode 132 and a second capacitor electrode 136, functioning as the second capacitor electrode; for example, see column 9, lines 51 - 55) on the semiconductor pattern (122) comprising a portion (132) forming a gate electrode and wherein a second capacitor (C2) is formed by the second capacitor electrode (another portion 136 of the second conductive material 132, 136) and the first electrode (156). (for example, see fig. 2).
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Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have modified the ZHANG’s device to have the second capacitor electrode comprising a portion forming a gate electrode and wherein a second capacitor is formed by the second capacitor electrode and the first electrode as taught by Lee et al. in order to enhance a high capacitance efficiency of the semiconductor device for enhancing a stability operation of the semiconductor device, as is known to one of ordinary skill in the art.
With regard to claim 2, Lee et al. disclose a signal line (a conductive line 172 functioning as a signal line) and a power line (a conductive line 134, inherently having a potential, functioning as a power line. Although the applicant uses terms different to those of Lee et al. to label the claimed invention, this does not result in any structural difference between the claimed invention and the prior art. It would have been obvious to one of ordinary skill in the art at the time the invention was made to use different terminology to describe the plurality of elements that constitute an integrated circuit as this is just a writing style and the way in which a structural limitation is expressed does not affect the configuration of the described elements.) are not at a layer between the second capacitor electrode (136) and the first electrode (116).
With regard to claim 3, Lee et al. disclose at least one of a source electrode (152) or a drain electrode (154) of the transistor is at a same layer (140) as the second capacitor electrode (136).
With regard to claim 4, Lee et al. disclose a data line (referred to as “116A” by examiner’s annotation shown in fig. 2 below) connected to the transistor (the transistor having the gate 132) is at a same layer (a layer 120 functioning as a same layer) as the first capacitor electrode (116).
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With regard to claim 5, Lee et al. disclose the power line (134) connected to the transistor (the transistor having the gate 132) is at a same layer (a layer 120 functioning as a same layer) as at least one of the first capacitor electrode (116).
With regard to claim 6, Lee et al. disclose the first pixel electrode (172) is electrically connected to the transistor (the transistor having the gate 132) by the first electrode (an electrode 154 functioning the first electrode).
With regard to claim 7, ZHANG discloses a bridge electrode (referred to as “192A” by examiner’s annotation shown in fig. 12 below) at a same layer (a layer 60 functioning as a same layer) as the first electrode (electrode layers 72, 73 functioning as a first electrode) and the second electrode (74), and spaced from the first electrode (72, 73) and the second electrode (74), wherein the second pixel electrode (192) is connected to a power line (referred to as “192B” by examiner’s annotation shown in fig. 12 below) by the bridge electrode (192A).
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With regard to claim 9, ZHANG discloses a first insulating layer (referred to as “130A” by examiner’s annotation shown in fig. 12 below) is on the first electrode (72, 73) and the second electrode (74), and wherein the first insulating layer (130A) is formed in one pixel, and is not in a boundary area between two adjacent sub-pixels from among a plurality of sub-pixels.
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With regard to claim 10, ZHANG discloses the first electrode (72, 73) covers the first capacitor electrode (80) and the second capacitor electrode (32) in a plan view (a cross-sectional view including a plan view).
With regard to claim 11, Lee et al. disclose the first electrode (156) is connected to the first capacitor electrode (116) and the semiconductor pattern (122) through an opening (140c) of the second capacitor electrode (electrodes 126, 132 functioning as the second capacitor electrode).
With regard to claim 14, ZHANG discloses a display device (for example, see fig. 12) comprising:
a semiconductor pattern (31, 32);
a first capacitor electrode (80) under the semiconductor pattern (31, 32; for example, see paragraph [0064]);
a gate electrode (50) on the semiconductor pattern (31, 32);
a first electrode (electrode layers 72, 73 functioning as a first electrode) and a second electrode (74) at a same layer (the source-drain layer, includes a source electrode 71, a drain electrode 72, a first auxiliary electrode 73, and a second auxiliary electrode 74, functioning as a same layer; for example, see paragraph [0055]) on the gate electrode (50);
at least one light emitting element (a light emitting element including light emitting layer 182) between the first electrode (electrode layers 72, 73 functioning as a first electrode) and the second electrode (74);
a first pixel electrode (an electrode 110, forming under the pixel defining layer 170, functioning as a first pixel electrode) on the first electrode (electrode portion 73 of the first electrode 72, 73) and connected to a first end (for example, a left end) of the at least one light emitting element (the light emitting element including light emitting layer 182); and
a second pixel electrode (an electrode 192, forming under the pixel defining layer 170, functioning as a second pixel electrode) on the second electrode (74) and connected to a second end (for example, a right end) of the at least one light emitting element (the light emitting element including light emitting layer 182),
wherein the first electrode (electrode layers 72, 73 functioning as a first electrode) is electrically connected (connected via the semiconductor pattern 31) to the first capacitor electrode (80) and the semiconductor pattern (31, 32),
wherein the semiconductor pattern (the semiconductor layer 31 of the layers 31, 32) and the gate electrode (50) form a transistor (a transistor TFT), wherein a portion (32) of the semiconductor pattern (31, 32) doped with an impurity (for example, see paragraph [0064] discloses the capacitor electrode 32 of the active layer 31 are all ion-doped regions with conductor properties wherein the conductor properties functioning as impurities) forms a second capacitor electrode (32);
wherein a first capacitor is formed by the first capacitor electrode (80) and the second capacitor electrode (32).
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ZHANG does not clearly disclose a second capacitor is formed by the second capacitor electrode and the first electrode that overlaps the second capacitor electrode.
However, Lee et al. disclose a second capacitor (C2) is formed by the second capacitor electrode (136) and the first electrode (156) that overlaps the second capacitor electrode (136). (for example, see fig. 2).
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Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have modified the ZHANG’s device to have a second capacitor is formed by the second capacitor electrode and the first electrode that overlaps the second capacitor electrode as taught by Lee et al. in order to enhance a high capacitance efficiency of the semiconductor device for enhancing a stability operation of the semiconductor device, as is known to one of ordinary skill in the art.
With regard to claim 15, Lee et al. disclose the gate electrode (132) is electrically connected to the second capacitor electrode (136; for example, see column 10, lines 3 - 5).
With regard to claim 16, ZHANG discloses a signal line (a conductive material, forming via 90, functioning as a signal line) and a power line (a conductive layer 71 functioning as a power line) are not at a layer between the second capacitor electrode (32) and the gate electrode (50).
With regard to claim 17, ZHANG discloses each of a data line (a conductive material, forming via 67, functioning as a data line. Although the applicant uses terms different to those of ZHANG to label/describe the claimed invention, this does not result in any structural difference between the claimed invention and the prior art. The use different terminology to describe the plurality of elements that constitute an integrated circuit as this is just a writing style and the way in which a structural limitation is expressed does not affect the configuration of the described elements.) and the power line (71) that are connected to the transistor is at a same layer (a layer 60 functioning as a same layer) as the second capacitor electrode (32).
With regard to claim 18, ZHANG discloses a bridge electrode (referred to as “192A” by examiner’s annotation shown in fig. 12 below) at a same layer (a layer 60 functioning as a same layer) as the first electrode (electrode layers 72, 73 functioning as a first electrode) and the second electrode (74), and spaced from the first electrode (72, 73) and the second electrode (74), wherein the second pixel electrode (192) is connected to a power line (referred to as “192B” by examiner’s annotation shown in fig. 12 below) by the bridge electrode (192A).
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With regard to claim 19, ZHANG discloses a first insulating layer (referred to as “130A” by examiner’s annotation shown in fig. 12 below) is on the first electrode (72, 73) and the second electrode (74), and wherein the first insulating layer (130A) is formed in one pixel, and is not in a boundary area between two adjacent sub-pixels from among a plurality of sub-pixels.
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With regard to claim 20, ZHANG discloses the first electrode (72, 73) covers the first capacitor electrode (80) and the second capacitor electrode (32) in a plan view (a cross-sectional view including a plan view).
4. Claim 12 is rejected under 35 U.S.C. 103 as being unpatentable over ZHANG (2025/0185476) in view of Lee et al. (10985068) and further in view of Li et al. (12477919).
With regard to claim 12, ZHANG and Lee et al. do not clearly disclose a wavelength conversion pattern on the at least one light emitting element, and configured to convert a wavelength band of light that is incident thereon from the at least one light emitting element to a desired wavelength band and emit the light; and a color filter on the wavelength conversion pattern.
However, Li et al. disclose a wavelength conversion pattern (31) on the at least one light emitting element (21, 22, 23), and inherently configured to convert a wavelength band of light that is incident thereon from the at least one light emitting element (21, 22, 23) to a desired wavelength band (any wavelength to be a desired wavelength band) and emit the light; and a color filter (35) on the wavelength conversion pattern (31).
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Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have modified the ZHANG and Lee et al.’s device to have a wavelength conversion pattern on the at least one light emitting element, and configured to convert a wavelength band of light that is incident thereon from the at least one light emitting element to a desired wavelength band and emit the light; and a color filter on the wavelength conversion pattern as taught by Li et al. in order to enhance a high light efficiency for enhancing a stability operation of the semiconductor device, as is known to one of ordinary skill in the art.
5. Claim 13 is rejected under 35 U.S.C. 103 as being unpatentable over ZHANG (2025/0185476) in view of Lee et al. (10985068) and further in view of Meitl et al. (11705439).
With regard to claim 13, ZHANG and Lee et al. do not clearly disclose the at least one light emitting element comprises inorganic light emitting diodes connected in parallel to each other.
However, Meitl et al. disclose the at least one light emitting element (the light emitting element forming in the pixel 32) comprises inorganic light emitting diodes (42) connected in parallel to each other. (for example, see fig. 5).
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Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have modified the ZHANG and Lee et al.’s device to have the at least one light emitting element comprises inorganic light emitting diodes connected in parallel to each other as taught by Meitl et al. in order to display higher resolution of the device for enhancing a stability operation of the semiconductor device, as is known to one of ordinary skill in the art.
Allowable Subject Matter
6. Claim 8 is objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
Claim 8 is allowable over the prior art of record, because none of these references disclose or can be combined to yield the claimed invention such as in a plan view, the second electrode extends over a plurality of sub-pixels, and wherein each of the first electrode and the bridge electrode has an island shape in each of the sub-pixels as recited in claim 8.
Conclusion
7. Any inquiry concerning this communication or earlier communications from the examiner should be directed to TAN N TRAN whose telephone number is (571) 272 - 1923. The examiner can normally be reached on 8:30-5:00PM.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Davienne Monbleau can be reached on (571) 272-1945. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/TAN N TRAN/
Primary Examiner, Art Unit 2812