DETAILED ACTION
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102 of this title, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1-20 are rejected under 35 U.S.C. 103 as being unpatentable over (US-2015/0123228) by Hatano et al (“Hatano”) in view of (US-2021/0091135) by Yokogawa et al (“Yokogawa”) and further in view of (US-2015/0008555) by Mizuka et al (“Mizuka”).
Regarding claim 1, Hatano discloses in FIG. 15 and related text, e.g., a pixel array (FIG. 1, 3), comprising:
a first pixel sensor (FIG. 1, 2), comprising:
a first photodiode (FIG. 15, 22) in a silicon layer (21, “semiconductor base”; it is silicon, per par. 45) of the pixel array;
one or more first reflection structures (24A; formed of 27/28) below the first photodiode and in an interlayer dielectric (ILD) layer (23) that is below the silicon layer; and
one or more second reflection structures (23B; formed of 27/28) under the one or more first reflection structures; and
a second pixel sensor (see FIG. 1, 2; for purposes of rejection, “second pixel sensor” is the neighbor of 2, to the left of it) comprising:
a second photodiode (same as first, but in a second pixel sensor) in the silicon layer;
one or more additional first reflection structures (same as first, but in a second pixel sensor) below the second photodiode and in the ILD layer that is below the silicon layer; and
one or more additional second reflection structures (same as first, but in a second pixel sensor) under the one or more additional first reflection structures.
Hatano does not disclose specifically an “air gap reflection structure”.
Yokogawa fixes this deficiency by teaching an equivalence between various “reflection structure” types.
Hatano also does not disclose “wherein the first photodiode and the second photodiode are separated by a deep trench isolation structure”.
Mizuka fixes this deficiency by providing a detailed explanation for how to make a deep trench between different photodiodes and reasoning for doing so.
Yokogawa discloses in par. 491 and claim 44 and related text, e.g., an equivalency between a metal reflector and an air gap reflector.
Mizuka discloses in FIG. 27 and related text, e.g., “wherein the first photodiode (central PD) and the second photodiode (left PD) are separated by a deep trench isolation structure (313)”.
It would have been obvious to one of ordinary skill in the art at the time of the invention to modify the device of Hatano with “air gap reflection structures” as taught by Yokogawa, and with “wherein the first photodiode and the second photodiode are separated by a deep trench isolation structure” as taught by Mizuka,
since Yokogawa explicitly teaches an equivalency for the purposes of making light reflectors, between reflectors made of metal, and an air gap reflector, and since it has been held to be within the general skill of a worker in the art to select a known material on the basis of its suitability for the intended use as a matter of obvious design choice. In re Leshin, 125 USPQ 416 (in the instant case, per Yokogawa, both metal (which is what Hatano uses and Yokogawa teaches) and air gap (which is what Yokogawa teaches) are suitable for intended use (per Yokogawa); hence, it becomes a matter of obvious design choice (per Yokogawa; he explicitly teaches that either metal or air gap work), and
in order to reduce color mixing, flare and blooming caused by leakage of the incident light from adjacent pixels (par. 211), respectively.
Regarding claim 2, the combined device of Hatano, Yokogawa and Mizuka disclose in cited figures and related text, e.g., wherein the one or more first air gap reflection structures are configured to reflect incident light upward toward the photodiode (see FIG. 15 of Hatano; light comes from above photodiode 22; reflectors are directly below photodiode 22; hence, reflection will be upward).
Regarding claim 3, the combined device of Hatano, Yokogawa and Mizuka disclose in cited figures and related text, e.g., disclose substantially entirety of claimed subject matter, but do not explicitly state wherein an aspect ratio, between a depth of an air gap reflection structure of the one or more first air gap reflection structures and a width of the air gap reflection structure, is greater than approximately 2.
It would have been obvious to one of ordinary skill in the art at the time of the invention to further modify the device of Hatano, Yokogawa and Mizuka with “wherein an aspect ratio, between a depth of an air gap reflection structure of the one or more first air gap reflection structures and a width of the air gap reflection structure, is greater than approximately 2”, in order to achieve the desired light reflection properties, as needed by a designer in a particular image sensor configuration. To elaborate briefly, each designer will look to design the reflectors to reflect more or less light, in accordance with the desired amount of reflectance in a particular design. Hence, per standard optics, designer will adjust the ratio of depth to width of the reflector to meet the needs of design parameters. Hence, the claimed ratio (greater than 2), is just a matter of designer arriving to his desired reflection numbers, as required by a specific design needs.
Regarding claim 4, the combined device of Hatano, Yokogawa and Mizuka disclose in cited figures and related text, e.g., wherein the one or more first air gap reflection structures include a plurality of holes that are arranged in an asymmetric configuration (see FIG. 9 of Hatano for example; in a combined device, 32/37 would be air gap, and thus a hole; FIG. 9 shows an asymmetric configuration of holes, within a single pixel).
Regarding claim 5, the combined device of Hatano, Yokogawa and Mizuka disclose in cited figures and related text, e.g., wherein the one or more first air gap reflection structures include a plurality of holes that are arranged in a substantially symmetrical grid (see FIG. 3 of Hatano for example; in a combined device, 28 would be an air gap, and thus a hole; FIG. 3 shows a symmetric grid of holes).
Regarding claim 6, the combined device of Hatano, Yokogawa and Mizuka disclose in cited figures and related text, e.g., wherein the one or more first air gap reflection structures include a plurality of trenches (se FIG. 15; 27/28 are in a trench, and would be an “air gap” type trench in a combined device; thus meeting limitations).
Regarding claim 7, the combined device of Hatano, Yokogawa and Mizuka disclose in cited figures and related text, e.g., wherein the one or more first air gap reflection structures include: a first plurality of trenches (vertical portions of 28 in FIG. 3); and a second plurality of trenches that are perpendicular to and intersect the first plurality of trenches (horizontal portions of 28 in FIG. 3).
Regarding claim 8, the combined device of Hatano, Yokogawa and Mizuka disclose in cited figures and related text, e.g., a pixel array (see claim 1), comprising:
a first pixel sensor (see claim 1) comprising:
a first photodiode in a silicon layer of the pixel array (FIG. 15, 22); and
a first plurality of air gap reflection structures (27/28 in 24A layer; “air gap” in combined device, as explained in claim 1) under the first photodiode and in:
an interlayer dielectric (ILD) layer (27; top portion; 27 is shown as a single layer in FIG. 15; but, as is notoriously well-known in semiconductor arts, when one forms openings in insulator, such as 24A/B rows of openings shown in FIG. 15, one has to have separate insulating layers for each vertical layer of openings; hence, there are at least two layers of insulator present in FIG. 15; hence, for purposes of rejection, the top portion of 27 is ILD (that contains 24A), and bottom portion is IMD (that contains 24B)) that is below the silicon layer (21), or an inter-metal dielectric (IMD) layer (27; bottom portion) that is below the ILD layer; and
a second pixel sensor (a different pixel in the array, shown in FIG. 1; lots of pixels are shown; any of them reads on claim) comprising: a second photodiode (another 22, like in FIG. 15) in the silicon layer;
a second plurality of air gap reflection structures (27/28 in 24A layer (just in a different pixel); “air gap” in combined device, as explained in claim 1) under the second photodiode and in:
the ILD layer, or the IMD layer (as explained above); and
a third plurality of air gap reflection structures (27/28 in 24B layer; “air gap” in combined device, as explained in claim 1) under the second plurality of air gap reflection structures (it is vertically under 24A),
wherein the first photodiode and the second photodiode are separated by a deep trench isolation structure (see claim 1).
Regarding claim 9, the combined device of Hatano, Yokogawa and Mizuka disclose in cited figures and related text, e.g., wherein the first plurality of air gap reflection structures and the second plurality of air gap reflection structures are in the ILD layer (as was already explained in claim 8; they are both 27A, but in different pixels).
Regarding claim 10, the combined device of Hatano, Yokogawa and Mizuka disclose in cited figures and related text, e.g., wherein further comprising: a fourth plurality of air gap reflection structures in the IMD layer and under the first plurality of air gap reflection structures (27/28 in 24B layer, but under the first pixel, and not the second one).
Regarding claim 11, the combined device of Hatano, Yokogawa and Mizuka disclose in cited figures and related text, e.g., wherein the third plurality of air gap reflection structures are in the IMD layer (as was explained in claim 8; it is 27/28 in 24B layer, but under the second pixel).
Regarding claim 12, the combined device of Hatano, Yokogawa and Mizuka disclose in cited figures and related text, e.g., wherein the first plurality of air gap reflection structures and the second plurality of air gap reflection structures are in the IMD layer (as was explained in claim 8; first and second are both located in 24A).
Regarding claim 13, the combined device of Hatano, Yokogawa and Mizuka disclose in cited figures and related text, e.g., wherein the third plurality air gap reflection structures are adjacent to a metallization layer in the IMD layer (not shown, but is inherently present; see FIG. 1; for each pixel 2 there is an interconnect shown; that interconnect is on the front surface of the “back-surface illumination type” imagers that are shown here (par. 112); hence, the wiring shown in FIG. 1, is located below 24B; hence, adjacent to a metallization layer).
Regarding claim 14, the combined device of Hatano, Yokogawa and Mizuka disclose in cited figures and related text, e.g., wherein the second plurality of air gap reflection structures are in the ILD layer (as was explained in claim 8; it is in layer 24A); and wherein the third plurality of air gap reflection structures are in the IMD layer (as was explained in claim 8; it is in layer 24B).
Regarding claim 15, the combined device of Hatano, Yokogawa and Mizuka disclose in cited figures and related text, e.g., a pixel array (see claims 1 & 8), comprising:
a first pixel sensor (see claims 1 & 8) comprising:
a first photodiode (see claims 1 & 8) in a silicon layer (see claims 1 & 8) of the pixel array; and
a first plurality of air gap reflection structures (see claims 1 & 8) under the first photodiode and in an interlayer dielectric (ILD) layer (see claims 1 & 8); and
a second pixel sensor (see claims 1 & 8) comprising:
a second photodiode (see claims 1 & 8) in the silicon layer; and
a second plurality of air gap reflection structures (see claims 1 & 8) under the second photodiode and in an inter-metal dielectric (IMD) layer (see claims 1 & 8),
wherein a third plurality of air gap reflection structures are under the first plurality and the second plurality of air gap reflection structures (not shown in FIG. 15, but obvious in light of Hatano’s explicit teachings; in FIG. 15, Hatano shows only 2 rows of reflection structures (24A/24B), however, in written description Hatano explicitly teaches in par. 112 that “a first reflection layer 24A and a second reflection layer 24B are formed on the circuit formation surface side opposite from the light incident surface of the semiconductor base 21. In other words, a plurality of reflection layers are laminated on the circuit formation surface in the solid-state imaging unit of a back-surface illumination type”; Hatano first shows only 2 layers in FIG. 15, but makes clear that the limit on the number of layers is “plurality”; hence, a third layer (call it 24C) is at the very least obvious in light of Hatano’s explicit teachings), and
wherein the first photodiode and the second photodiode are separated by a deep trench isolation structure
Regarding claim 16, the combined device of Hatano, Yokogawa and Mizuka disclose in cited figures and related text, e.g., wherein the IMD layer is below the ILD layer (see claim 8).
Regarding claim 17, the combined device of Hatano, Yokogawa and Mizuka disclose in cited figures and related text, e.g., wherein the first pixel sensor further comprises:
a fourth plurality of air gap reflection structures in the IMD layer (see claim 8; same logic applies, as to previously defined additional structures in the IMD layer).
Regarding claim 18, the combined device of Hatano, Yokogawa and Mizuka disclose in cited figures and related text, e.g., wherein the second pixel sensor further comprises:
a fourth plurality of air gap reflection structures in the ILD layer (24A layer of reflection structures, but in a second pixel).
Regarding claim 19, the combined device of Hatano, Yokogawa and Mizuka disclose in cited figures and related text, e.g., wherein the IMD layer includes a plurality of layers (for the purposes of rejection, see FIG. 15; top portion of 23 (known as ILD), ends directly with bottom surface of 27/28; below that, there are at least 3 layers (known as IMD) [Wingdings font/0xE0] (1) a portion of 23 that is between top 27/28 and bottom 27/28; (2) a portion of 23 that is in-between various bottom 27/28; and (3) a portion 23 that is below bottom 27/28; hence, IMD (lower portion of 23) being a “plurality of layers” is at the very least obvious; in the instant example, it is specifically, three layers); and
wherein the second plurality of air gap reflection structures are in an intermediate layer of the plurality of layers (as was explained above; it is second of three; hence, intermediate).
Regarding claim 20, the combined device of Hatano, Yokogawa and Mizuka disclose in cited figures and related text, e.g., wherein the IMD layer includes a metallization layer (this is worthy of 112, 2nd paragraph rejection; dielectric by definition cannot “include a metallization layer”; impossible; for purposes of rejection, Examiner is going to read the limitations in the same way as claim 13, which uses term “adjacent”; see claim 13 for how the art reads on the limitations).
Response to Arguments
Applicant’s arguments with respect to above claims have been considered but are moot because the arguments do not apply to the current rejection.
Conclusion
Additional references (if any) are cited on the PTO-892 as disclosing similar features to those of the instant invention.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to Alexander Belousov whose telephone number is (571)-272-3167. The examiner can normally be reached on 10 am-4 pm. If attempts to reach the examiner by telephone are unsuccessful, the examiner's supervisor, Jeff Natalini can be reached on 571-272-2266. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/Alexander Belousov/Patent Examiner, Art Unit 2894
04/04/26
/Mounir S Amer/Primary Examiner, Art Unit 2818
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