DETAILED ACTION
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Election/Restrictions
Applicant's election with traverse of Group I, claims 1-2, 8-10, 12, 14-20, in the reply filed on 12/8/25 is acknowledged. The traversal is on the grounds that (1) the restriction failed to demonstrate the inventions do not overlap in scope and that (2) the restriction failed to demonstrate the search of all the claims would be a serious burden.
However, these arguments are not found persuasive because (1) the restriction set forth that the apparatus of group II could be used with different operational parameters than those set forth in group I. For example, I is broad enough to read on different vacuum levels, temperatures, etc. Likewise, II can be practiced without the specific structural limitations of I. As for (2), this is not found persuasive because there is an examination and search burden for these patentably distinct species due to their mutually exclusive characteristics. The response argues the described classes are “generic and conclusory”. However, as laid out in restriction requirement, the groups would require different search strategies and/or search areas (e.g. searching for physical types of vacuum pump, heaters, etc, versus searching for operational parameters for extent of vacuum and temperature levels, etc). It is noted evidence of burden pursuant to MPEP §808.02(A) is established by the showing of different classifications. Separate classification was offered regarding each group in the original restriction requirement. Applicant has not, by this traversal, offered evidence of any error in this regard. Accordingly, it is still seen that the search and the examination of all of the species would indeed place an undue burden on the examiner.
The requirement is still deemed proper and is therefore made FINAL.
Status of the Application
Claim(s) 1-20 is/are pending.
Claim(s) 3-7, 11, 13 is/are withdrawn.
Claim(s) 1-2, 8-10, 12, 14-20 is/are rejected.
Claim Rejections – 35 U.S.C. § 112(b)
The following is a quotation of 35 U.S.C. 112(b):
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The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
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Claim(s) 8-10, 15-20 is/are rejected under 35 U.S.C. § 112(b) or 35 U.S.C. § 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor, or for pre-AIA the applicant regards as the invention.
Claim 8 recites “a first vacuum level between 100 and 1000 times greater than a second vacuum level of the second load lock” but it is unclear what units this is referring to. Similarly, claims 15, 16 recite “wherein the first vacuum environment is two to three levels of magnitude higher than the second vacuum environment” but it is unclear what the units of these levels are. The vacuum levels described in the specification appear to relate back to example pressures, which are in turn measured in Torr, but it is unclear if this is a direct correlation or examples. Appropriate clarification is requested.
Claims 9-10, 17-20 are rejected due to their dependency from claim 16.
Claim Rejections – 35 U.S.C. § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
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Claim(s) 1-2, 9-10, 12, 14 is/are rejected under 35 U.S.C. § 103 as being unpatentable over England et al. (US 20110207308 A1) [hereinafter England] in view of Huseinovic et al. (US 20150380285 A1) [hereinafter Huseinovic].
Regarding claim 1, England teaches an apparatus comprising:
a first load lock (see e.g. fig 2: 210), the first load lock configured to be maintained at a first pressure (see e.g. [0031]);
a processing chamber (see fig 2: e.g. 200) comprising:
a cooling stage (see e.g. pre-chiller, 208), the cooling stage configured to cool a wafer to a first temperature prior to ion implantation, the first temperature corresponding to a cryogenic temperature (see e.g. [0037]),
an implantation platen (see e.g. wafer platen, 206), the implantation platen configured to retain the wafer during an ion implantation process (e.g. [0031]), and
a heating stage (see e.g. [0033-34]), the heating stage configured to heat the wafer after implantation to a second temperature (see [0033-34]); and
a second load lock (see e.g. 212),
England may fail to explicitly disclose the second load lock configured to be maintained at the first pressure, wherein the processing chamber is configured to be maintained at a second pressure lower than the first pressure.
However, the use of multiple load locks at different pressures was known at the time the application was effectively filed. For example, Huseinovic teaches using higher pressures in heating chambers to provide faster thermal ramp up speeds (see Huseinovic, [0052]). It would have been obvious to a person having ordinary skill in the art at the time the application was effectively filed to combine the teachings of Huseinovic in the system of the prior art because a skilled artisan would have been motivated to look for ways to improve operation of the system including providing different chambers including those to provide faster thermal ramp up, in the manner taught by Huseinovic. Therefore, the combined teaching discloses the second load lock configured to be maintained at the first pressure (e.g. higher or atmospheric pressure), wherein the processing chamber is configured to be maintained at a second pressure lower than the first pressure (e.g. vacuum pressures).
Regarding claim 2, the combined teaching of England and Huseinovic teaches the heating stage (e.g. England, combined warm up station/pre-chiller, e.g. 208, [0033]) and the implantation platen (see 206) are in a continuous vacuum space (see fig 2: 202), wherein a first vacuum level surrounding the implantation platen and a second vacuum level surrounding the heating stage are the same (see 202).
Regarding claim 9, the combined teaching of England and Huseinovic teaches the second temperature is within 100C of a temperature of the second load lock (same temperature as the load lock, see England, fig 2: 212, [0033-34]).
Regarding claim 10, England teaches a processing tool comprising:
an ion implantation chamber (see fig 2: 200) comprising:
a cooling stage (see e.g. pre-chiller, 208), the cooling stage configured to cool a wafer to a first temperature prior to ion implantation (see e.g. [0037]),
an implantation platen (see e.g. wafer platen, 206), the implantation platen configured to retain the wafer during an ion implantation process (e.g. [0031]); and
a heating stage (see e.g. [0033-34]), the heating stage configured to heat the wafer after implantation to a second temperature greater than the first temperature (see [0033-34]), wherein the heating stage is disposed in a same vacuum environment as the implantation platen (see fig 2, e.g. 208, [0033]; or see 212 when loading wafer);
an outgoing load lock (e.g. 212) disposed at a lower vacuum environment than the first heating stage and the implantation platen (see evacuation to atmosphere, [0033]); and
a robot (see e.g. 216) configured to move the wafer from the heating stage to the outgoing load lock after heating the wafer to the second temperature (see [0033]).
England may fail to explicitly disclose the outgoing load lock being separate from cooling and/or heating load locks. However, the use of multiple load locks at different pressures was known at the time the application was effectively filed. For example, Huseinovic teaches using higher pressures in heating chambers to provide faster thermal ramp up speeds (see Huseinovic, [0052]). It would have been obvious to a person having ordinary skill in the art at the time the application was effectively filed to combine the teachings of Huseinovic in the system of the prior art because a skilled artisan would have been motivated to look for ways to improve operation of the system including providing different chambers including those to provide faster thermal ramp up, in the manner taught by Huseinovic.
Regarding claim 12, the combined teaching of England and Huseinovic teaches the incoming load lock and the outgoing load lock are disposed at a same vacuum level (e.g. when gate valves open after wafer loaded from 210 but before wafer moved to 212, see England, fig 2).
Regarding claim 14, the combined teaching of England and Huseinovic teaches the first temperature is a cryogenic temperature (see England, [0037]).
Claim(s) 8, 15 is/are rejected under 35 U.S.C. § 103 as being unpatentable over England and Huseinovic, as applied to claim 1, 10 above, and further in view of Lee (KR20070037001A).
Regarding claim 8, the combined teaching of England and Huseinovic may fail to explicitly disclose two or more cryo pumps for providing a first vacuum level between 100 and 1000 times greater than a second vacuum level of the second load lock. However, the use of cryo pumps and the claimed vacuum range was well known in the art at the time the application was effectively filed. For example, Lee teaches using a plurality of cryopumps to enable the ability to provide continuous regeneration of the pumps (see Lee, abstract). It would have been obvious to a person having ordinary skill in the art at the time the application was effectively filed to select the use of two or more cryopumps to provide the intended operation of providing the chamber vacuum levels, in order to enable the ability to provide continuous regeneration, as taught by Lee. It is unclear if the combined teaching discloses a first vacuum level between 100 and 1000 times greater than a second vacuum level of the second load lock. However, under the broadest reasonable interpretation of the claims, the claimed ratio of vacuum levels is met during e.g. evacuation of the load lock and/or initial evacuation of the processing chamber.
Regarding claim 15, the combined teaching of England and Huseinovic may fail to explicitly disclose the claimed limitation(s). However, the differences would have been obvious in view of Lee, for similar reasons as claim 8 above. Therefore, the combined teaching of England, Huseinovic, and Lee teaches a vacuum level of the implantation platen is 2 to 3 orders of magnitude greater than the outgoing load lock (see e.g. 1E-7 Torr, Lee, translation, [0006] para 2).
Claim(s) 16-20 is/are rejected under 35 U.S.C. § 103 as being unpatentable over England et al. (US 20110207308 A1) [hereinafter England] in view of Ho et al. (US 20150221515 A1) [hereinafter Ho].
Regarding claim 16, England teaches an apparatus comprising:
a processing chamber (see fig 2: e.g. 200 or 202) comprising:
a cooling stage (see e.g. pre-chiller, 208) configured to cool a wafer to a first temperature in a range of -1000C and -300C (see [0048]);
an implantation platen (see e.g. wafer platen, 206) configured to hold the wafer during an ion implantation process performed after cooling the wafer to the first temperature (e.g. [0031]); and
a heating stage (see e.g. [0033-34]) configured to heat the wafer to a second temperature in a range of 00C and 500C after the ion implantation process (see fig 4, e.g. [0052]);
an outgoing load lock (e.g. 212);
a
a robot (see e.g. 216) configured to move the wafer from the heating stage to the outgoing load lock after heating the wafer to the second temperature (see [0033]).
England may fail to explicitly disclose the valve being a slit valve.
However, the use of slit valves were well known in the art at the time the application was effectively filed. For example, Ho teaches slit valves and robot system as part of a known effective wafer transport mechanism (see Ho, [0021]). It would have been obvious to a person having ordinary skill in the art at the time the application was effectively filed to combine the teachings of Ho in the system of the prior art, including applying the use of the known effective slit valves and systems using slit valves, as a routine skill in the art to enable the intended operation of the system. It is noted that simple substitution of one known element for another to obtain predictable results supported a prima facie obviousness. See MPEP 2143.
The combined teaching may fail to explicitly disclose wherein the first vacuum environment is two to three levels of magnitude higher than the second vacuum environment. However, it is noted that under the broadest reasonable interpretation of the claims, the claimed ratio of vacuum levels is met during e.g. evacuation of the load lock and/or initial evacuation of the processing chamber (note discussion of high vacuum in processing chamber, England, [0047], which is recognized in the art to be 1E-3 Torr or less, which is over 2 levels of magnitude from 760 Torr at 1 Atm, thus the pressures will reach the claimed range during evacuation).
Regarding claim 17, the combined teaching of England and Ho teaches the heating stage comprises electric heating coils (e.g. resistive devices, see England, [0033]) configured to heat the wafer to the second temperature (see [0033]). Note it was well known in the art at the time the application was effectively filed to use coils as resistive heating elements, and alternately selection of at least a part coil shape for an uncoiled element would have been obvious as a routine skill in the art to fit a resistive element into a wafer support. It is noted that it has been held that it would have been obvious to a person having ordinary skill in the art to change the shape as a matter of design choice. See MPEP 2144.04, In re Dailey, 357 F.2d 669, 149 USPQ 47 (CCPA 1966).
Regarding claim 18, the combined teaching of England and Ho teaches the heating stage comprises: a platform (required for operation of system, see wafer support, England, [0033]) configured to hold the wafer while heating the wafer to the second temperature; and heating loops configured to circulate a heated liquid through the platform while heating the wafer to the second temperature (see England, [0033]). The combined teaching may fail to explicitly disclose the heating liquid conduits being coils, but it was well known in the art to form liquid heat transfer conduits in at least partly coil shapes, and additionally it would have been obvious to a person having ordinary skill in the art at the time the application was effectively filed to adjust the shape of the liquid conduit in the wafer holder system to provide sufficient heat to all parts of the wafer holding surface and/or direct liquid wherever it is required throughout the system, including a conduit shape that is at least partly a loop shape. It is noted that it has been held that it would have been obvious to a person having ordinary skill in the art to change the shape as a matter of design choice. See MPEP 2144.04, In re Dailey, 357 F.2d 669, 149 USPQ 47 (CCPA 1966).
Regarding claim 19, the combined teaching of England and Ho teaches the heating the implantation platen (see England, 206) is disposed in a first subchamber of the processing chamber (see around 206), wherein the heating stage (see [0033-34], at 208, or elsewhere in 202) is disposed in a second subchamber of the processing chamber (see same). It is unclear if the combined teaching discloses wherein no slit valve separates the second subchamber from the first subchamber. However, it would have been obvious to a person having ordinary skill in the art at the time the application was effectively filed to select the use of other types of valves (e.g. gate valves), and/or provide the subchambers in fluid communication with each other (see e.g. discussion of different options in [0033-35]).
Regarding claim 20, the combined teaching of England and Ho teaches the second temperature is within 100C of a temperature of the second load lock (same temperature as the load lock, see England, fig 2: 212, [0033-34]).
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to James Choi whose telephone number is (571) 272 – 2689. The examiner can normally be reached on 8:00 am – 5:30 pm M-T, and every other Friday.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Georgia Epps can be reached on (571) 272 – 2328. The fax phone number for the organization where this application or proceeding is assigned is (571) 273 – 8300.
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/JAMES CHOI/Examiner, Art Unit 2878