Prosecution Insights
Last updated: July 17, 2026
Application No. 18/364,667

EMBEDDED LIGHT SHIELD STRUCTURE FOR CMOS IMAGE SENSOR

Final Rejection §103
Filed
Aug 03, 2023
Priority
Sep 30, 2019 — provisional 62/908,160 +1 more
Examiner
BELOUSOV, ALEXANDER
Art Unit
2818
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Taiwan Semiconductor Manufacturing Company, Ltd.
OA Round
2 (Final)
76%
Grant Probability
Favorable
3-4
OA Rounds
0m
Est. Remaining
93%
With Interview

Examiner Intelligence

Grants 76% — above average
76%
Career Allowance Rate
396 granted / 519 resolved
+8.3% vs TC avg
Strong +16% interview lift
Without
With
+16.5%
Interview Lift
resolved cases with interview
Typical timeline
2y 11m
Avg Prosecution
25 currently pending
Career history
544
Total Applications
across all art units

Statute-Specific Performance

§101
0.1%
-39.9% vs TC avg
§103
90.0%
+50.0% vs TC avg
§102
8.1%
-31.9% vs TC avg
§112
1.3%
-38.7% vs TC avg
Black line = Tech Center average estimate • Based on career data from 519 resolved cases

Office Action

§103
DETAILED ACTION Allowable Subject Matter Claim 6 is objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. The following is a statement of reasons for the indication of allowable subject matter. Claim 6 now recites “a top surface of the light shield structure is vertically offset from a bottom surface of the composite grid structure by a vertical distance greater than the thickness of the light shield structure”. However, no such feature was found in the prior art. Hence, indication of allowable subject matter. Claims 16 and 18-20 are allowed. The following is an examiner’s statement of reasons for allowance. Claim 16 now recites a structure that includes inner sidewalls (“extending from the top surface of the light shield structure to the lower surface”). No such sidewalls found in prior art, hence indication of allowance of claim 16. Any comments considered necessary by applicant must be submitted no later than the payment of the issue fee and, to avoid processing delays, should preferably accompany the issue fee. Such submissions should be clearly labeled “Comments on Statement of Reasons for Allowance.” Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claims 1-4 & 7-9 are rejected under 35 U.S.C. 103 as being unpatentable over (US-2015/0061062) by Lin et al (“Lin”) in view of (US-2022/0359584) by Hamasaki et al (“Hamasaki”). Regarding claim 1, Lin discloses in FIG. 9 and related text, e.g., an image sensor (see FIG. 9), comprising: a first photodetector (108, left one) disposed within a front-side surface of a semiconductor substrate (102); a trench isolation structure (130) disposed over a back-side surface of the semiconductor substrate, wherein the trench isolation structure comprises a buffer layer (128) and a dielectric liner (126), wherein the buffer layer covers the back-side surface of the semiconductor substrate and fills trenches that extend downward into the back-side surface of the semiconductor substrate (see FIG. 9), wherein the dielectric liner is disposed between the buffer layer and the semiconductor substrate (see FIG. 9); a composite grid structure (132) having composite grid segments that are aligned over the trenches, respectively, wherein the buffer layer separates the dielectric liner from the composite grid structure (see FIG. 9). Lin does not disclose “a light shield structure disposed within the buffer layer and directly overlying the first photodetector”. Lin also does not disclose “wherein a thickness of the light shield structure is less than a thickness of the composite grid structure”. Hamasaki discloses in FIGs. 164-169 and related text, e.g., a light shield structure (FIG. 166, BM; formed of metal; par. 896) disposed within the buffer layer (unmarked layer, in which BM is located) and directly overlying the first photodetector (OBP). It would have been obvious to one of ordinary skill in the art at the time of the invention to modify the device of Lin with “a light shield structure disposed within the buffer layer and directly overlying the first photodetector” as taught by Hamasaki, and with “wherein a thickness of the light shield structure is of minimum thickness”, in order to block light from the Optical Black Pixel (par. 896), and in order to minimize the overall thickness of a device and to reduce the time spend manufacturing of the product (the “light shield structure” has to fit within its “buffer layer”; the thicker the “light shield structure” (which is made of metal), the thicker the “buffer layer” has to be; this has the negative effect of making overall device thicker (light has to travel longer distance through “buffer layer” in other pixels) and makes device more expensive (since all that material takes time and money to deposit); hence, a POSITA would be drawn to thinnest allowable layer of metal for BM that still blocks light, in order to avoid such negative consequences, making it a “result effective variable”), respectively. When the above teachings are applied to device of Lin and Hamasaki, it will result in “wherein a thickness of the light shield structure is less than a thickness of the composite grid structure”, since “light shield structure” would be of minimum thickness, and the “composite grid structure” on the other hand could be much more than minimum thickness (see Lin, par. 28; the thickness of grid ranges from 100 Angstroms to 15000 Angstroms). Thus, meeting limitations by at least an overlapping range (if light shield structure was of 100 Angstroms thickness). It has been held that discovering an optimum value of a result effective variable involves only routine skill in the art, In re Antonie, 195 USPQ 6 (C.C.P.A. 1977). Regarding claim 2, the combined device of Lin and Hamasaki disclose in cited figures and related text, e.g., wherein the light shield structure has a first end that terminates under a first composite grid segment of the composite grid structure and has a second end that terminates under a second composite grid segment of the composite grid structure (the entirety of structure is under grid; hence, everything “terminates” under grid segments), wherein the first composite grid segment neighbors the second composite grid segment (by definition). Regarding claim 3, the combined device of Lin and Hamasaki disclose in cited figures and related text, e.g., wherein the light shield structure has a top surface that is coplanar with a top surface of the buffer layer (see FIG. 166). Regarding claim 4, the combined device of Lin and Hamasaki disclose in cited figures and related text, e.g., wherein a first outer portion of the top surface of the light shield structure directly contacts a bottom surface of the first composite grid segment and a second outer portion of the top surface of the light shield structure directly contacts a bottom surface of the second composite grid segment (BM is right at the top of its “buffer layer” in Hamasaki; “light shield structure” is directly on top of buffer layer in Lin; hence, in combined device they would directly contact). Regarding claim 7, the combined device of Lin and Hamasaki disclose in cited figures and related text, e.g., further comprising: a second photodetector (108, central one) disposed within the semiconductor substrate and neighboring the first photodetector; and wherein the light shield structure is laterally offset from at least a portion of the second photodetector by a first non-zero distance (in a combined device; Hamasaki shows that his BM covers one photodiode portion 930 (FIG. 164), but not another photodiode portion 930; thus meeting limitations). Regarding claim 8, the combined device of Lin and Hamasaki disclose in cited figures and related text, e.g., wherein a first outer portion of a lower surface of the light shield structure (FIG. 164, BM; left portion of bottom surface) directly overlies a first outer edge of the second photodetector (top surface of 910; 910 is shared between photodiodes (for example, see par. 901; 910 is directly cited as part of individual photodiode, but the figure shows that it is shared); hence, the cited portion “directly overlies” the shared portion thereof; thus meeting limitations), and wherein the light shield structure is laterally offset from a second outer edge of the second photodetector (top surface of 930 is the “second outer edge”) by a second non-zero distance in a direction towards the first photodetector (see FIG. 164). Regarding claim 9, the combined device of Lin and Hamasaki disclose in cited figures and related text, e.g., substantially the entirety of claimed subject matter but does not explicitly state “wherein the light shield structure comprises a dielectric material and/or a polymer” (par. 901; BM is made of “metal or the like”). It would have been obvious to one of ordinary skill in the art at the time of the invention to further modify the device of Lin and Hamasaki with “wherein the light shield structure comprises a dielectric material and/or a polymer”, since a metal containing dielectric would read on explicit teachings of Hamasaki (par. 901 “metal or the like”). Claims 1-2, 5, 10-15 & 21 are rejected under 35 U.S.C. 103 as being unpatentable over (US-2015/0061062) by Lin et al (“Lin”) in view of (US-2019/0215442) by Kim et al (“Kim”). Regarding claim 1, Lin discloses in FIG. 9 and related text, e.g., an image sensor (see FIG. 9), comprising: a first photodetector (108, left one) disposed within a front-side surface of a semiconductor substrate (102); a trench isolation structure (130) disposed over a back-side surface of the semiconductor substrate, wherein the trench isolation structure comprises a buffer layer (128) and a dielectric liner (126), wherein the buffer layer covers the back-side surface of the semiconductor substrate and fills trenches that extend downward into the back-side surface of the semiconductor substrate (see FIG. 9), wherein the dielectric liner is disposed between the buffer layer and the semiconductor substrate (see FIG. 9); a composite grid structure (132) having composite grid segments that are aligned over the trenches, respectively, wherein the buffer layer separates the dielectric liner from the composite grid structure (see FIG. 9). Lin does not disclose “a light shield structure disposed within the buffer layer and directly overlying the first photodetector”. Lin also does not disclose “wherein a thickness of the light shield structure is less than a thickness of the composite grid structure”. Kim discloses in FIG. 18A and related text, e.g., “a light shield structure (79) disposed within the buffer layer (83/77; specifically, the 83 portion is above and 77 below) and directly overlying the first photodetector (57/59)”. It would have been obvious to one of ordinary skill in the art at the time of the invention to modify the device of Lin with “a light shield structure disposed within the buffer layer and directly overlying the first photodetector” as taught by Kim, and with “wherein a thickness of the light shield structure is of minimum thickness”, in order to reduce the amount of light that reaches pixel (Abstract), and in order to minimize the overall thickness of a device and to reduce the time spend manufacturing of the product (the “light shield structure” has to fit within its “buffer layer”; the thicker the “light shield structure” (which is made of metal), the thicker the “buffer layer” has to be; this has the negative effect of making overall device thicker (light has to travel longer distance through “buffer layer” in other pixels) and makes device more expensive (since all that material takes time and money to deposit); hence, a POSITA would be drawn to thinnest allowable layer of metal for BM that still blocks light, in order to avoid such negative consequences, making it a “result effective variable”), respectively. When these teachings of Kim are applied to device of Lin, it will result in “light shield structure being below grid and separated from it by a layer”, since the equivalent of Lin’s layer 134 (that contains grid) is Kim’s layer 85; hence, grid containing layer 85, would have at least layer 83 separating it from light blocking structure 79. Also, when the above teachings are applied to device of Lin and Kim, it will result in “wherein a thickness of the light shield structure is less than a thickness of the composite grid structure”, since “light shield structure” would be of minimum thickness, and the “composite grid structure” on the other hand could be much more than minimum thickness (see Lin, par. 28; the thickness of grid ranges from 100 Angstroms to 15000 Angstroms). Thus, meeting limitations by at least an overlapping range (if light shield structure was of 100 Angstroms thickness). It has been held that discovering an optimum value of a result effective variable involves only routine skill in the art, In re Antonie, 195 USPQ 6 (C.C.P.A. 1977). Regarding claim 2, the combined device of Lin and Kim disclose in cited figures and related text, e.g., wherein the light shield structure has a first end that terminates under a first composite grid segment of the composite grid structure and has a second end that terminates under a second composite grid segment of the composite grid structure (the entirety of structure is under grid; hence, everything “terminates” under grid segments), wherein the first composite grid segment neighbors the second composite grid segment (by definition). Regarding claim 5, the combined device of Lin and Kim disclose in cited figures and related text, e.g., wherein the light shield structure is embedded in the buffer layer, such that the buffer layer contacts a top surface of the light shield structure, a lower surface of the light shield structure, and sidewall surfaces of the light shield structure (as was explained in rejection of claim 1, directly above, in rejection of Lin and Kim). Regarding claim 10, the combined device of Lin and Kim disclose in cited figures and related text, e.g., an image sensor, comprising: a plurality of photodetectors disposed within a semiconductor substrate, wherein the plurality of photodetectors comprises a first photodetector neighboring a second photodetector (see claim 1; the left 108 and central 108); an interconnect structure (FIG. 9, 116/118) disposed along a front-side surface of the semiconductor substrate; an isolation structure disposed over a back-side surface of the semiconductor substrate, wherein the isolation structure comprises a buffer layer that overlies the back-side surface of the semiconductor substrate and comprises one or more segments extending into a plurality of trenches that extend downward into the back-side surface of the semiconductor substrate (see claim 1); a metal grid structure disposed along a top surface of the buffer layer, wherein the buffer layer separates the metal grid structure from the back-side surface of the semiconductor substrate (see claim 1); and a light shield structure disposed within the buffer layer and directly overlying the first photodetector, wherein the light shield structure is laterally offset from at least a portion of the second photodetector (see claim 1 and FIG. 18A), and wherein the buffer layer contacts a top surface of the light shield structure, a bottom surface of the light shield structure, and opposing sidewalls of the light shield structure (see claim 5), wherein a refractive index of the light shield structure is greater than a refractive index of the buffer layer (by definition; the point of “light shield structure” is to completely block the light; the point of the “buffer layer” is to let the light go through; hence, the limitations are met by definition; refractive index of the light shield structure will be higher than that of the buffer layer, such an arrangement would have been obvious to a POSITA, in order for the layers to fulfill their respective functions). Regarding claim 11, the combined device of Lin and Kim disclose in cited figures and related text, e.g., wherein a first outer sidewall of the light shield structure directly overlies a first trench of the plurality of trenches (such example is shown in FIG. 16; 79 overlies 53a directly) and a second outer sidewall of the light shield structure directly overlies a second trench of the plurality of trenches (see FIG. 25, 79 can overlie all sorts of trenches and edges of trenches). Regarding claim 12, the combined device of Lin and Kim disclose in cited figures and related text, e.g., substantially the entirety of claimed subject matter, including the buffer layer comprises silicon dioxide (par. 109). Lin and Kim do not disclose wherein the light shield structure comprises titanium oxide or tantalum oxide. It would have been obvious to one of ordinary skill in the art at the time of the invention to further modify the device of Lin and Hamasaki with “wherein the light shield structure comprises titanium oxide or tantalum oxide”, since the cited materials are notoriously well-known light shield structure materials, as used in imaging devices, and thus would be obvious to use in order to simplify the processing steps of making the device by using well-known and well-understood materials. Regarding claim 13, the combined device of Lin and Kim disclose in cited figures and related text, e.g., wherein the buffer layer is a continuous material enveloping the light shield structure (see FIG. 18A). Regarding the process limitations of "single", these would not carry patentable weight in this claim drawn to a structure, because distinct structure is not necessarily produced. Note that a "product by process" claim is directed to the product per se, no matter how actually made, In re Hirao, 190 USPQ 15 at 17 (footnote 3). See also In re Brown, 173 USPQ685; In re Luck, 177 USPQ 523; In re Fessmann, 180 USPQ 324; In re Avery, 186 USPQ 161; In re Wertheim, 191 USPQ 90 (209 USPQ 554 does not deal with this issue); and In re Marosi et al., 218 USPQ 289, all of which make it clear that it is the patentability of the final product per se which must be determined in a "product by process" claim, and not the patentability of the process, and that an old or obvious product produced by a new method is not patentable as a product, whether claimed in "product by process" claims or not. Note that the applicant has the burden of proof in such cases, as the above case law makes clear. Specifically, whether the cited layer is made from a single layer, or multiple layers, does not really change the structure of the device. This is a “process limitation” that masquerades as device limitation. At the very least, for purposes of patentability of the device, whether making an object from a single layer, or multiple ones, is at the very least obvious. In other words, ALL possible processes of forming layers, regardless of method steps, that result in the same looking structure, are obvious equivalents for purposes of patentability of device. Regarding claim 14, the combined device of Lin and Kim disclose in cited figures and related text, e.g., wherein the plurality of photodetectors further comprises a third photodetector, wherein the first photodetector is spaced laterally between the second and third photodetectors, wherein a first outer sidewall of the light shield structure directly overlies the third photodetector and a second outer sidewall of the light shield structure directly overlies the second photodetector (the above limitations require 2 partially covered photodiodes and one completely covered; see FIG. 15A; example of multiple partially covered photodiodes is shown; example of completely covered is shown in FIGs. 16, 18, etc.; thus meeting limitations). Regarding claim 15, the combined device of Lin and Kim disclose in cited figures and related text, e.g., wherein the light shield structure is spaced laterally between neighboring grid segments of the metal grid structure and a width of the light shield structure is less than a width of the first photodetector (see FIG. 28; it shows L22b between various L21’s; hence, a case of narrow “light shield structure” is at least obvious in light of Kim’s explicit teachings, the width of the “first photodetector” being the width of lens 35, in the instant case). Regarding claim 21, the combined device of Lin and Kim disclose in cited figures and related text, e.g., wherein a sidewall of the light shield structure (top sidewall of Kim’s 79) is aligned with a sidewall of an individual composite grid segment (bottom sidewall of “composite grid” taught by Lin) in the composite grid segments (as one can see, Kim’s “light shield structure” is extra wide; it goes beyond one pixel, and into the neighboring pixel; hence, in a combined device, the top sidewall of “light shield structure” will be aligned with bottom sidewall of the overlaying “composite grid segment”, at least in part; thus meeting limitations). Response to Arguments Applicant’s arguments with respect to above claims have been considered but are moot because the arguments do not apply to the current rejection. Conclusion Additional references (if any) are cited on the PTO-892 as disclosing similar features to those of the instant invention. THIS ACTION IS MADE FINAL. Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a). A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any extension fee pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action. Any inquiry concerning this communication or earlier communications from the examiner should be directed to Alexander Belousov whose telephone number is (571)-272-3167. The examiner can normally be reached on 10 am-4 pm. If attempts to reach the examiner by telephone are unsuccessful, the examiner's supervisor, Jeff Natalini can be reached on 571-272-2266. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of an application may be obtained from the Patent Application Information Retrieval (PAIR) system. Status information for published applications may be obtained from either Private PAIR or Public PAIR. Status information for unpublished applications is available through Private PAIR only. For more information about the PAIR system, see http://pair-direct.uspto.gov. Should you have questions on access to the Private PAIR system, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative or access to the automated information system, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /Alexander Belousov/Patent Examiner, Art Unit 2894 05/27/26 /Mounir S Amer/Primary Examiner, Art Unit 2818
Read full office action

Prosecution Timeline

Aug 03, 2023
Application Filed
Oct 02, 2025
Non-Final Rejection mailed — §103
Dec 30, 2025
Response Filed
Jun 04, 2026
Final Rejection mailed — §103 (current)

Precedent Cases

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Prosecution Projections

3-4
Expected OA Rounds
76%
Grant Probability
93%
With Interview (+16.5%)
2y 11m (~0m remaining)
Median Time to Grant
Moderate
PTA Risk
Based on 519 resolved cases by this examiner. Grant probability derived from career allowance rate.

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