Detailed Action
This office action is in response to the request for continued examination filed on September 22nd, 2025. Claims 1-5, 7-9, 11-17, and 20-24 are pending.
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Continued Examination Under 37 CFR 1.114
A request for continued examination under 37 CFR 1.114, including the fee set forth in 37 CFR 1.17(e), was filed in this application after final rejection. Since this application is eligible for continued examination under 37 CFR 1.114, and the fee set forth in 37 CFR 1.17(e) has been timely paid, the finality of the previous Office action has been withdrawn pursuant to 37 CFR 1.114. Applicant's submission filed on September 22nd, 2025, has been entered.
Information Disclosure Statement
The information disclosure statement (IDS) submitted on November 25th, 2025, was filed after the mailing date of the final office action. The submission is in compliance with the provisions of 37 CFR 1.97. Accordingly, the information disclosure statement is being considered by the examiner.
Response to Arguments
Applicant's arguments filed September 22nd, 2025, have been fully considered but they are not persuasive.
Applicant argues (pgs. 10-12, “Remarks”) that Sze nor the other cited references teach the limitations presented in amended Claims 1, 7, and 13.
However, as seen below, Claim 1 is now rejected by the combination of Sze, Kim, and Chen. Claim 7 is rejected by the combination of Sze, Kim, Chen, and Kobayashi. Claim 13 is rejected by the combination of Sze and Kim.
Therefore, applicant’s arguments are not persuasive and are moot in view of the new grounds of rejection.
Applicant’s amendments have overcome the 35 U.S.C. 112(b) rejections of the previous office action.
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claims 1-5, 7-9, 11-12 and 22-23 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
Claim 1 recites the limitation "the second side" in line 14. It is not clear how the second side of the substrate is opposite to the second side of the substrate. For the purposes of examination, the limitation will be interpreted as “the first side”.
Claim 7 recites the limitation "the second side" in line 15. It is not clear how the second side of the substrate is opposite to the second side of the substrate. For the purposes of examination, the limitation will be interpreted as “the first side”.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1-3 and 22 are rejected under 35 U.S.C. 103 as being unpatentable over Sze et al. (2020/0105812 A1; hereinafter Sze) in view of Kim et al. (2021/0335877 A1; hereinafter Kim) and Chen et al. (2018/0204862 A1; hereinafter Chen).
Regarding Claim 1, Sze (fig. 16) teaches a method, comprising:
forming a plurality of openings (trenches where 156, 158 are formed, see figs. 7-8 and fig. 16) in a substrate ([0022], 103);
filling the plurality of openings (trenches where 156, 158 are formed, see figs. 7-8 and fig. 16) with an oxide material ([0075], 158 may be silicon oxide, [0039], 156 may be silicon oxide) to form a deep trench isolation (DTI) structure ([0027]-[0028], 156, 158) [];
forming [] over a first side of the substrate (top of 103, see fig. 4), a transfer gate ([0049], 402, see fig. 4);
forming [] a first oxide layer ([0070], 119) over the transfer gate (402) and the first side of the substrate (top of 103, see fig. 4);
connecting [] the transfer gate (402) to a conductive structure ([0029], upper 124, see fig. 4; [0073], relabeled as 602, see fig. 16) of a plurality of conductive structures ([0058], collection of 602, 604, 606, 608) [].
Sze doesn’t teach a deep trench isolation (DTI) structure that extends from a top most surface of the substrate to a bottom most surface of the substrate.
However, Kim (fig. 16) teaches a deep trench isolation (DTI) structure ([0057], 120) that extends from a top most surface of the substrate ([0168], 110b) to a bottom most surface of the substrate ([0168], 110a). Kim also teaches the DTI structure serves to separate the pixels ([0058]).
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to substitute the method of forming a DTI structure of Kim for the method of forming a DTI structure of Sze, since simple substitution of a method of forming a DTI structure for another is an appropriate rationale to support a rejection under 35 U.S.C. 103. KSR International Co. v. Teleflex Inc., 550 U.S. 398, 82 USPQ2d 1385 (2007).
Sze doesn’t explicitly teach forming, after forming the DTI structure and over a first side of the substrate, a transfer gate.
However, Kim (figs. 16-17) teaches forming, after forming the DTI structure ([0169], 120, see fig. 16) and over a first side of the substrate ([0172], 110b), a transfer gate ([0172], TR1, see fig. 17) while yielding the predictable result of forming a transfer gate and DTI structure.
Therefore, it would have been obvious to one of ordinary skill before the effective filing date of the claimed invention to form a transfer gate after forming a DTI structure since this limitation is one of a finite number of identified, predictable potential solutions. This is an appropriate rationale to support a rejection under 35 U.S.C. 103. KSR International Co. v. Teleflex Inc., 550 U.S. 398, 82 USPQ2d 1385 (2007).
Sze doesn’t explicitly teach forming, after forming the transfer gate, a first oxide layer over the transfer gate and the first side of the substrate and connecting, after forming the first oxide layer, the transfer gate to a conductive structure.
However, Chen (figs. 5-6) teaches forming, after forming the transfer gate ([0036], 309, see fig. 5), a first oxide layer ([0039], 106, see fig. 6) over the transfer gate (309) and the first side of the substrate ([0035], 402f, see fig. 5) and connecting, after ([0039], ILD layer 106 may first be formed and then etched to form trenches for metallization 108) forming the first oxide layer (106), the transfer gate (309) to a conductive structure ([0039], 108, see fig. 6) while yielding the predictable result of forming a transfer gate connected to external electrical features.
Therefore, it would have been obvious to one of ordinary skill before the effective filing date of the claimed invention to form an oxide layer after forming a transfer gate and to form conductive features after forming an oxide layer since this limitation is one of a finite number of identified, predictable potential solutions. This is an appropriate rationale to support a rejection under 35 U.S.C. 103. KSR International Co. v. Teleflex Inc., 550 U.S. 398, 82 USPQ2d 1385 (2007).
Sze doesn’t teach forming, after connecting the transfer gate to the conductive structure and over a second side of the substrate that is opposite from the second side, a grid structure, comprising portions of a second oxide layer and portions of a metal layer, surrounding a perimeter of the plurality of conductive structures, wherein sidewalls of the grid structure align with sidewalls of the DTI structure; and forming, after forming the grid structure, a dielectric layer, different from the second oxide layer and the metal layer, on a top surface, and the sidewalls, of the grid structure.
However, Kim (figs. 19-28) teaches forming, after connecting the transfer gate ([0172], TR1) to the conductive structure ([0174], 132) and over a second side of the substrate ([0168], 110a) that is opposite from the second side ([0168], 110b), a grid structure ([0188], 140, 150), comprising portions of a second oxide layer ([0117], portion of layer 141 from 140 positioned under 150, see fig. 7G) and portions of a metal layer (150), surrounding a perimeter (150 surrounds pixels, see fig. 14) of the plurality of conductive structures (132), wherein sidewalls of the grid structure (140, 150) align (150 aligns with 120, see fig. 28) with sidewalls of the DTI structure (120); and forming, after forming the grid structure (140, 150), a dielectric layer ([0194], 165), different ([0077], 141 may be silicon oxide for example, [0101], 165 may be aluminum oxide) from the second oxide layer (141 below 150) and the metal layer (150), on a top surface (formed on top of 150), and the sidewalls (may be formed on sidewalls of 150, see fig. 7B), of the grid structure (140, 150). Kim also teaches the grid structure may prevent ESD bruising ([0086]) and reduce crosstalk between unit pixels ([0144]).
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to combine the method of Sze to include the formation of a grid structure of Kim to prevent ESD bruising and reduce pixel crosstalk.
Regarding Claim 2, Kim (fig. 16) teaches the method of claim 1, wherein forming the plurality of openings ([0170], 120T) comprises: etching through the substrate ([0168], 110) from the top most surface of the substrate ([0170], etching process on 110b) to the bottom most surface of the substrate (110a).
Regarding Claim 3, Kim (fig. 16) teaches the method of claim 1, wherein forming the plurality of openings ([0170], 120T) comprises: etching through the substrate ([0168], 110) from the bottom most surface of the substrate ([0156], etching process on 110a) to the top most surface of the substrate (110b).
Regarding Claim 22, Kim (figs. 19-28) teaches the method of claim 1, further comprising: forming, over the second side of the substrate (110a), the second oxide layer (141 under 150), wherein the grid structure (140, 150) is formed after the second oxide layer (141 is first formed and then 150 is formed) is formed.
Claim 4 is rejected under 35 U.S.C. 103 as being unpatentable over Sze, Kim, and Chen as applied to Claim 1 above, and further in view of Kim (U.S. 2022/0173143 A1; hereinafter Kim2).
Regarding Claim 4, Sze doesn’t teach wherein forming the plurality of openings comprises: etching into a first portion of the substrate from the top surface of the substrate to form a first portion of the plurality of openings; and etching into a second portion of the substrate from the bottom surface of the substrate to form a second portion of the plurality of openings, wherein the second portion of the plurality of openings connects to the first portion of the plurality of openings; and wherein filling the plurality of openings comprises: filling the first portion of the plurality of openings with the oxide material prior to etching into the second portion of the substrate to form the second portion of the plurality of the openings; and filling the second portion of the plurality of openings with the oxide material after etching into the second portion of the substrate to form the second portion of the plurality of the openings.
However, Kim2 (see figs. 5A-F), in a similar method, teaches wherein
forming the plurality of openings ([0061]-[0063], 10, 22) comprises:
etching into a first portion of the substrate ([0077], portion of substrate 1 where opening 10 is formed, see fig. 5A) from the top surface of the substrate ([0053], 1a, fig. 5A is rotated by 180 degrees when compared to the claimed invention, so 1a can be interpreted to be a top surface) to form a first portion of the plurality of openings (10); and
etching into a second portion of the substrate (portion of substrate 1 where opening 22 is formed, see fig. 5B) from the bottom surface of the substrate ([0053], 1ab, fig. 5B is rotated by 180 degrees when compared to the claimed invention, so 1b can be interpreted to be a bottom surface) to form a second portion of the plurality of openings (22), wherein
the second portion of the plurality of openings (22) connects to the first portion of the plurality of openings (10, see fig. 5B); and wherein
filling the plurality of openings (10, 22) comprises: filling the first portion of the plurality of openings (10) with the oxide material ([0062]-[0064], 14 may be silicon oxide) prior to etching into the second portion of the substrate (14 is disposed before opening 22 is etched, see figs. 5A-B) to form the second portion of the plurality of the openings (22); and
filling the second portion of the plurality of openings (22) with the oxide material ([0062]-[0064], 24 may be silicon oxide) after etching into the second portion of the substrate (opening 22 is etched prior to disposing 24, see figs. 5B-C) to form the second portion of the plurality of the openings (22).
Kim2 also teaches that a two portion DTI structure may reduce process defects and increase a thickness of the substrate ([0072]). Furthermore, because the two portions of the DTI structure are in contact, crosstalk between adjacent pixels may be prevented.
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to combine the method of Sze to include the DTI structure of Kim2 to reduce process defects and prevent pixel crosstalk.
Claim 5 is rejected under 35 U.S.C. 103 as being unpatentable over Sze, Kim, and Chen as applied to Claim 1 above, and further in view of Ha (2021/0111202 A1; hereinafter Ha).
Regarding Claim 5, Sze (fig. 16) teaches the method of claim 1, further comprising: [] forming a second portion of the intermetal dielectric layer ([0029], 120, see fig. 15) []; forming, in the second portion (120), an absorption layer ([0029], [0038], 124 may comprise tantalum nitride, [0064] of applicant’s specification discloses tantalum nitride for an absorption layer) that connects to the plurality of interconnect structures (122); and forming, in the second portion (120), the plurality of conductive structures (602) on the absorption layer (124).
Sze doesn’t teach forming a first portion of an intermetal dielectric layer; forming, in the first portion, a plurality of interconnect structures.
However, Ha (fig. 4B) teaches forming a first portion of an intermetal dielectric layer ([0066], 420); forming, in the first portion (420), a plurality of interconnect structures ([0067], 451, 452); forming a second portion of the intermetal dielectric layer ([0066], 430) over the first portion (420). Ha teaches that the insulating layers can change as needed to accommodate for conductive features in a wiring layer ([0066]) while yielding the predictable results of electrically isolating conductive materials.
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to substitute the intermetal dielectric layer of Ha for the intermetal dielectric layer of Sze, since simple substitution of dielectric layers for another is an appropriate rationale to support a rejection under 35 U.S.C. 103. KSR International Co. v. Teleflex Inc., 550 U.S. 398, 82 USPQ2d 1385 (2007).
Claims 7 and 11-12 are rejected under 35 U.S.C. 103 as being unpatentable over Sze in view of Kim, Chen, and Kobayashi (2012/0199883 A1; hereinafter Kobayashi).
Regarding Claim 7, Sze (see fig. 16) teaches a method, comprising:
Forming a deep trench isolation (DTI) structure ([0027]-[0028], 156, 158) in a substrate ([0022], 103), wherein the DTI structure (156, 158) extends a full length of the substrate (103, see fig. 16);
Forming, between the DTI structure (156, 158) and in the substrate (103), one or more photodiodes ([0021], 110, 112) including a photodiode (110) [];
Forming, after forming the one or more photodiodes (110, 112), a transfer gate ([0049], 402, see fig. 4) that resides entirely over the substrate (103) and the photodiode (110);
Forming [] an oxide layer ([0070], 119) over the transfer gate (402) and on a top surface of the substrate (103); and
Connecting [] the photodiode (110) to a first conductive structure ([0058], 602) of a plurality of conductive structures ([0058], collection of 602, 604, 606, 608) [].
Sze doesn’t explicitly teach that the photodiode does not extend beyond the DTI structure.
However, Kim (see fig. 16) teaches the photodiode ([0168], PD) does not extend beyond the DTI structure ([0170], 120). Kim also teaches that the DTI structure serves to separate the pixels ([0058]).
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to substitute the method of forming a DTI structure of Kim for the method of forming a DTI structure of Sze, since simple substitution of a method of forming a DTI structure for another is an appropriate rationale to support a rejection under 35 U.S.C. 103. KSR International Co. v. Teleflex Inc., 550 U.S. 398, 82 USPQ2d 1385 (2007).
Sze doesn’t teach that the photodiode comprises a p-type region and a plurality of n-type regions, wherein the p-type region resides over each of the plurality of n-type regions.
Kobayashi (fig. 5A) teaches that the photodiode ([0029], photoelectric conversion unit) comprises a p-type region ([0050], 107) and a plurality of n-type regions ([0084], 101, 501), wherein the p-type region (107) resides over each of the plurality of n-type regions (101, 501). Kobayashi also teaches that by having different N-type regions at different depths can increase sensitivity ([0088]).
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to combine the method of Sze to include the photodiode of Kobayashi to increase sensitivity.
Sze doesn’t explicitly teach forming, after forming the transfer gate, an oxide layer over the transfer gate and on a top surface of the substrate and connecting, after forming the oxide layer, the photodiode to a first conductive structure.
However, Chen (figs. 5-6) teaches forming, after forming the transfer gate ([0036], 309, see fig. 5), an oxide layer ([0039], 106, see fig. 6) over the transfer gate (309) and on a top surface of the substrate ([0035], 402f, see fig. 5) and connecting, after ([0039], ILD layer 106 may first be formed and then etched to form trenches for metallization 108) forming the oxide layer (106), the photodiode ([0027], [0033], 302 connects to 108 through 309) to a first conductive structure ([0039], 108, see fig. 6) while yielding the predictable result of forming a transfer gate and photodiode connected to external electrical features.
Therefore, it would have been obvious to one of ordinary skill before the effective filing date of the claimed invention to form an oxide layer after forming a transfer gate and to form conductive features after forming an oxide layer since this limitation is one of a finite number of identified, predictable potential solutions. This is an appropriate rationale to support a rejection under 35 U.S.C. 103. KSR International Co. v. Teleflex Inc., 550 U.S. 398, 82 USPQ2d 1385 (2007).
Sze doesn’t teach forming, after connecting the photodiode to the first conductive structure and over a second side of the substrate that is opposite from the second side, a grid structure, comprising portions of a second oxide layer and portions of a metal layer, surrounding a perimeter of the plurality of conductive structures, wherein sidewalls of the grid structure align with sidewalls of the DTI structure; and forming a dielectric layer, different from the second oxide layer and the metal layer, on a top surface, and the sidewalls, of the grid structure.
However, Kim (figs. 19-28) teaches forming, after connecting the photodiode ([0172], [0173], PD connects to 132 through TR1) to the first conductive structure ([0174], 132) and over a second side of the substrate ([0168], 110a) that is opposite from the second side ([0168], 110b), a grid structure ([0188], 140, 150), comprising portions of a second oxide layer ([0117], portion of layer 141 from 140 positioned under 150, see fig. 7G) and portions of a metal layer (150), surrounding a perimeter (150 surrounds pixels, see fig. 14) of the plurality of conductive structures (132), wherein sidewalls of the grid structure (140, 150) align (150 aligns with 120, see fig. 28) with sidewalls of the DTI structure (120); and forming a dielectric layer ([0194], 165), different ([0077], 141 may be silicon oxide for example, [0101], 165 may be aluminum oxide) from the second oxide layer (141 below 150) and the metal layer (150), on a top surface (formed on top of 150), and the sidewalls (may be formed on sidewalls of 150, see fig. 7B), of the grid structure (140, 150). Kim also teaches the grid structure may prevent ESD bruising ([0086]) and reduce crosstalk between unit pixels ([0144]).
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to combine the method of Sze to include the formation of a grid structure of Kim to prevent ESD bruising and reduce pixel crosstalk.
Regarding Claim 11, Sze (fig. 16) teaches the method of claim 7, further comprising: forming, in the substrate (103), a drain region ([0028], [0035], [0045], 140 is doped N-type and connected to a drain); and connecting a second conductive structure (a second 602, see fig. 16), of the plurality of conductive structures (602, 604, 606, 608), to the drain region (140).
Regarding Claim 12, Sze (fig.16) teaches the method of claim 7, further comprising: connecting a second conductive structure (604, see fig. 16), of the plurality of conductive structures (602, 604, 606, 608), to the transfer gate (402).
Claims 8-9 are rejected under 35 U.S.C. 103 as being unpatentable over Sze, Kim, Chen, and Kobayashi as applied to Claim 7 above, and further in view of Ha.
Regarding Claim 8, Sze (fig. 16) teaches the method of claim 7, wherein connecting the photodiode (110) to the first conductive structure (602) comprises: forming an intermetal dielectric layer ([0029], 120, see fig. 15); forming [] an interconnect structure ([0029], 122) that connects to the photodiode (110); and connecting, in the intermetal dielectric layer (120), the first conductive structure (602) to the interconnect structure (122).
Sze doesn’t teach forming, in the intermetal dielectric layer; an interconnect structure.
However, Ha (fig. 4B) teaches forming, in the intermetal dielectric layer ([0066], 420); an interconnect structure ([0067], 451, 452). Ha teaches that the insulating layers can change as needed to accommodate for conductive features in a wiring layer ([0066]) while yielding the predictable results of electrically isolating conductive materials.
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to substitute the intermetal dielectric layer of Ha for the intermetal dielectric layer of Sze, since simple substitution of dielectric layers for another is an appropriate rationale to support a rejection under 35 U.S.C. 103. KSR International Co. v. Teleflex Inc., 550 U.S. 398, 82 USPQ2d 1385 (2007).
Regarding Claim 9, Sze (fig. 16) teaches the method of claim 8, wherein connecting the first conductive structure (602) to the interconnect structure (122) comprises: forming, in the intermetal dielectric layer (120), an absorption layer ([0029], 124 may comprise tantalum nitride) on the interconnect structure (122); and forming, in the intermetal dielectric layer (120), the first conductive structure (602) over (fig. 16 is rotated by 180 degrees when compared to the claimed invention, so 602 can be interpreted to be over 124) the absorption layer (124).
Claims 13-14 and 20 are rejected under 35 U.S.C. 103 as being unpatentable over Sze in view of Kim.
Regarding Claim 13, Sze (see fig. 16) teaches a method, comprising:
forming a deep trench isolation (DTI) structure ([0027]-[0028], 156, 158) in a substrate ([0022], 103) [];
forming, in the substrate (103), a photodiode ([0021], 110) [];
forming a first dielectric layer ([0029], 119, 120, see fig. 15) over (fig. 16 is rotated by 180 degrees when compared to the claimed invention, so 119 and 120 can be interpreted to be over the bottom surface of the substrate 103) the top most surface (bottom surface of 103, see fig. 16) of the substrate (103); and
forming, in the first dielectric layer (119, 120) and between the DTI structure (156, 158), a plurality of conductive structures ([0056], 602).
Sze doesn’t teach a deep trench isolation (DTI) structure that extends from a top most surface of the substrate to a bottom most surface of the substrate and that the photodiode does not extend beyond the DTI structure.
However, Kim (fig. 16) teaches a deep trench isolation (DTI) structure ([0057], 120) that extends from a top most surface of the substrate ([0168], 110b) to a bottom most surface of the substrate ([0168], 110a) and that the photodiode ([0168], PD) does not extend beyond the DTI structure ([0170], 120). Kim also teaches the DTI structure serves to separate the pixels ([0058]).
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to substitute the method of forming a DTI structure of Kim for the method of forming a DTI structure of Sze, since simple substitution of a method of forming a DTI structure for another is an appropriate rationale to support a rejection under 35 U.S.C. 103. KSR International Co. v. Teleflex Inc., 550 U.S. 398, 82 USPQ2d 1385 (2007).
Sze doesn’t teach forming an oxide layer over the bottom most surface of the substrate; forming a metal layer over the oxide layer; removing first portions of the oxide layer and first portions of the metal layer to form a grid structure comprising second portions of the oxide layer and second portions of the metal layer, wherein sidewalls of the grid structure align with sidewalls of the DTI structure; and forming a second dielectric layer over, different from the oxide layer and the metal layer, on a top surface, and the sidewalls, of the grid structure.
However, Kim (figs. 19-28) teaches forming an oxide layer ([0188], 140) over the bottom most surface of the substrate ([0168], 110a); forming a metal layer ([0188], 150) over the oxide layer (140); removing first portions of the oxide layer (portions of 142, 143, 144, 145 removed for 150, see fig. 7G) and first portions of the metal layer (portions of 150 removed above pixels, see figs. 24 and 26) to form a grid structure (140, 150), comprising second portions of the oxide layer ([0117], portion of layer 141 from 140 positioned under 150, see fig. 7G) and second portions of a metal layer (150), wherein sidewalls of the grid structure (140, 150) align (150 aligns with 120, see fig. 28) with sidewalls of the DTI structure (120); and forming a second dielectric layer ([0194], 165), different ([0077], 141 may be silicon oxide for example, [0101], 165 may be aluminum oxide) from the oxide layer (140) and the metal layer (150), on a top surface (formed on top of 150), and the sidewalls (may be formed on sidewalls of 150, see fig. 7B), of the grid structure (140, 150). Kim also teaches the grid structure may prevent ESD bruising ([0086]) and reduce crosstalk between unit pixels ([0144]).
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to combine the method of Sze to include the formation of a grid structure of Kim to prevent ESD bruising and reduce pixel crosstalk.
Regarding Claim 14, Kim (fig. 8) teaches the method of claim 13, wherein the DTI structure (120) is at least partially tapered ([0150]) from top most surface of the substrate (110b) to the bottom most surface of the substrate (110a).
Regarding Claim 20, Sze (fig. 16) teaches the method of claim 15, further comprising: forming a color filter ([0026], 106) over the second dielectric layer ([0027], 160). Sze doesn’t teach forming a micro-lens layer over the color filter layer.
However, Kim (fig. 4) teaches forming a micro-lens layer ([0102], 180) over the color filter layer ([0100], 170). Kim also teaches the microlenses help concentrate incident light onto the photodiode ([0103]).
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to combine the method of Sze to include the microlens of Kim to help concentrate incident light.
Claims 15-17 are rejected under 35 U.S.C. 103 as being unpatentable over Sze and Kim as applied to Claim 13 above, and further in view of Kim2.
Regarding Claim 15, Sze doesn’t teach the method of claim 13, wherein forming the DTI structure in the substrate comprises: forming a first portion of the DTI structure in a first portion of the substrate; and forming a second portion of the DTI structure in a second portion of the substrate.
However, Kim2 (see figs. 5A-F), in a similar method, teaches forming the DTI structure ([0061]-[0063], 20, 30) in the substrate ([0077], 1) comprises: forming a first portion of the DTI structure (20) in a first portion of the substrate ([0053], the side of substrate 1 where 20 is formed, see fig. 5A); and forming a second portion of the DTI structure (30) in a second portion of the substrate ([0053], the side of substrate 1 where 30 is formed, see fig. 5D). Kim2 also teaches that a two portion DTI structure may reduce process defects and increase a thickness of the substrate ([0072]).
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to combine the method of Sze to include the DTI structure of Kim2 to reduce process defects.
Regarding Claim 16, Kim2 (see figs. 5A-F) teaches the method of claim 15, wherein the first portion of the DTI structure (20) is tapered in a first direction (see fig. 5F), and wherein the second portion of the DTI structure (30) is tapered in a second direction (see fig. 5F) opposite from the first direction.
Regarding Claim 17, Kim2 (see figs. 5A-F) teaches the method of claim 15, wherein the second portion of DTI structure (30) is formed after the first portion of the DTI structure (20), the photodiode ([0047], PD), and the plurality of conductive structures ([0060], 15, 17) are formed.
Claim 21 is rejected under 35 U.S.C. 103 as being unpatentable over Sze and Kim as applied to Claim 13 above, and further in view of Kobayashi.
Regarding Claim 21, Sze doesn’t teach the method of claim 13, wherein the photodiode comprises a p-type region and a plurality of n-type regions.
However, Kobayashi (fig. 5A) teaches that the photodiode ([0029], photoelectric conversion unit) comprises a p-type region ([0050], 107) and a plurality of n-type regions ([0084], 101, 501). Kobayashi also teaches that by having different N-type regions at different depths can increase sensitivity ([0088]).
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to combine the method of Sze to include the photodiode of Kobayashi to increase sensitivity.
Claim 23 is rejected under 35 U.S.C. 103 as being unpatentable over Sze, Kim, Chen, and Kobayashi as applied to Claim 7 above, and further in view of Mun et al. (10811453 B1; hereinafter Mun).
Regarding Claim 23, Sze doesn’t teach the method of claim 7, further comprising: forming, over the second side of the substrate, the second oxide layer, wherein the portions of the second oxide layer are first portions of the second oxide layer, wherein the first portions of the second oxide layer are a greater distance from the second side of the substrate than second portions of the second oxide layer.
However, Mun (fig. 4) teaches forming, over the second side of the substrate (Col. 6, Line 43; top of 50), the second oxide layer (Col. 6, Line 34; 28), wherein the portions of the second oxide layer (Col. 6, Line 33; portions of 28 under pillars 80) are first portions of the second oxide layer (28 under 80), wherein the first portions of the second oxide layer (28 under 80) are a greater distance from the second side of the substrate (top of 50) than second portions of the second oxide layer (Col. 6, Line 67; portions of 28 under 24b). Mun also teaches that this structure allows the color filters to be embedded into the second oxide layer and that the height of the microlenses above may be controlled as needed (Col. 11, Lines 4-23).
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to combine the method of Sze to include second oxide layer structure of Mun to embed color filters and adjust microlens height.
Claim 24 is rejected under 35 U.S.C. 103 as being unpatentable over Sze and Kim as applied to Claim 13 above, and further in view of Mun.
Regarding Claim 24, Sze doesn’t teach the method of claim 13, wherein after removing the first portions of the oxide layer and first portions of the metal layer, the second portions and third portions of the oxide layer remain, wherein the second portions of the oxide layer are a greater distance from the second side of the substrate than third portions of the oxide layer.
However, Mun (fig. 8D) teaches after removing the first portions of the oxide layer (Col. 10, Lines 27 and 66; portion of 28a removed for opening 812) and first portions of the metal layer (Col. 10, Line 66; 80 removed for opening 812), the second portions (portions of 28a under 80) and third portions of the oxide layer (portions of 28a under 24b) remain, wherein the second portions of the oxide layer (28a under 80) are a greater distance (see fig. 8D) from the second side of the substrate (Col. 6, Line 43; top of 50) than third portions of the oxide layer (28a under 24b). Mun also teaches that this structure allows the color filters to be embedded into the second oxide layer and that the height of the microlenses above may be controlled as needed (Col. 11, Lines 4-23).
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to combine the method of Sze to include second oxide layer structure of Mun to embed color filters and adjust microlens height.
Conclusion
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/A.H./
Examiner, Art Unit 2817
/Kretelia Graham/Supervisory Patent Examiner, Art Unit 2817 January 21, 2026