Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Response to Amendment
This Office Action is in response to Applicant’s Amendment filed 4/14/2026. Claims 1,3-4, 6-7, 9-12, 15, and 21-22 are amended. The Examiner notes that the claims 1-16 and 20-24 are examined.
Claim Rejections - 35 USC § 112
Claim 22 is rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention. In the present case, the language “. . . an average roughness Ra of the top surface of the copper pillar is between about 130 µm and 130 µm” is indefinite because a range requires a lesser starting value and a greater ending value.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 1-2, 4, 6, and 10 is/are rejected under 35 U.S.C. 103 as being obvious over Lin (US 20210104478) in view of Banik (WO 2020123322 A2) and Chen (US 20230040128 A1).
With respect to claim 1, the following is a quote from Lin:
"as shown in FIG. 1, the semiconductor apparatus 10 includes a semiconductor substrate 12, a first passivation layer (PASV) 14, a second passivation layer (re passivation layer, Re-PASV) 16, an under bump metal (UBM) layer 18, a stress buffer layer 20, a copper pillar 22 and a solder structure 24. The semiconductor substrate 12 has at least one metal pad 26 thereon. The semiconductor substrate 12 may be a silicon wafer or a layer of silicon-containing material, and integrated circuits may be formed therein or thereon."
The examiner notes that that the metal pads 26 correspond to metal features in dielectric layers. Paragraph 0011 states “ In one embodiment, the contact region 12 is a metal pad region 12, which may be used in the bonding process to connect the integrated circuits in the respective chip to external features.” The examiner notes that the external connections mentioned above are achieved via the copper pillar structure
Lin does not teach a UBM layer that comprises a copper-containing seed layer or that at least 90% of the copper pillar exhibits a (111) copper orientation in a cross section extending through the first copper pillar, and a solder cap.
Banik teaches, in paragraph 0061:
“In some implementations, the highly-oriented base layer is a copper seed layer having a plurality of <1 1 1> crystal grain structures . . . when depositing on a highly-oriented base layer such as a diffusion barrier layer with columnar grain structures or a copper seed layer with <1 1 1> crystal grain structures, nanotwinned copper structures may be deposited using an electroplating solution that contains accelerators.”
The examiner notes that this teaches the deposition of highly (111) oriented copper structures on highly (111) oriented copper seed layers.
Banik does not teach a copper pillar wherein at least 90% of the copper pillar exhibits a (111) copper orientation in a cross section extending through the copper pillar and a solder cap.
Chen teaches, in paragraph 0022, a nano-twinned copper bump (see paragraph 0021) in which “almost all the volume (97% or more of the volume) of the nano-twinned copper pillar are formed by columnar twinned grains connecting with each other . . . the twinned grains are formed by staking nano-twins along a [111] crystal axis, an angle included between the [111] crystal axes of two adjacent nano-twinned grains is about 0 degree, and the twin boundaries of the nano-twins are substantially parallel to the surface of the substrate” (paragraph 0059). The examiner notes that the orientation (111) orientation being “perpendicular to the substrate” corresponds to a plane along the copper pillar and the soldering bump of the device taught by Lin.
It would have been obvious to one having ordinary skill in the art to modify the packaging structure taught by Lin such that the UBM layer comprises a copper seed layer as taught by Banik and such that 90% of the copper pillar exhibits (111) crystal orientation when measured from a cross-section extending though the first copper pillar and the first solder cap, as taught by Chen. One having ordinary skill in the art is motivated to include the seed layer in order to enable the use of accelerators when depositing the (111) oriented copper pillar (Banik, bottom of paragraph 0061) and to include the (111) orientation in order to avoid election scattering, reducing resistance in the pillar (Chen, paragraph 004).
Regarding claim 2, Lin further teaches, in FIG. 1, that the first metal pillar comprises a substantially planar top surface.
Regarding claim 4, although Lin doesn't teach a second copper pillar, one having ordinary skill in the art is apprised of the fact that copper pillars are employed in the plural. Therefore it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have a second copper pillar (along with a second contact pad, second UBM layer, and a second solder cap on the second metal pillar) in the packaging structure taught by Lin. Additionally, the examiner notes that, for any two of the copper pillars taught by Lin, one of the copper pillars will have a lesser (111) copper crystal orientation along a plain extending through the copper pillars than the other, due to natural manufacturing variance.
Regarding claim 10, as explained above, Chen teaches a (111) copper crystal orientation of 75-99% along a cross section of a copper bump.
It would have been obvious to one of ordinary skill in the art to further modify the copper pillar taught by Lin such that the at least 97% of the copper exhibits (111) copper crystal orientation, as taught by Chen. One having ordinary skill in the art is motivated to do so for the reasons taught Chen above.
Claim(s) 3 is/are rejected under 35 U.S.C. 103 as being unpatentable over Lin (US 20210104478 A1) in view of Banik (WO 2020123322 A2) and Chen (US 20230040128 A1) in further view of Rokugawa (US 20160005685 A1).
As explained above, Lin, Banik, and Chen teach the limitations of claim 2. They do not teach that an average roughness Ra of a metal pillar is between about 30 and 130 micrometers.
Rokugawa teaches a metal pillar wherein "metal post is formed from, for example, copper (Cu)” (paragraph 0026). Additionally, "the surfaces of the wiring layer 25a and the metal posts 27 have a roughness indicated by a surface roughness Ra value that is in the range of, for example, 100 to 500 µm . . . " (paragraph 0050). Further, this structure is connected to a solder bump: "Each pad 60b is connected to the corresponding metal post 27 of the wiring substrate 10 by the solder" (paragraph 0050). Furthermore, the "wiring layer 25a" is shown in FIG. 3A to be in contact with the copper pillar ("metal post"); the "wiring layer" can therefore be interpreted to be a contact pad. The copper pillar ("metal post") of FIG. 3A is also shown to have a planar top surface.
It would have been obvious to one having ordinary skill in the art to further modify the device taught by Lin such that the top surface of the copper pillar has an average roughness Ra between 30 and 130 micrometers, as taught by Rokugawa. One have ordinary skill in the art is motivated to do so in order to, for example, strengthen the bonding and electrical coupling between the copper pillar and the solder (as roughening the surface to this value increases surface area of contact).
Claim(s) 5 is/are rejected under 35 U.S.C. 103 as being obvious over Lin (US 20210104478) in view of Banik (WO 2020123322 A2) and Chen (US 20230040128 A1 in further view of Takeuchi (US 20190304942 A1).
Regarding claim 5, as explained above, Lin, Banik, and Chen teach the limitations of claim 4. They do not teach a copper pillar with a convex upper surface.
Takeuchi teaches, in FIG. 6B, copper pillars 210 wherein “surface of the first posts 211 is convex” (paragraph 0034).
It would have been obvious to one having ordinary skill in the art to further modify the copper pillars taught by Lin such that the second metal pillar comprises a convex top surface. One having ordinary skill in the art is motivated to construct the second copper pillar with a convex upper surface in order to, for example, increase the electrical coupling between the copper pillar and the solder thereupon, in order to offset the increased resistance of the second pillar due to its lower (111) copper crystal orientation (see above).
Claim(s) 6 is/are rejected under 35 U.S.C. 103 as being obvious over Lin (US 20210104478) in view of Banik (WO 2020123322 A2) and Chen (US 20230040128 A1) as evidenced by Bergman (WO 2023027917 A1).
As explained above, Lin, Banik, and Chen teach the limitations of claim 4.
Bergman teaches that "contact surfaces formed from electroplated NTCu can also be characterized by a high average surface roughness" (paragraph 0023). The examiner notes that this establishes a link between the percentage of (111) orientation in a nano-twinned copper structure and the roughness of the top surface of the copper pillar taught by Lin, meaning that the copper pillar with a lesser (111) copper orientation inherently has a lesser average roughness.
It results naturally from the combination that the second copper pillar – which has a lesser (111) orientation – exhibits a lesser average roughness Ra than the first copper pillar – which has a greater (111) orientation – as evidenced by Bergman above.
Claim(s) 7 is/are rejected under 35 U.S.C. 103 as being obvious over Lin (US 20210104478) in view of Banik (WO 2020123322 A2) and Chen (US 20230040128 A1) in further view of Chuang (US 20130026622 A1) as evidenced by Bergman (WO 2023027917 A1).
Regarding claim 7, as explained above, Lin, Banik, and Chen (as evidenced by Bergman), teach the limitations of claim 6. They do not teach a ratio of distances between the solder caps and UBM layers of the packaging structure.
Chuang teaches, in FIG. 6 “metal bump structures” (in pillar shape_ with a distance between the centers thereof at a first distance (called pitch, P) and a width of a UBM layer (called WUBM). Paragraph 0029 teaches “The first bump structure has a first under-bump metallization (UBM) layer with a second width . . . In some embodiments, a ratio between the second width and the bump pitch is presented by: second width=(0.65.about.0.8)*bump pitch.” The examiner notes that the distance between UBM layers is equivalent to the pitch minus the width of the UBM layer (D----2 = P – 2 * (½ * WUBM), D1 = P). Therefore, Chuang teaches a ratio of the distances between the tops of the bumps and the UBM layers to be between 0.65 to 0.8 (D----2 = P – 2 * [ ½ * (P – (0.65 to 0.8) * P)], D1 = P). The examiner notes that the distances between the solder caps of Lin correspond to the pitch between the metal bump structures taught by Chuang (as the solder caps of Lin are on top of the copper pillars.
It would have been obvious to one having ordinary skill in the art to further modify the packaging device taught by Lin such that the ratio of the distance between the first and second solder bumps and the distance between the first and second UBM layers is between 0.5 and 0.8, as taught by Chuang. One having ordinary skill in the art is motivated to do so in order to, for example, ensure that the UBM layers are wide enough to ensure the reliability of copper pillar deposition thereon (that is, to ensure that the copper pillar is deposited on the UBM layer) while simultaneously ensuring that there is no electrical short between adjacent copper pillars.
Claim(s) 8-9 is/are rejected under 35 U.S.C. 103 as being obvious over Lin (US 20210104478
A1) view of Banik (WO 2020123322 A2) and Chen (US 20230040128 A1) in further view of C. Lin (US 20120049346 A1).
Regarding claim 8, as explained above, Lin, Banik, and Chen teach the limitations of claim 1. They do not teach a copper pillar having a lower sidewall surface forming an obtuse angle with an upper sidewall surface.
C. Lin teaches, in FIG. 1, a copper pilar having a lower sidewall surface and an upper sidewall
surface wherein the lower sidewall surface and upper sidewall surface form an obtuse angle.
It would have been obvious to one of ordinary skill in the art to modify the packaging structure taught by Lin such that the first metal pillar comprises a lower sidewall surface which forms an obtuse angle with an upper sidewall surface, as taught by C. Lin. One having ordinary skill in the art is motivated to do so in order to reduce the normalized stress applied to the substrate compared to a vertical copper pillar structure (C. Lin, FIG. 8).
With respect to claim 9, C. Lin further teaches, in FIGs. 1 and 5, that the lower sidewall surface is tilted with respect to a topmost surface of a UBM layer (see FIG. 5, “barrier layer” 81 and “seed layer” 83 “form a UBM layer”, see paragraph 0025). Further, an angle between the lower sidewall surface and the topmost surface of the UBM layer is an acute angle.
It would have been obvious to one having ordinary skill in the art to further modify the semiconductor device taught by Lin such that the pillar structure has a lower sidewall surface which is tilted with respect to and forms an acute angle with a topmost surface of a UBM layer. One having ordinary skill in the art is motivated to do so in order to garner the benefits of such a structure as taught by C. Lin above.
Claim(s) 11 is/are rejected under 35 U.S.C. 103 as being obvious over Lin (US 20210104478) in view of Chen (US 20230040128 A1) as evidenced by Bergman (WO 2023027917 A1).
Regarding claim 11, as explained above, Lin teaches a semiconductor structure comprising a first metal feature and a second metal feature in a dielectric layer, a passivation structure over the dielectric layer, a first contact pad over the passivation structure and electrically coupled to the first metal feature, and a first copper pillar over and electrically coupled to the first contact pad. As explained above, although Lin does not explicitly teach a second copper pillar structure, one having ordinary skill in the art understands that copper pillar structures are employed in the plural (along with a second contact pad, and UBM structure).
Lin does not explicitly teach a metal pillar with a (111) copper orientation or a rough upper surface.
As explained above, Chen teaches a metal bump structure with a (111) copper crystal orientations along a cross section extending vertically through the metal bump (orthogonal to the substrate). The examiner notes that, because copper exhibits a cubic crystal structure, a horizontal cross section (such as a plane that is parallel to the substrate) of the copper pillar – one that intersects both a first and a second metal pillar – will exhibit the same miller index crystal orientation of the copper crystal, as doing so amounts to a 90 degree rotation of the cubic structure, in which the exhibited crystal structure is identical.
As explained above, Bergman establishes a link between (111) copper crystal grains and surface roughness. The examiner notes that it is therefore inherent that a high (111) copper crystal-containing first copper pillar has a rough upper surface.
It would have been obvious to one having ordinary skill in the art to modify the copper pillar taught by Lin above such that it comprises a (111) copper crystal orientation when measured through a cross-section extending through the pilar for the reasons stated by Chen above, and to add a second (111) copper pillar structure (along with a second contact pad and UBM) to the device taught by Lin for the reasons stated above. Additionally, it results naturally from the facts stated above that one of these copper pillar structures will contain a greater (111) copper crystal orientation when measured from a cross section extending through the first and second copper pillars for the reasons stated above, additionally, the top surface of the first copper pillar has an inherent roughness, as evidenced by Bergman.
Regarding claim 15, as explained above, Bergman establishes a link between (111) copper crystal orientation and top surface roughness in a copper bump.
It follows naturally that the second metal pillar – with a lesser (111) copper crystal orientation than the first copper pillar – has a lesser average roughness Ra than the first copper pillar as evidenced by Bergman.
Claim(s) 12 is/are rejected under 35 U.S.C. 103 as being obvious over Lin (US 20210104478) in view of Chen (US 20230040128 A1) in further view of Rokugawa (US 20160005685 A1).
Regarding claim 12, Rokugawa further teaches "the surfaces of the wiring layer 25a and the metal posts 27 have a roughness indicated by a surface roughness Ra value that is in the range of, for example, 100 to 500 µm (e.g., 350 µm)" (paragraph 0050).
It would have been obvious to one having ordinary skill in the art to further modify the device taught by Lin such that the top surface of the first conductive pillar has an average roughness Ra between 30 and 130 micrometers, as taught by Rokugawa. One having ordinary skill in the art is motivated to do so in order to, for example, increase the electrical coupling and bonding strength between the copper pillar and the solder cap.
Claim(s) 13-14 is/are rejected under 35 U.S.C. 103 as being obvious over Lin (US 20210104478) in view of Chen (US 20230040128 A1) in further view of C. Lin (US 20210104478 A1).
Regarding claim 13, as explained above, Lin and Chen teach the limitations of claim 11. They do not teach an explicit average roughness of a top surface of a copper pillar.
C. Lin teaches, in FIG. 1, a bottom width that is wider than a top width of a copper pillar.
It would have been obvious to one of ordinary skill in the art to modify the device taught by Lin such that the top surface of the first copper pillar is of a lesser width than a bottom surface of the copper pillar, as taught by C. Lin. One having ordinary skill in the art it motivated to do so in order to garner the benefits taught by C. Lin in FIG. 8 (see above).
Regarding claim 14, Lin teaches, in FIG. 1, that the first copper pillar is an integral structure.
Lin does not teach that the copper pillar has a lower portion with a non-uniform width.
C. Lin further teaches the aforementioned copper pillar structure having an upper portion with uniform width and a lower portion having non-uniform width bottom to top.
It would have been obvious to one having ordinary skill in the art to modify the semiconductor structure taught by Lin such that the first copper pillar has an upper portion having a uniform width bottom to top and a lower portion having a non-uniform width bottom to top. One having ordinary skill in the art is motivated to do so in order to garner the benefits taught by C. Lin above.
Claim(s) 16 is/are rejected under 35 U.S.C. 103 as being obvious over Lin (US 20210104478) in view of Chen (US 20230040128 A1) in further view of Takeuchi (US 20190304942 A1).
Regarding claim 16, as explained above, Lin and Chen teach the limitations of claim 11. They do not teach a copper pillar with a convex upper surface.
Takeuchi teaches, in FIG. 6B, copper pillars 210 wherein “surface of the first posts 211 is convex” (paragraph 0034)
It would have been obvious to one having ordinary skill in the art to modify the second copper pillar taught by Lin such that it has a convex upper surface, as taught by Takeuchi. One having ordinary skill in the art is motivated to do so in order to, for example, increase the surface area on the top of the copper pillar in order to increase the electrical coupling and bonding strength on the soldier cap.
Claim(s) 21 and 23-24 is/are rejected under 35 U.S.C. 103 as being obvious over C. Lin (US 20210104478 A1) in view of Chen (US 20230040128 A1).
Regarding claim 21, C. Lin teaches, in FIG. 5, a semiconductor structure with a “terminal” (contact pad) formed over substrate 77; under-bump metallization is formed from barrier layer 81 and seed layer 83 (“Together the barrier layer 81 and the seed layer 83 form the UBM layer for the pillar,” paragraph 0025) and is formed over the contact pad and is electrically coupled thereto, and a copper pillar 91 is formed thereover. FIG. 1 shows a pillar shape 61 with a lower portion 66 (which will be surrounded by the UBM layer, see FIG. 5), a middle portion 65 over the lower portion which has a width that gradually decreases along a direction from the bottom towards a top surface of the metal pillar which has an edge that will align with an edge of the UBM layer (see FIG. 5), and an upper portion (unlabeled, the portion above middle portion 65) which is over the middle portion.
C. Lin does not teach a (111) copper crystal orientation of the copper pillar of at least 90% when measured from a cross-section extending through the metal pillar and UBM layer.
Chen teaches, in paragraph 0022, a nano-twinned copper bump (see paragraph 0021) in which “almost all the volume (97% or more of the volume) of the nano-twinned copper pillar are formed by columnar twinned grains connecting with each other . . . the twinned grains are formed by staking nano-twins along a [111] crystal axis, an angle included between the [111] crystal axes of two adjacent nano-twinned grains is about 0 degrees, and the twin boundaries of the nano-twins are substantially parallel to the surface of the substrate” (paragraph 0059). The examiner notes that the orientation (111) orientation being “perpendicular to the substrate” corresponds to a plane along the copper pillar and the UBM layer of the device taught by C. Lin.
It would have been obvious to one having ordinary skill in the art to modify the device and pillar shape taught by C. Lin such that the copper pillar comprises at least 90% (111) copper crystal orientation when measured from a cross-section extending through the metal pillar and the UBM layer, as taught by Chen. One having ordinary skill in the art is motivated to do so in order to reduce the resistance in the pillar (Chen, paragraph 004).
Regarding claim 23, C. Lin further teaches, in FIG. 1, that the upper portion of the pillar shape has a substantially uniform width.
Regarding claim 24, C. Lin further teaches, in FIG. 5, a “solder layer” (solder cap) 95 formed on the copper pillar. FIG. 1 shows that the bottom surface of the pillar shape is substantially planar.
Claim(s) 22 is/are rejected under 35 U.S.C. 103 as being obvious over C. Lin (US 20210104478 A1) in view of Chen (US 20230040128 A1) in further view of Rokugawa (US 20160005685 A1).
Regarding claim 22, as explained above, C. Lin and Chen teach the limitations of claim 21. C. Lin additionally teaches, in FIG. 1, that the top surface of the pillar shape is substantially planar. C. Lin and Chen do not teach that the top surface of a copper pillar has an average surface roughness Ra of between about 130 and 130 micrometers.
As explained above, Rokugawa teaches copper pillar with a top surface roughness of 100 to 500 µm.
It would have been obvious to one having ordinary skill in the art to further modify the device taught by C. Lin such that the copper pillar comprises an average surface roughness of about 130 micrometers, as taught by Rokugawa. One having ordinary skill in the art is motivated to do so in order to, for example, increase the surface area shared between, and therefore the electrical coupling and bonding strength of, the copper pillar and a bonded material, such as an external I/O or solder cap.
Response to Arguments
Applicant’s amendments to overcome previous claim objections to claims 3, 12, and 22 due to informalities are acknowledged and accepted.
Applicant’s amendments to overcome previous rejections for claims 1-12, 12, 15, and 22 under 35 U.S.C. § 112(b) are acknowledged and accepted. As explained above, a new grounds of rejection under 35 U.S.C. § 112(b) for claim 22 is presented based on the Applicant’s amendment.
Applicant’s arguments with respect to independent claim(s) 1, 11, and 21 (and thereby dependent claims 2-10, 12-16, and 21-24) have been considered but are moot because the new ground of rejection does not rely on any reference applied in the prior rejection of record for any teaching or matter specifically challenged in the argument.
Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to GABRIEL S MINNEY whose telephone number is (571)272-9688. The examiner can normally be reached Monday Friday, 8:30 a.m. 5 p.m. ET..
Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Jacob Choi can be reached at (469) 295-9060. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/G.S.M./ Examiner, Art Unit 2897
/JACOB Y CHOI/ Supervisory Patent Examiner, Art Unit 2897
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