DETAILED ACTION
This office action is in response to the election and amendment filed 12/3/2025.
Currently, claims 1-2, 4-17 and 21-24 are pending. Claims 3 and 18-20 have been canceled. Claim 11 has been withdrawn from consideration.
Election/Restrictions
Applicant's election with traverse of Group I, Species Ia is acknowledged. The traversal is on the ground(s) that there is not a serious search/examination burden to consider all species. This is not found persuasive because the examination of the elected species required more time than allotted by the office, and did not reveal prior art that reads on the non-elected species. In order to consider the non-elected species, further search and examination would be required.
The requirement is still deemed proper and is therefore made FINAL.
Claim Objections
Claim 7 is objected to because it is inconsistent in its use of tense – “the etch stop layer being …”, “the portion of the first conductive line at the first region is …”, “the patterned dielectric layer being …” Appropriate correction is required.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claims 1-2, 8-10, 14, 21-22 and 24 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Yang et al. (US 10,991,618).
Pertaining to claim 1, Yang shows, with reference to FIG. 3-16, a method for manufacturing a semiconductor structure, comprising:
forming a first layer (165A-D) on a base structure, the first layer being made of a first electrically conductive material, and having a first region (165A) and a second region (165C) displaced from the first region, each of the first region and the second region including a conductive line;
patterning the first layer such that the conductive line at the first region is selectively recessed to have a recessed portion which has a first height (shown in FIG. 8) and a non-recessed portion which has a second height that is greater than the first height and that is the same as a height of the conductive line at the second region (shown in FIG. 7);
forming a patterned dielectric layer (185) over the patterned first layer such that the non-recessed portion is exposed from the patterned dielectric layer (FIG. 15); and
forming a second layer (220(A)) over the patterned dielectric layer so as to permit the second layer to be connected to the non-recessed portion, the second layer being made of a second electrically conductive material.
Pertaining to claim 2, Yang shows patterning the first layer includes: forming a patterned masking unit (175) to cover the conductive line at the second region and the non-recessed portion of the conductive line at the first region (FIG. 5-6); and patterning the first layer through the patterned masking unit such that a portion of the conductive line at the first region, which is uncovered by the patterned masking unit, is recessed to form the recessed portion (FIG. 8-9).
Pertaining to claim 8, Yang shows a method for manufacturing a semiconductor structure, comprising:
forming a patterned first layer (165A-D) which is made of a first electrically conductive material, and which includes first lines (165A-B), second lines (165C-D), and a connection portion (180A) disposed on a part of one of the first lines, the first lines having a height (height of recessed portions shown in FIG. 7-9) lower than a height (height of 180B) of the second lines;
forming a first via (225A) which is connected to an upper surface of the connection portion, the first via having a height above the connection portion (FIG. 16); and
forming a second via (225B) which is connected to an upper surface of one of the second lines, the second via having a height that is the same as the height of the first via above the connection portion (FIG. 16). Note that height is interpreted to mean the highest point in elevation.
Pertaining to claim 9, Yang shows, prior to forming the first via and the second via, forming a patterned dielectric layer (185) over the patterned first layer (FIG. 15).
Pertaining to claim 10, Yang shows the first via and the second via are simultaneously formed in the patterned dielectric layer (FIG. 16), and are made of a second electrically conductive material (col. 9, lines 57-61).
Pertaining to claim 14, Yang shows forming a plurality of dielectric units (135) such that two adjacent ones of the first lines and the second lines are spaced apart from each other by a corresponding one of the dielectric units.
Pertaining to claim 21, Yang shows a method for manufacturing a semiconductor structure, comprising:
forming a first layer (165A-D) on a base structure, the first layer being made of a first electrically conductive material, and having a first region (165A-B) and a second region (165C-D) displaced from the first region, the first region including first conductive lines (165A, 165B) that extend lengthwise in a first direction, and that are spaced apart from each other in a second direction different from the first direction, the first conductive lines each having a bottom segment and an upper segment connected to each other along a third direction different from the first direction and the second direction (FIG. 5), and
forming a patterned first mask (175 over 165C) over the first layer, the first region being uncovered by the patterned first mask;
forming a patterned second mask (175 over 165A) that covers a first part of the upper segment of a first predetermined one of the first conductive lines; and
performing a patterning process to pattern the first layer through the patterned first mask and the patterned second mask (FIG. 7-9), such that a second part of the upper segment of the first predetermined one of the first conductive lines and the upper segment of a second predetermined one of the first conductive lines are removed (FIG. 8), and such that the first part of the upper segment of the first predetermined one of the first conductive lines (180A) remains (FIG. 7).
Pertaining to claim 22, Yang shows forming a second layer (220A/225A) that is made of a second electrically conductive material, the second layer being connected to the first part of the upper segment of the first predetermined one of the first conductive lines.
Pertaining to claim 24, Yang shows the second region includes second conductive lines (165C-D),
before the patterning process, a height of the first conductive lines at the first region being same as a height of the second conductive lines at the second region measured in the third direction (FIG. 5), and
after the patterning process, a height of the second predetermined one of the first conductive lines (165B) being smaller than a height (height of 180B) of the second conductive lines measured in the third direction.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 12 and 17 are rejected under 35 U.S.C. 103 as being unpatentable over Yang in view of Chen et al. (US 11,361,994).
Yang shows the method of claim 8, but fails to show forming a patterned etch stop layer on the patterned first layer, the patterned etch stop layer having a first portion which is formed around the first via, and a second portion which is disposed on the second lines.
However, Chen teaches in FIG. 18A and 19A that, for a similar method, a patterned etch stop layer 226 is formed on the patterned first layer, the patterned etch stop layer having a first portion which is formed around the first via 238, and a second portion which is disposed on the second lines 214.
It would have been obvious to one of ordinary skill in the art, before the effective filing date of the claimed invention, to form the etch stop layer taught by Chen in the method of Yang with the motivation that the presence of the etch stop layer allows for self-alignment of metal structures at different levels, ensuring an electrical connection (col. 11, lines 40-64).
Pertaining to claim 17, Chen teaches the dielectric units may include air gaps (col. 8, lines 65-66.
It would have been obvious to one of ordinary skill in the art, before the effective filing date of the claimed invention, to include air gaps, as taught by Chen, in the dielectric units of Yang, as air gaps are known to lower the dielectric constant and therefore reduce influence of a line with an adjacent line.
Allowable Subject Matter
Claims 4-7, 13, 15-16 and 23 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
Pertaining to claim 4, the different masks 175 of Yang may be interpreted to be the patterned first and second masks. However, there is nothing to suggest that these masks would be formed from different materials, and therefore the prior art of record does not teach the claim 4 limitation “forming the patterned masking unit includes: forming a patterned first mask over the first layer to expose the first region; and forming a patterned second mask to cover the non-recessed portion of the conductive line at the first region, the patterned second mask being made of a material different from a material of the patterned first mask.” Similarly, as it pertains to claim 23, the masks of Yang are formed in a same step of a same material. There is nothing to lead one of ordinary skill to form the second patterned mask after forming the first patterned mask.
Pertaining to claim 7, the prior art is silent with regards to an etch stop layer that meets the claimed limitations of being formed over the first layer and patterned to expose a portion of the conductive line at the first region prior to patterning the first layer, wherein in patterning the first layer, the portion of the conductive line at the first region is recessed to form the recessed portion, and in forming the patterned dielectric layer, the patterned dielectric layer is formed over the patterned etch stop layer and the patterned first layer, in combination with the limitations of claim 1.
Pertaining to claim 13, Chen teaches a SAM is used to prevent the patterned etch stop layer being formed on the upper surface of the connection portion (col. 11, lines 9-20), thereby teaching away from the upper surface of the connection portion being connected to both the first via and the first portion of the patterned etch stop layer.
Pertaining to claim 15, the prior art teaches away from each of the dielectric units having an upper surface at a level which is the same as a level of an upper surface of each of the second lines, as Chen teaches lines that are recessed below the dielectric units (FIG. 9A) and Yang teaches lines that are not level with the dielectric units due to trench loading (col. 7, lines 24-44).
Pertaining to claim 16, the prior art is silent with regards to an etch stop layer that meets the claimed limitations of, prior to forming the patterned dielectric layer, forming a patterned etch stop layer on the patterned first layer, the patterned etch stop layer having a first portion which is formed around the first via, and a second portion which is disposed on the second lines, such that after forming the patterned dielectric layer, the first lines are in direct contact with the patterned dielectric layer, in combination with the limitations of the claims on which claim 16 depends.
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. Xie et al. (US 11,171,044) and Ghosh et al. (US 11,688,636) disclose methods for forming lines at different heights.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to DANIEL M LUKE whose telephone number is (571)270-1569. The examiner can normally be reached Monday-Friday, 9am-5pm, EST.
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/DANIEL LUKE/Primary Examiner, Art Unit 2896