DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Response to Arguments
Applicant’s arguments with respect to claims 5, 11-15, 17-20 have been considered but are moot in view of the new ground of rejection necessitated by amendment. The prior specification objection is withdrawn in view of amendments to the specification. The prior claim objection of claim 6 is withdrawn in view of amendments to the claims. The prior §112(a) rejections of claims 6-10 and 16 are withdrawn in view of amendments to the claims.
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claims 5 and 15 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
Claim 5 recites the limitation, "forming a metal oxide on a gate structure of the transistor structure, wherein the metal oxide is formed on the metal silicide layer during the deposition process of the metal silicide layer," in lines 6-7 of the claim. The meets and bounds of this limitation are unclear, as it is unclear how the metal oxide layer is formed during the deposition process which deposits a different layer, the metal silicide layer. It is further unclear how the metal oxide layer is formed on the metal silicide layer, while the metal silicide layer is still being formed by deposition. For the purpose of this office action, the limitation is interpreted to have the following meaning: forming a metal oxide on a gate structure of the transistor structure, wherein the metal oxide is formed on the metal silicide layer during the process of forming the metal silicide layer and the metal oxide layer.
Claim 15 recites the limitation, “forming a metal oxide on a gate structure connected to the source/drain region, wherein the metal oxide is formed on the metal silicide layer during the deposition process of the metal silicide layer,” in lines 4-6 of the claim. The meets and bounds of this limitation are unclear, as it is unclear how the metal oxide layer is formed during the deposition process which deposits a different layer, the metal silicide layer. It is further unclear how the metal oxide layer is formed on the metal silicide layer, while the metal silicide layer is still being formed by deposition. For the purpose of this office action, the limitation is interpreted to have the following meaning: forming a metal oxide on a gate structure connected to the source/drain region, wherein the metal oxide is formed on the metal silicide layer during the process of forming the metal silicide layer and the metal oxide layer.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 5-20 are rejected under 35 U.S.C. 103 as being unpatentable over Wu et al. (US PGPub 20200105593 A1; hereinafter referred to as "Wu”) in view of Yang et al. (KR 20000013443 A; hereinafter referred to as "Yang”) and further in view of Hung et al. (US PGPub 20200176260 A1; hereinafter referred to as "Hung”).
Re claim 5: Wu teaches a method of forming a semiconductor device, comprising: forming a first opening (FIG. 2A: el. 220; para. 40) through an interlayer dielectric layer (FIG. 2A: el. 200; para. 40) to a source/drain region (FIG. 2A: el. 140; para. 38) of a transistor structure; performing a deposition process to selectively form a metal silicide layer on a top surface of the source/drain region in the first opening (FIG. 2B: el. 400; para. 38). Wu teaches performing an etching process to remove a metal nitride layer covering the metal silicide layer on the source/drain region (FIG. 2B-2C: el. 310; para. 39); and performing a deposition process to form a metal nitride layer on a surface of the metal silicide layer (FIG. 2C: el. 410; para. 39), but fails to teach forming a metal oxide on a gate structure of the transistor structure, wherein the metal oxide is formed on the metal silicide layer during the process of forming the metal silicide layer and the metal oxide layer; performing an etching process to remove the metal oxide covering the metal silicide layer on the source/drain region; and performing a nitriding process to form a metal silicon nitride layer only on a surface of the metal silicide layer.
In a similar field of endeavor, Yang teaches forming a metal oxide (FIG. 5A: el. 60; pg. 3: para. 2-3) on an upper surface of a deposited titanium layer (FIG. 5A: el. 30; pg. 3: para. 3) and titanium silicide layer (FIG. 5A: el. 20; pg. 3: para. 3), wherein the titanium layer is a precursor layer for the underlying titanium silicide layer, and the metal oxide layer is formed as a natural oxide (pg. 3: para. 2-3). Yang also teaches etching the oxide layer, alongside a metal nitride precursor layer, as a two-step etch process for removing a metal nitride precursor layer and native and etch-induced oxide layers remaining on the titanium silicide layer (FIG. 4: el. S12, S16; pg. 3: para. 4-13). Yang teaches forming a metal oxide (FIG. 5A: el. 60; pg. 3: para. 2-3), wherein the metal oxide is formed on the metal silicide layer during the process of forming the metal silicide layer and the metal oxide layer (FIG. 5A: el. 60, 20; pg. 3: para. 2-3), and the combination of Yang and Wu teaches forming the metal oxide on a gate structure of the transistor structure and performing an etching process to remove the metal oxide covering the metal silicide layer on the source/drain region (Yang - FIG. 5A: el. 60, 30, 50; pg. 3: para. 2-5; Wu – FIG. 2B: el. 300, 310, 170| Wu teaches a deposited TiN/Ti precursor stack formed on a gate structure of the transistor structure and on a metal silicide layer on the source/drain region, and Yang teaches a native metal oxide formed on the upper surface of a deposited TiN/Ti precursor stack, used in forming the silicide layer, as well as methods and benefits of etching the formed oxide layers; the combination teaches forming a metal oxide on a gate structure of the transistor structure; performing an etching process to remove the metal oxide covering the metal silicide layer on the source/drain region). Yang also teaches a benefit of the etching process for removing the oxide layers above the metal silicide layer is reduced resistance of the contact structure (para. abstract).
Therefore, it would have been obvious at the time of the effective filling date of the claimed invention to combine the teachings of Wu and Yang, to enable using the recognition of oxide formation and etching of formed oxide layers of Yang in the method of forming a semiconductor device of Wu, for the benefit of reduced contact resistance.
The combination of Wu and Yang teaches performing a deposition process to form a metal nitride barrier layer on a surface of the metal silicide layer (Wu - FIG. 2C: el. 410; para. 39), but fails to teach performing a nitriding process to form a metal silicon nitride layer only on a surface of the metal silicide layer.
In a similar field of endeavor, Hung teaches performing a nitriding process to form a metal silicon nitride layer only on a surface of the metal silicide layer (para. 70; FIG. 16: el. 93). Hung further teaches a benefit of nitriding a titanium silicide layer to form a titanium silicide nitride cap on the silicide layer is a benefit of the simple processing method of forming an effective oxygen barrier by nitridation of an existing layer (para. 70).
Therefore, it would have been obvious at the time of the effective filling date of the claimed invention to combine the teachings of the combination of Wu and Yang with the teachings of Hung, to enable using the nitriding process of Hung in the method of forming a semiconductor device of the combination of Wu and Yang, for the benefit of simplifying manufacturing by forming an effective barrier layer on the metal silicide using the simple processing step of a nitridation treatment.
Re claim 6: The combination of Wu, Yang, and Hung teaches the method according to claim 5, wherein when forming the metal silicide layer, the method further comprises forming the metal oxide on an oxygen-rich surface of a substrate adjacent to the gate structure (Yang - FIG. 5A: el. 60, 30, 50; pg. 3: para. 2-5; Wu – FIG. 2B: el. 300, 310, 122, 200; para. 36| Yang teaches a native metal oxide formed on the upper surface of a deposited TiN/Ti precursor stack, as well as methods and benefits of etching the formed oxide layers, and Wu teaches a deposited TiN/Ti precursor stack formed on an oxide upper layer 200 of a shallow trench isolation 122).
Re claim 7: The combination of Wu, Yang, and Hung teaches the method according to claim 6, wherein after forming the metal silicide layer and prior to the nitriding process, the method further comprises performing the etching process to remove the metal oxide formed on the gate structure, and remove the metal oxide formed on the oxygen-rich surface (Yang - FIG. 4: el. S12, S16; pg. 3; Wu – FIG. 2B-2C: el. 300, 310, 410, 170; para. 39; Hung – para. 70 |the etching process of Yang teaches performing etching to remove the metal oxide formed across the TiN/Ti precursor stack after forming the metal silicide layer; the etching method of Yang, which etches oxides layers in addition to the TiN precursor for the benefit of reducing contact resistance, is used in the method of Wu which teaches etching the TiN precursor layer across the semiconductor structure after forming the metal silicide layer and prior to the process of forming the nitride barrier layer; the nitride barrier layer is taught by Hung to be a nitride barrier layer).
Re claim 8: The combination of Wu, Yang, and Hung teaches the method according to claim 7, wherein the oxygen-rich surface comprises a cut metal gate (CMG) trench refiller and a cut-on-poly-oxide-definition-edge (CPODE) refiller (Wu – FIG. 2B: el. 200, 122; para. 19, 36| oxide upper layer 200 is a refiller layer refilling cut-on-poly-definition edge STI region 122).
Re claim 9: The combination of Wu, Yang, and Hung teaches the method according to claim 7, wherein the etching process comprises removing the metal oxides with hydrofluoric acid, tetrabutylammonium fluoride (TBAF) or Tetramethylammonium fluoride (TMAF) (Yang – FIG. 4: el. S16; pg. 3: para. 8-9|hydrofluoric acid (HF) used in the etching process).
Re claim 10: The combination of Wu, Yang, and Hung teaches the method according to claim 9, wherein an etching rate of the metal oxide is greater than an etching rate of the metal silicide in the etching process (Yang – FIG. 5B-5C; pg. 3| etching process has etch selectivity towards oxide layer 60 over metal silicide layer 30).
Re claim 11: The combination of Wu, Yang, and Hung teaches the method according to claim 5, wherein the nitriding process comprises providing a reaction gas to make the metal silicide layer, hydrogen in the reaction gas and nitrogen react to form the metal silicon nitride layer (Hung – para. 70|nitriding a titanium silicide layer using nitrogen (and trace hydrogen) in a reaction gas to form a titanium silicide nitride cap on the silicide layer).
Re claim 12: The combination of Wu, Yang, and Hung teaches the method according to claim 5, wherein forming the metal silicide layer comprises reacting a titanium precursor with a silicon-rich surface to form a titanium silicide layer (Wu – para. 38|Ti precursor layer 300 reacts with silicon-rich surface 140 to form titanium silicide layer 400).
Re claim 13: The combination of Wu, Yang, and Hung teaches the method according to claim 12, wherein forming the metal silicon nitride layer comprises forming a titanium silicon nitride layer on the surface of the titanium silicide layer (Hung – para. 70).
Re claim 14: The combination of Wu, Yang, and Hung teaches the method according to claim 5, wherein the metal silicide layer covers the top surface of the source/drain region, and a shape of the metal silicide layer is spine-like (Wu – FIG. 2C: el. 400).
Re claim 15: Wu teaches a method of forming a semiconductor device, comprising: performing a deposition process to selectively form a metal silicide layer (FIG. 2B: el. 400; para. 38) on a top surface of a source/drain region (FIG. 2B: el. 400, 140; para. 38). Wu teaches performing an etching process to remove the metal nitride covering the metal silicide layer on the source/drain region (FIG. 2B-2C: el. 310; para. 39); and performing a deposition process to form a metal nitride layer on a surface of the metal silicide layer (FIG. 2C: el. 410; para. 39), but fails to teach forming a metal oxide on a gate structure connected to the source/drain region, wherein the metal oxide is formed on the metal silicide layer during the process of forming the metal silicide layer and the metal oxide layer; performing an etching process to remove the metal oxide covering the metal silicide layer on the source/drain region; and performing a nitriding process to form a metal silicon nitride layer only on a surface of the metal silicide layer.
In a similar field of endeavor, Yang teaches forming a metal oxide (FIG. 5A: el. 60; pg. 3: para. 2-3) on an upper surface of a deposited titanium layer (FIG. 5A: el. 30; pg. 3: para. 3) and titanium silicide layer (FIG. 5A: el. 20; pg. 3: para. 3), wherein the titanium layer is a precursor layer for the underlying titanium silicide layer, and the metal oxide layer is formed as a natural oxide (pg. 3: para. 2-3). Yang also teaches etching the oxide layer, alongside a metal nitride precursor layer, as a two-step etch process for removing a metal nitride precursor layer and native and etch-induced oxide layers remaining on the titanium silicide layer (FIG. 4: el. S12, S16; pg. 3: para. 4-13). Yang teaches forming a metal oxide (FIG. 5A: el. 60; pg. 3: para. 2-3), wherein the metal oxide is formed on the metal silicide layer during the process of forming the metal silicide layer and the metal oxide layer (FIG. 5A: el. 60, 20; pg. 3: para. 2-3), and the combination of Yang and Wu teaches forming the metal oxide on a gate structure connected to the source/drain region and performing an etching process to remove the metal oxide covering the metal silicide layer on the source/drain region (Yang - FIG. 5A: el. 60, 30, 50; pg. 3: para. 2-5; Wu – FIG. 2B: el. 300, 310, 170| Wu teaches a deposited TiN/Ti precursor stack formed on a gate structure connected to the source/drain region and on a metal silicide layer on the source/drain region, and Yang teaches a native metal oxide formed on the upper surface of a deposited TiN/Ti precursor stack, used in forming the silicide layer, as well as methods and benefits of etching the formed oxide layers; the combination teaches forming a metal oxide on a gate structure connected to the source/drain region; performing an etching process to remove the metal oxide covering the metal silicide layer on the source/drain region). Yang also teaches a benefit of the etching process for removing the oxide layers above the metal silicide layer is reduced resistance of the contact structure (para. abstract).
Therefore, it would have been obvious at the time of the effective filling date of the claimed invention to combine the teachings of Wu and Yang, to enable using the recognition of oxide formation and etching of formed oxide layers of Yang in the method of forming a semiconductor device of Wu, for the benefit of reduced contact resistance.
The combination of Wu and Yang teaches performing a deposition process to form a metal nitride barrier layer on a surface of the metal silicide layer (Wu - FIG. 2C: el. 410; para. 39), but the combination of Wu and Yang fails to teach performing a nitriding process to form a metal silicon nitride layer only on a surface of the metal silicide layer.
In a similar field of endeavor, Hung teaches performing a nitriding process to form a metal silicon nitride layer only on a surface of the metal silicide layer (para. 70; FIG. 16: el. 93). Hung further teaches a benefit of nitriding a titanium silicide layer to form a titanium silicide nitride cap on the silicide layer is a benefit of the simple processing method of forming an effective oxygen barrier by nitridation of an existing layer (para. 70).
Therefore, it would have been obvious at the time of the effective filling date of the claimed invention to combine the teachings of the combination of Wu and Yang with the teachings of Hung, to enable using the nitriding process of Hung in the method of forming a semiconductor device of the combination of Wu and Yang, for the benefit of simplifying manufacturing by forming an effective barrier layer on the metal silicide using the simple processing step of a nitridation treatment.
Re claim 16: The combination of Wu, Yang, and Hung teaches the method according to claim 15, wherein when forming the metal silicide layer, the method further comprises performing the etching process to remove the metal oxide formed on the gate structure (Yang - FIG. 5A: el. 60, 30, 50; pg. 3: para. 2-5; Wu – FIG. 2B: el. 300, 310, 170| Wu teaches a deposited TiN/Ti precursor stack formed on a gate structure and on a metal silicide layer on the source/drain region, and Yang teaches a native metal oxide formed on the upper surface of a deposited TiN/Ti precursor stack, as well as methods and benefits of etching the formed oxide layers).
Re claim 17: The combination of Wu, Yang, and Hung teaches the method according to claim 15, wherein the metal silicide layer comprises titanium silicide (Wu - para. 38: last sentence).
Re claim 18: The combination of Wu, Yang, and Hung teaches the method according to claim 15, wherein the metal silicon nitride layer comprises titanium silicon nitride (Hung – para. 70).
Re claim 19: The combination of Wu, Yang, and Hung teaches the method according to claim 15, wherein the nitriding treatment comprises providing a reaction gas to make the metal silicide layer, hydrogen in the reaction gas and nitrogen react to form the metal silicon nitride layer on the surface of the metal silicide layer (Hung – para. 70|nitriding a titanium silicide layer using nitrogen (and trace hydrogen) in a reaction gas to form a titanium silicide nitride cap on the silicide layer).
Re claim 20: The combination of Wu, Yang, and Hung teaches the method according to claim 15, wherein a shape of the metal silicide layer is spine-like (Wu – FIG. 2C: el. 400).
Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to DEVIN GOODLING whose telephone number is (571)272-2552. The examiner can normally be reached M-F 7:30am - 5:00pm.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Julio Maldonado can be reached at (571) 272-1864. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/D.G./ Examiner, Art Unit 2898 /JULIO J MALDONADO/Supervisory Patent Examiner, Art Unit 2898
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