DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Election/Restrictions
Applicant’s election without traverse of the invention of group II, species 1 (claims 5-24 readable thereon) in the reply filed on 29 January 2026 is acknowledged. Newly submitted claims 21-24, drawn to a non-elected invention, are withdrawn.
Newly submitted claims 21-24 are directed to an invention that is independent or distinct from the invention originally claimed for the following reasons:
I. Newly submitted claims 21-24, drawn to a process of making a FinFET device and a general method of making a contact surface of a semiconductor device, classified in H10D 30/024.
II. Claims 4-20, drawn to a specific process of making a contact surface of a semiconductor device, classified in H10D 64/01125.
Inventions I and II are related as combination and subcombination. Inventions in this relationship are distinct if it can be shown that (1) the combination as claimed does not require the particulars of the subcombination as claimed for patentability, and (2) that the subcombination has utility by itself or in other combinations (MPEP § 806.05(c)). In the instant case, the combination as claimed does not require the particulars of the subcombination as claimed because the specific limitation of forming the contact surface by performing a nitriding process is not required by the combination as claimed. The subcombination has separate utility such as improving the contact resistance of electrodes in planar MOSFETs.
Applicant has elected the originally presented invention of group II, species 1. Accordingly, claims 21-24 withdrawn from consideration as being directed to a non-elected invention. See 37 CFR 1.142(b) and MPEP § 821.03.
To preserve a right to petition, the reply to this action must distinctly and specifically point out supposed errors in the restriction requirement. Otherwise, the election shall be treated as a final election without traverse. Traversal must be timely. Failure to timely traverse the requirement will result in the loss of right to petition under 37 CFR 1.144. If claims are subsequently added, applicant must indicate which of the subsequently added claims are readable upon the elected invention.
Should applicant traverse on the ground that the inventions are not patentably distinct, applicant should submit evidence or identify such evidence now of record showing the inventions to be obvious variants or clearly admit on the record that this is the case. In either instance, if the examiner finds one of the inventions unpatentable over the prior art, the evidence or admission may be used in a rejection under 35 U.S.C. 103 or pre-AIA 35 U.S.C. 103(a) of the other invention.
Specification
The disclosure is objected to because of the following informalities: reference characters 103, 104, 105 are used to designate the source region, the drain region, and the channel region, respectively, in the third sentence of paragraph 13. Reference characters 103, 104, 105 are used to designate the shallow trench isolation region (para. 19, 20), the transistor structure (para. 11, 12), and the source/drain regions (para. 11, 15), respectively, in other paragraphs of the specification. Appropriate correction is required.
Claim Objections
Claim 6 is objected to because of the following informalities: line 3 of claim 6 contains the limitation “the gate structure”. There is insufficient antecedent basis for this limitation in the claim, as “the gate structure” is not previously introduced in the claims. Appropriate correction is required.
Claim Rejections - 35 USC § 112
The following is a quotation of the first paragraph of 35 U.S.C. 112(a):
(a) IN GENERAL.—The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor or joint inventor of carrying out the invention.
The following is a quotation of the first paragraph of pre-AIA 35 U.S.C. 112:
The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor of carrying out his invention.
Claims 6-10 and 16 are rejected under 35 U.S.C. 112(a) or 35 U.S.C. 112 (pre-AIA ), first paragraph, as failing to comply with the written description requirement. The claims contain subject matter which was not described in the specification in such a way as to reasonably convey to one skilled in the relevant art that the inventor or a joint inventor, or for applications subject to pre-AIA 35 U.S.C. 112, the inventor(s), at the time the application was filed, had possession of the claimed invention.
Examiner has unresolved questions regarding the “epitaxial surface of the gate structure” of claim 6 (and by dependency claims 7-10) and claim 16. Claim 6 contains the limitation, “forming the metal silicide layer and a metal oxide on an epitaxial surface of the gate structure.” Claim 16 contains the limitation, “forming a metal oxide on an epitaxial surface of a gate structure.” The specification describes this feature by specifying that “the epitaxial layer of the gate structure” is a layer on which the metal silicide layer 120 and the metal oxide layer 122 are also formed (para. 30, 38). The examiner’s unresolved questions regarding the “epitaxial surface of the gate structure” include the following questions: How do you form a metal silicide layer and a metal oxide on the surface of an epitaxial surface of a gate structure? More specifically, how do you form an epitaxial surface (or epitaxial layer) of a gate structure? What provides the seed layer for nucleating an epitaxial surface within the layered stack of the disclosed gate structure? Which layer of the figures depicts the epitaxial layer, and which layer of the figures functions as the seed layer? The last two sentences of paragraph 39 of the specification describe the thickness of the metal silicide layer and the metal silicon nitride layer, as well as the shape of these layers on the source/drain contact. An “epitaxial layer” is also referenced within the last sentence of paragraph 39. Is the “epitaxial layer” of paragraph 39 the same feature as the “epitaxial layer of the gate structure”?
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claims 5, 11-15, 17-20 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Empante et al. (US PGPub 20230187282 A1; hereinafter referred to as “Empante”).
Re claim 5: Empante teaches a method of forming a semiconductor device (para. 1), comprising:
forming a first opening (FIG. 5: el. 106; abstract) through an interlayer dielectric layer (FIG. 5: el. 106, 110; para. 41-42) to a source/drain region (FIG. 5: el. 120; para. 42, 45) of a transistor structure (para. 42);
performing a deposition process to selectively form a metal silicide layer (FIG. 4: el. 160; para. 75, 80) on a top surface of the source/drain region in the first opening (FIG. 5: el. 120, 160, 106); and
performing a nitriding process to form a metal silicon nitride layer on a surface of the metal silicide layer (FIG. 5: el. 170; para. 83).
Re claim 11: Empante teaches the method according to claim 5, wherein the nitriding process comprises providing a reaction gas to make the metal silicide layer, hydrogen in the reaction gas and nitrogen react to form the metal silicon nitride layer (para. 83).
Re claim 12: Empante teaches the method according to claim 5, wherein forming the metal silicide layer comprises reacting a titanium precursor with a silicon-rich surface to form a titanium silicide layer (para. 80).
Re claim 13: Empante teaches the method according to claim 12, wherein forming the metal silicon nitride layer comprises forming a titanium silicon nitride layer on the surface of the titanium silicide layer (FIG. 5: el. 170; para. 83).
Re claim 14: Empante teaches the method according to claim 5, wherein the metal silicide layer covers the top surface of the source/drain region, and a shape of the metal silicide layer is spine-like (FIG. 5: el. 160, 120; para. 75|surface of the metal silicide layer 160 in FIG. 5 is spine-like).
Re claim 15: Empante teaches a method of forming a semiconductor device (para. 1), comprising: performing a deposition process to selectively form a metal silicide layer (FIG. 4: el. 160; para. 75, 80) on a top surface of a source/drain region (FIG. 5: el. 120, 160); and performing a nitriding process to form a metal silicon nitride layer on a surface of the metal silicide layer (FIG. 5: el. 170; para. 83).
Re claim 17: Empante teaches the method according to claim 15, wherein the metal silicide layer comprises titanium silicide (para. 75, 80).
Re claim 18: Empante teaches the method according to claim 15, wherein the metal silicon nitride layer comprises titanium silicon nitride (para. 83|nitriding titanium silicide forms a titanium silicon nitride layer).
Re claim 19: Empante teaches the method according to claim 15, wherein the nitriding treatment comprises providing a reaction gas to make the metal silicide layer, hydrogen in the reaction gas and nitrogen react to form the metal silicon nitride layer on the surface of the metal silicide layer (para. 83).
Re claim 20: Empante teaches the method according to claim 15, wherein a shape of the metal silicide layer is spine-like (FIG. 5: el. 160|surface of the metal silicide layer 160 in FIG. 5 is spine-like).
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant’s
disclosure. The additional cited art discloses methods of forming metal silicide and metal silicide nitride contact surfaces.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to DEVIN GOODLING whose telephone number is (571)272-2552. The examiner can normally be reached M-F 7:30am - 5:00pm.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Julio Maldonado can be reached at (571) 272-1864. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/DEVIN GOODLING/Examiner, Art Unit 2898 /JULIO J MALDONADO/Supervisory Patent Examiner, Art Unit 2898