DETAILED ACTION
Notice of Pre-AIA or AIA Status
1. The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Drawings
2. The subject matter of this application admits of illustration by a drawing to facilitate understanding of the invention. Applicant is required to furnish a drawing under 37 CFR 1.81(c). No new matter may be introduced in the required drawing. Each drawing sheet submitted after the filing date of an application must be labeled in the top margin as either “Replacement Sheet” or “New Sheet” pursuant to 37 CFR 1.121(d).
The drawings are objected to under 37 CFR 1.81(c) because they fail to include the figures referred to in the specification paragraphs [0037], [0046], and [0047], as Fig. 2A and Fig. 2B.
3. Color photographs and color drawings are not accepted in utility applications unless a petition filed under 37 CFR 1.84(a)(2) is granted. Any such petition must be accompanied by the appropriate fee set forth in 37 CFR 1.17(h), one set of color drawings or color photographs, as appropriate, if submitted via the USPTO patent electronic filing system or three sets of color drawings or color photographs, as appropriate, if not submitted via the via USPTO patent electronic filing system, and, unless already present, an amendment to include the following language as the first paragraph of the brief description of the drawings section of the specification:
The patent or application file contains at least one drawing executed in color. Copies of this patent or patent application publication with color drawing(s) will be provided by the Office upon request and payment of the necessary fee.
Color photographs will be accepted if the conditions for accepting color drawings and black and white photographs have been satisfied. See 37 CFR 1.84(b)(2).
Paragraphs [0037] and [0047] describe certain features of the drawings using color (e.g., the red and blue cross). However, the submitted drawings are in black and white. Color drawings are not accepted in utility applications unless a petition filed under 37 CFR 1.84(a)(2) is granted.
Appropriate correction is required.
Specification
4. The disclosure is objected to because of the following informalities:
The term "kikutchi" is misspelled and should be corrected to "Kikuchi" (see paragraph [0065]).
Appropriate correction is required.
Claim Rejections - 35 USC § 102
5. The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
6. Claims 1, 7-9, 12-13, 15 are rejected under 35 U.S.C 102(a)(1) and 35 U.S.C. 102(a)(2) as being anticipated by Han (US 20220412900 A1).
7. Regarding Claim 1:
Han discloses a method for calibrating a tilt angle of an electron beam of a backscattered scanning electron microscope (BSEM) tool, the method (the entire disclosure of Han relates to metrology in a BSEM tool to determine offcut angles or compensatory tilts, which is a form of calibration for the crystal orientation measurement system that requires a correctly calibrated tilt angle) comprising: scanning a bare wafer ([0051] teaches that a sample being scanned is a physical object that can be subject to an analytic procedure with a beam. The definition encompasses a bare wafer. [0033] also teaches that the disclosed technologies are suitable for semiconductor wafers),
utilizing the BSEM tool ([0038] teaches using a BSEM tool), at a plurality of electron beam tilt and azimuth angles ([0108] teaches scanning a sample at different tilts and azimuth angles), such that each image obtained spans a different tilt angle or range thereof ([0108] teaches applying tilts and generating ECP images from the measured backscatter current) at a predetermined range of azimuth angles ([0032] teaches scanning at a sequence of azimuthal setpoints), thereby obtaining a calibration map representing a crystal orientation of the bare wafer ([0099] teaches using a library of electron channeling data, which is the calibration map in this case, for the crystal lattice of an instant sample);
selecting a tilt angle ([0099] teaches generating an initial electron channeling pattern ECP P0 at a starting tilt) and defining an expected diffraction pattern associated with the tilt angle, based on the calibration map ([0099] teaches using the library of electron channeling data to estimate the existing tilt and determine a compensatory tilt T1 required to align a feature in the ECP image to a target position);
scanning a patterned wafer ([0051] teaches that a sample being scanned is a physical object that can be subject to an analytic procedure with a beam. The definition encompasses a patterned wafer. [0033] also teaches that the disclosed technologies are suitable for semiconductor wafers) at the selected tilt angle, utilizing the BSEM tool ([0099] teaches generating an initial electron channeling pattern ECP P0 at a starting tilt);
comparing the diffraction pattern of the image obtained from the scanning of the patterned wafer at the selected tilt angle with the expected diffraction pattern ([0099] teaches that the instructions for block 1044 extract one or more features from ECP P0. Using these features and a library of electron channeling data, which is the expected diffraction pattern, for comparison); and correcting the tilt angle of the electron beam of the BSEM tool, such that the diffraction pattern of the image obtained during scanning of the patterned wafer will align with the expected diffraction pattern ([0099] teaches that the instructions for block 1048 can cause tilt T1, the correction angle, to be applied between the sample and the electron beam).
8. Regarding claim 7:
Han discloses the method claim 1. Han further discloses conducting a metrology analysis ([0035] teaches using a scanning electron microscope to perform metrology analysis) of the obtained patterned wafer images ([0099] teaches producing an ECP image at an applied tilt. This is done on a sample, which can include a patterned wafer, as previously established in [0051]).
9. Regarding claim 8:
Han discloses the method of claim 1. Han further discloses that the calibration map ([0099] teaches a library of electron channeling data) is a Kikuchi map ([0033] teaches that the pattern formed by the backscattered electron current variation with angle of incidence is an electron channeling pattern (ECP) or sometimes as Kikuchi lines).
10. Regarding claim 9:
Han discloses a method for improved scanning of a patterned wafer with a backscattered scanning electron microscope (BSEM) tool, the method comprising: scanning a patterned wafer ([0051] teaches that a sample being scanned is a physical object that can be subject to an analytic procedure with a beam. The definition encompasses a patterned wafer. [0033] also teaches that the disclosed technologies are suitable for semiconductor wafers) at a selected tilt angle, thereby obtaining a diffraction pattern ([0099] teaches generating an initial electron channeling pattern ECP P0 at a starting tilt);
comparing the diffraction pattern with an image having an expected diffraction pattern ([0099] teaches the instructions for block 1044 extract one or more features from ECP P0. Using these features and a library of electron channeling data, which is the expected diffraction pattern, for comparison); wherein the expected diffraction pattern is a diffraction pattern obtained when scanning a bare wafer at the selected tilt angle ([0040] teaches that calibration of angular coordinates can be done using a reference sample of known Si wafer, which is a bare wafer, at the same working distance. [0051] teaches that a sample being scanned is a physical object that can be subject to an analytic procedure with a beam. The definition encompasses a bare wafer); and
correcting the tilt angle of the electron beam of the BSEM tool, such that the diffraction pattern of the image obtained during scanning of the patterned wafer aligns with the expected diffraction pattern ([0099] teaches that the instructions for block 1048 can cause tilt T1, the correction angle, to be applied between the sample and the electron beam to match the observed pattern to the expected bare-wafer pattern).
11. Regarding claim 12:
Han discloses the method of claim 9. Han further discloses conducting a metrology analysis ([0035] teaches using a scanning electron microscope to perform metrology analysis) of the obtained patterned wafer images ([0099] teaches producing an ECP image at an applied tilt. This is done on a sample, which can include a patterned wafer, as previously established in [0051]).
12. Regarding claim 13:
Han discloses a system (fig. 17 element 1700 teaches a computing system) for calibrating a tilt angle of an electron beam ([0004] teaches an electron beam) of a backscattered scanning electron microscope (BSEM) tool ([0038] teaches a BSME) for optimization of diffraction angles, the BSEM tool is configured to: scan a bare wafer ([0051] teaches that a sample being scanned is a physical object that can be subject to an analytic procedure with a beam. The definition encompasses a bare wafer. [0033] also teaches that the disclosed technologies are suitable for semiconductor wafers) at a plurality of electron beam tilt angles and azimuth angles ([0108] teaches scanning a sample at different tilts and azimuth angles), thereby obtaining a plurality of images, each spanning a different tilt angle or range thereof ([0108] teaches applying tilts and generating ECP images from the measured backscatter current) at a predetermined range of azimuth angles ([0032] teaches scanning at a sequence of azimuthal setpoints), and scan a patterned wafer ([0051] teaches that a sample being scanned is a physical object that can be subject to an analytic procedure with a beam. The definition encompasses a patterned wafer. [0033] also teaches that the disclosed technologies are suitable for semiconductor wafers), utilizing the BSEM tool, at selected tilt angle range ([0108] teaches scanning a sample at different tilts, which inherently requires a range); and
wherein the system (fig. 17 element 1700) for calibrating a tilt angle of an electron beam of a the BSEM tool comprises: a processing unit (fig. 17 element 1722) configured to: receive the plurality of images obtained during scanning of the bare wafer ([0108] teaches that the computing system, fig. 17 element 1700, can acquire the ECP data or images); generate a calibration map representing the crystal structure of the bare wafer ([0099] teaches a library of electron channeling data, which is the calibration map, for the crystal lattice of an instant sample. [0108] teaches that the computing system, fig. 17 element 1700, can generate such ECP data or images);
select a tilt angle and defining an expected diffraction pattern associated with the tilt angle, based on the calibration map ([0099] teaches generating an initial electron channeling pattern ECP P0 at a starting tilt and using the library of electron channeling data as an expected diffraction pattern to estimate an existing tilt and determine a compensatory tilt T1 to achieve a desired alignment); obtain the image from the scanning of the patterned wafer ([0051] teaches that a sample being scanned is a physical object that can be subject to an analytic procedure with a beam. The definition encompasses a patterned wafer. [0033] also teaches that the disclosed technologies are suitable for semiconductor wafers) at the selected tilt angle ([0099] teaches generating an initial electron channeling pattern ECP P0 at a starting tilt);
compare the diffraction pattern of the image of the patterned wafer with the expected diffraction pattern ([0099] teaches that the instructions for block 1044 extract one or more features from ECP P0. Using these features and a library of electron channeling data as the expected diffraction pattern for comparison); determine a corrected tilt angle suitable for scanning the patterned wafer, wherein the determining comprises aligning the diffraction pattern of the patterned wafer with the expected diffraction pattern ([0099] teaches comparing the diffraction pattern with a library of electron channeling data to align features. The instructions for block 1046 determine a compensatory tilt T1 to bring the zone axis into the field of view), and instruct the BSEM tool to change the tilt angle of the electron beam to the corrected tilt angle ([0099] teaches that the instructions for block 1048 can cause tilt T1, the correction angle, to be applied between the sample and the electron beam).
13. Regarding claim 15:
Han discloses the system of claim 13. Han further discloses wherein the processing unit (fig. 17 element 1722) is further configured to conduct a metrology analysis ([0035] teaches using a scanning electron microscope to perform metrology analysis) of the obtained patterned wafer images, based on the scans thereof at the corrected tilt angle ([0099] teaches producing an ECP image P1 at the corrected tilt T1. This is done on a "sample" which can include a patterned wafer, as previously established in [0051]).
Claim Rejections - 35 USC § 103
14. In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
15. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
16. Claims 2, 10, 14 are rejected under 35 U.S.C 103 as being unpatentable over Han in view of Pathangi Sriraman (US 20190214223 A1).
17. Regarding claim 2:
Han discloses the method of claim 1. Han also discloses scanning patterned wafers at the corrected tilt angle ([0099] teaches that instructions for block 1048 apply tilt T1 as the corrected tilt angle, and then instructions for block 1050 produce another ECP image (P1) at that applied tilt. This is done on a "sample", which can include a patterned wafer, as previously established in [0051]). Han fails to disclose scanning one or more additional patterned wafers.
However, Pathangi Sriraman discloses scanning one or more additional patterned wafers ([0005] teaches that metrology measurements are used to alter one or more parameters of the process such that additional wafers manufactured by the process have acceptable characteristics. [0014] teaches that the metrology area image of the wafer can be obtained using a scanning electron microscope).
The inventions are analogous because they are directed towards calibrating scanning electron microscope for consistent scanning of samples (Han [0099] teaches adjusting the tilt angle to determine the offcut angle of a sample and refine the system’s calibration. Pathangi Sriraman [0057] teaches tool tuning to reduce distortion during calibration). It would have been obvious to one of ordinary skill in the art, before the effective filing date of the claimed invention to have modified Han in view of Pathangi Sriraman to include scanning one or more additional patterned wafers. Such modification would allow determining whether all additional wafers have acceptable characteristics for an increased share in advanced process control (as taught in Pathangi Sriraman [0005] and [0006]).
18. Regarding claim 10:
Han discloses the method of claim 9. Han further discloses scanning patterned wafers at the corrected tilt angle ([0099] teaches that instructions for block 1048 apply tilt T1 as the corrected tilt angle, and then instructions for block 1050 produce another ECP image (P1) at that applied tilt. This is done on a "sample", which can include a patterned wafer, as previously established in [0051]). Han fails to disclose scanning one or more additional patterned wafers.
However, Pathangi Sriraman discloses scanning one or more additional patterned wafers ([0005] teaches that metrology measurements are used to alter one or more parameters of the process such that additional wafers manufactured by the process have acceptable characteristics. [0014] teaches that the metrology area image of the wafer can be obtained using a scanning electron microscope).
The inventions are analogous because they are directed towards calibrating scanning electron microscope for consistent scanning of samples. It would have been obvious to one of ordinary skill in the art, before the effective filing date of the claimed invention to have modified Han in view of Pathangi Sriraman to include scanning one or more additional patterned wafers. Such modification would allow determining whether all additional wafers have acceptable characteristics for an increased share in advanced process control (as taught in Pathangi Sriraman [0005] and [0006]).
19. Regarding claim 14:
Han discloses the system of claim 13. Han further discloses scanning patterned wafers at the corrected tilt angle ([0099] teaches that instructions for block 1048 apply tilt T1 as the corrected tilt angle, and then instructions for block 1050 produce another ECP image (P1) at that applied tilt. This is done on a "sample", which can include a patterned wafer, as previously established in [0051]). Han fails to disclose scanning one or more additional patterned wafers.
However, Pathangi Sriraman discloses scanning one or more additional patterned wafers ([0005] teaches that metrology measurements are used to alter one or more parameters of the process such that additional wafers manufactured by the process have acceptable characteristics. [0014] teaches that the metrology area image of the wafer can be obtained using a scanning electron microscope).
The inventions are analogous because they are directed towards calibrating scanning electron microscope for consistent scanning of samples. It would have been obvious to one of ordinary skill in the art, before the effective filing date of the claimed invention to have modified Han in view of Pathangi Sriraman to include scanning one or more additional patterned wafers. Such modification would allow determining whether all additional wafers have acceptable characteristics for an increased share in advanced process control (as taught in Pathangi Sriraman [0005] and [0006]).
20. Claims 3 and 5 are rejected under 35 U.S.C 103 as being unpatentable over Han in view of Vystavel (US 10504689 B2).
21. Regarding claim 3:
Han discloses the method of claim 1. Han fails to disclose that wherein the plurality of tilt angle varies by approximately 1 degree, between scans.
However, Vystavel discloses that wherein the plurality of tilt angle varies by approximately 1 degree, between scans (column 2 lines 57-59, fig. 2 teaches an electron channeling pattern with markings corresponding to 0.1 degree tilt increments. Column 6 lines 11-14 teaches backscattered electron current as a function of angle over a 2 degree angular range. Because the system taught by Vystavel can operate and measure at 0.1-degree increments, it inherently encompasses varying the angle by a larger increment like approximately 1 degree between scans).
The inventions are analogous because they are directed towards calibrating scanning electron microscope for consistent scanning of samples (Vystavel column 4 lines 17-19 teaches that alignment can include adjustment of an imaging system such as an SEM). It would have been obvious to one of ordinary skill in the art, before the effective filing date of the claimed invention to have modified Han in view of Vystavel to include that wherein the plurality of tilt angle varies by approximately 1 degree, between scans. Such modification allows aligning a substrate surface with respect to a charged particle beam based on the variations in beam current as a function of angle (as taught in Vystavel column 6 lines 14-18).
22. Regarding claim 5:
Han discloses the method of claim 1. Han fails to disclose that wherein the tilt angle range around the desired tilt angle comprises the selected tilt angle ± about 2-5 degrees.
However, Vystavel discloses that wherein the tilt angle range around the desired tilt angle comprises the selected tilt angle ± about 2-5 degrees (column 4 lines 9-28 teaches that a specimen tilt is adjusted so that a specimen surface faces a particular direction. The specimen surface is aligned if the axis are perpendicular or parallel if within ±5 degrees, ±3 degrees, ±1 degree, ±0.5 degrees, ±0.2 degrees, or ±0.1 degrees of perpendicular or parallel).
The inventions are analogous because they are directed towards calibrating scanning electron microscope for consistent scanning of samples. It would have been obvious to one of ordinary skill in the art, before the effective filing date of the claimed invention to have modified Han in view of Vystavel to include that wherein the tilt angle range around the desired tilt angle comprises the selected tilt angle ± about 2-5 degrees. Such modification provides a specific, measurable tolerance defining what is considered functionally aligned as opposed to a perfectly aligned system (as taught in Vystavel column 4 lines 4-28).
23. Claim 4 is rejected under 35 U.S.C 103 as being unpatentable over Han.
24. Regarding claim 4:
Han discloses the method of claim 1, but fails to specify that the predetermined range of azimuth angles is approximately 2 degrees. However, Han does teach that the predetermined range can be between 0 and 360 degrees (as taught in [0087]). In the case where the claimed ranges "overlap or lie inside ranges disclosed by the prior art" a prima facie case of obviousness exists. In re Wertheim, 541 F.2d 257, 191 USPQ 90 (CCPA 1976). It would have been obvious to one of ordinary skill in the art, before the effective filing date of the claimed invention to narrow the range of azimuth angles to approximately 2 degrees to shorten the scanning process ([0032] teaches that using less azimuthal setpoints reduces the scanning time). As such, Han’s teaching of a predetermined range between 0 and 360 degrees makes the claimed range of 2 degrees obvious.
25. Claims 6 and 11 are rejected as being unpatentable over Han in view of Mori (US 10811218 B2).
26. Regarding claim 6:
Han discloses the method of claim 1. Han also discloses that comparing and correcting comprises comparing the image obtained during scanning of the patterned wafer ([0051] teaches that a sample being scanned is a physical object that can be subject to an analytic procedure with a beam. The definition encompasses a patterned wafer. [0033] also teaches that the disclosed technologies are suitable for semiconductor wafers) at the selected tilt angle ([0099] generating an ECP P0 at a starting angle) with the image obtained during scanning of the bare wafer ([0040] teaches that calibration of angular coordinates can be done using a reference sample of known Si wafer, which is a bare wafer, at the same working distance) such that the diffraction pattern obtained during scanning of the patterned wafer aligns with the expected diffraction pattern ([0099] teaches the instructions for block 1044 extract one or more features from ECP P0. Using these features and a library of electron channeling data, which is the expected diffraction pattern, for comparison).
Han fails to disclose that comparing and correcting comprises superimposing the images.
However, Mori discloses that comparing and correcting comprises superimposing the images (column 19 lines 6-11 teaches observing the two Kikuchi maps displayed in the overlapped manner).
The inventions are analogous because they are directed towards calibrating scanning electron microscope for consistent scanning of samples (Mori column 3 lines 18-28 teaches adjusting the incident direction of a charged particle beam so that a desired crystal orientation figure can be created in an SEM). It would have been obvious to one of ordinary skill in the art, before the effective filing date of the claimed invention to have modified Han in view of Mori to include that comparing and correcting comprises superimposing the images. Such modification would allow visually identifying and designating a single common electron beam direction to provide the necessary input for subsequent tilt adjustment (as taught in Mori column 19 lines 6-19).
27. Regarding claim 11:
Han discloses the method of claim 9. Han also discloses that comparing and correcting comprises comparing the image obtained during scanning of the patterned wafer ([0051] teaches that a sample being scanned is a physical object that can be subject to an analytic procedure with a beam. The definition encompasses a patterned wafer. [0033] also teaches that the disclosed technologies are suitable for semiconductor wafers) at the selected tilt angle ([0099] generating an ECP P0 at a starting angle) with the image obtained during scanning of the bare wafer such that the diffraction pattern obtained during scanning of the patterned wafer aligns with the expected diffraction pattern ([0099] teaches the instructions for block 1044 extract one or more features from ECP P0. Using these features and a library of electron channeling data, which is the expected diffraction pattern, for comparison).
Han fails to disclose that comparing and correcting comprises superimposing the images.
However, Mori discloses that comparing and correcting comprises superimposing the images (column 19 lines 6-11 teaches observing the two Kikuchi maps displayed in the overlapped manner).
The inventions are analogous because they are directed towards calibrating scanning electron microscope for consistent scanning of samples (Mori column 3 lines 18-28 teaches adjusting the incident direction of a charged particle beam so that a desired crystal orientation figure can be created in an SEM). It would have been obvious to one of ordinary skill in the art, before the effective filing date of the claimed invention to have modified Han in view of Mori to include that comparing and correcting comprises superimposing the images. Such modification would allow visually identifying and designating a single common electron beam direction to provide the necessary input for subsequent tilt adjustment (as taught in Mori column 19 lines 6-19).
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to LARRY LI whose telephone number is (571) 272-5043. The examiner can normally be reached 8:30am-4:30pm. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Robert Kim can be reached at (571)272-2293. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000.
/LARRY LI/
Examiner, Art Unit 2881
/WYATT A STOFFA/Primary Examiner, Art Unit 2881