Prosecution Insights
Last updated: April 19, 2026
Application No. 18/370,419

DISPLAY DEVICE

Non-Final OA §102§103§112
Filed
Sep 20, 2023
Examiner
TYNES JR., LAWRENCE C
Art Unit
2899
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Samsung Display Co., Ltd.
OA Round
1 (Non-Final)
85%
Grant Probability
Favorable
1-2
OA Rounds
2y 5m
To Grant
94%
With Interview

Examiner Intelligence

Grants 85% — above average
85%
Career Allow Rate
649 granted / 763 resolved
+17.1% vs TC avg
Moderate +9% lift
Without
With
+8.9%
Interview Lift
resolved cases with interview
Typical timeline
2y 5m
Avg Prosecution
38 currently pending
Career history
801
Total Applications
across all art units

Statute-Specific Performance

§101
0.6%
-39.4% vs TC avg
§103
53.4%
+13.4% vs TC avg
§102
30.5%
-9.5% vs TC avg
§112
10.7%
-29.3% vs TC avg
Black line = Tech Center average estimate • Based on career data from 763 resolved cases

Office Action

§102 §103 §112
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Claim Objections Claims 15-20 are objected to because of the following informalities: The claim recites, “and second partition wall openings corresponding to respective openings”. It is unclear what applicant means by respective openings. Appropriate correction is required. Claim Rejections - 35 USC § 102 The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. Claim(s) 1-6,13-14 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Joe et al. (US-20220165834-A1; Joe) . Regarding claim 1, Joe discloses a display device comprising a display panel including a display area (Fig. 3, DA; ¶62) including emission areas (Fig. 3/4, SP; ¶63) and a non-emission area (Fig. 3/4, FPS; ¶63) adjacent to the emission areas, wherein the display panel comprises: a pixel defining layer (Fig. 6,PDL; ¶101) that includes first openings corresponding to the emission areas (Fig. 6, ED; ¶101) and a second opening corresponding to the non-emission area (Fig. 6, PD; ¶101); light emitting elements each including a first electrode (Fig. 6, PE; ¶102), a second electrode (Fig. 6,CE; ¶102), and a light emitting layer (Fig. 6, EL; ¶102) disposed between the first electrode and the second electrode, wherein each of the light emitting elements is disposed in a corresponding one of the first openings; and a photovoltaic (converts light into a signal) element (Fig. 6,PD; ¶108) including a first cell electrode (Fig. 6, FPE; ¶108), a second cell electrode (Fig. 6, CE; ¶108), and an optical photovoltaic layer (Fig. 6, NSL/PL/PSL; ¶108) disposed between the first cell electrode and the second cell electrode, wherein the photovoltaic element is disposed in the second opening. Regarding claim 2, Joe discloses the display device of claim 1, wherein the first electrodes (Fig. 6, PE; ¶102) and the first cell electrode (Fig. 6, FPE; ¶108) are disposed on the same layer. Regarding claim 3, Joe discloses the display device of claim 1, wherein the second electrode (Fig. 6,CE; ¶102) and the second cell electrode (Fig. 6, CE; ¶108) are integral. Regarding claim 4, Joe discloses the display device of claim 3, further comprising a protection layer (Fig. 6, TFEL; ¶86) disposed on the second electrode (Fig. 6,CE; ¶102) and the second cell electrode. (Fig. 6, CE; ¶108) Regarding claim 5, Joe discloses the display device of claim 1, wherein the second opening (Fig. 4 and 6, location of PD; ¶108) is provided in plural (multiple), and the first cell electrode (Fig. 6, FPE; ¶108) and the optical photovoltaic layer (Fig. 6, NSL/PL/PSL; ¶108) are provided in plural (Fig. 4), wherein a portion of each of the first cell electrodes is disposed in a corresponding second opening among the second openings, and each of the optical photovoltaic layers is disposed in a corresponding second opening among the second openings. Since figure 6 is a cross section of figure 4 it is understood that the configuration of figure 6 is in plural as claimed. Regarding claim 6, Joe discloses the display device of claim 5, wherein the pixel defining layer (Fig. 6,PDL; ¶101) overlaps the non- emission area and forms third openings (Fig. 4 and 6, another row or column of openings at location of PD; ¶108) spaced apart from the second openings (Fig. 4 and 6, location of PD; ¶108), wherein the display panel comprises optical sensors (Fig. 4 and 6, FPS; ¶107) each including a light detection element including a first sensor electrode (Fig. 6, FPE; ¶108), a second sensor electrode (Fig. 6, CE; ¶108), and a light receiving layer (Fig. 6, NSL/PL/PSL; ¶108) disposed between the first sensor electrode and the second sensor electrode and disposed in a corresponding third opening among the third openings, and a sensor driving unit including at least one transistor (Fig. 6, FT; ¶88). Third openings are a different row or column from second openings (Fig. 4). Regarding claim 13, Joe discloses the display device of claim 1, wherein the photovoltaic element further comprises a cell hole control layer (Fig. 6, NSL; ¶108) disposed between the first cell electrode (Fig. 6, FPE; ¶108) and the optical photovoltaic layer (Fig. 6, PL; ¶108) and a cell electron control layer (Fig. 6, PSL; ¶108) disposed between the optical photovoltaic layer and the second cell electrode. Hole control layers (hole selective layers, hole extracting layer) are N-Type materials. P-type materials act as an electron control layer by using acceptor impurities (e.g., Boron) to create a high concentration of electron vacancies, known as holes, which are the majority charge carriers Regarding claim 14, Joe discloses the display device of claim 13, wherein each of the light emitting elements (Fig. 6, ED; ¶102) further comprises a hole control layer (Fig. 6, NSL; ¶102) disposed between the first electrode (Fig. 6,PE; ¶102) and the light emitting layer (Fig. 6, EL; ¶102) and an electron control layer (Fig. 6, PSL; ¶102) disposed between the light emitting layer and the second electrode (Fig. 6, CE; ¶102), wherein the electron control layer, the cell electron control layer (Fig. 6, PSL; ¶108), the hole control layer, or the cell hole control layer (Fig. 6, NSL; ¶108) has an integral shape. (The same shape) Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claim(s)7-8 is/are rejected under 35 U.S.C. 103 as being unpatentable over Joe et al. (US-20220165834-A1; Joe). Regarding claim 7, Joe discloses the display device of claim 6, wherein an area of at least one of the second openings and an area of at least one of the third openings are different from each other. However this is a mere change in size of the element. Changing the size of the opening would not cause the photovoltaic layer to behave in an unexpected way. Where the only difference between the prior art and the claims was a recitation of relative dimensions of the claimed device and a device having the claimed relative dimensions would not perform differently than the prior art device, the claimed device was not patentably distinct from the prior art device. MPEP 2144.04 (IV)(A) Therefore, before the effective filing date a change in size for a fingerprint sensing area would be obvious to one of ordinary skill in the art to accommodate different fingerprint sizes. Regarding claim 8, Joe discloses the display device of claim 1, wherein the second opening (Fig. 4 and 6, location of PD; ¶108) is a single opening, wherein a shape of the optical photovoltaic layer (Fig. 6, NSL/PL/PSL; ¶108) corresponds to a shape of the non- emission area. Each opening is a single opening. Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claim(s) 9-10 is/are rejected under 35 U.S.C. 103 as being unpatentable over Joe et al. (US-20220165834-A1; Joe) in view of Cheng et al. (US-20220283657-A1; Cheng). Regarding claim 9, Joe discloses the display device of claim 1, further comprising an encapsulation layer (Fig. 6, TFEL; ¶108) but is silent on including a first inorganic layer covering the light emitting elements, a second inorganic layer, and an organic layer disposed between the first inorganic layer and the second inorganic layer. Cheng discloses a display device that utilizes an encapsulation (Fig. 16, 40; ¶48) over the PDL (Fig. 16, PDL; ¶82) and pixel areas. (Fig. 16, 30; ¶80) Before the effective filing date it would have been obvious to one having ordinary skill in the art to use this encapsulant configuration to prevent water and oxygen from corroding the light-emitting elements. Regarding claim 10, Joe in view of Cheng discloses the display device of claim 9, further comprising an input detection layer (Fig. 6, TSL; ¶118 Joe) including conductive layers (touch electrodes) and a detection insulating layer (required to insulate the electrodes), and disposed on the encapsulation layer. (Fig. 6, TFEL; ¶108 Joe) Claim(s) 11 is/are rejected under 35 U.S.C. 103 as being unpatentable over Joe et al. (US-20220165834-A1; Joe) in view of Cheng et al. (US-20220283657-A1; Cheng) and further in view of Yeo et al. (US-20220199948-A1; Yeo). Regarding claim 11, Joe in view of Cheng discloses the display device of claim 10, further comprising a color filter layer including a light blocking layer overlapping the pixel defining layer and color filters overlapping a corresponding emission area among the emission areas. Yeo discloses a display panel comprising a color filter (Fig. 2, CFL; ¶143) and blocking layer (Fig. 2, BML; ¶143) overlapping emission areas and pixel defining layers respectively. Before the effective filing date of the invention it would have been obvious to one having ordinary skill in the art to combine the emission area configuration with the emission area of Joe to limit crosstalk and control color output. Claim(s) 12 is/are rejected under 35 U.S.C. 103 as being unpatentable over Joe et al. (US-20220165834-A1; Joe) in view of Cheng et al. (US-20220283657-A1; Cheng) and further in view of Kim et al. (US-20180033830-A1; Kim). Regarding claim 12, Joe in view of Cheng discloses the display device of claim 10, but is silent on further comprising an optical member including an antireflection film, a polarizing film, or a gray filter and disposed on the input detection layer. Kim discloses a display comprising an input detection layer (Fig. 2, TS; ¶54) with an optical member (Fig. 2, polarizing film LM; ¶53) disposed thereon. Before the effective filing date it would have been obvious to one having ordinary skill in the art to use the polarizing film with the input detection layer for preventing false touch triggers. Allowable Subject Matter Claims 15-20 allowed. The following is an examiner’s statement of reasons for allowance, which paraphrases and summarizes the claimed invention without intending to be limiting, wherein the legally defined scope of the claimed invention is defined by the allowed claims themselves in view of the written description under 35 USC 112. This statement is not intended to necessarily state all the reasons for allowance or all the details why the claims are allowed and has not been written to specifically or impliedly state that all the reasons for allowance are set forth (MPEP 1302.14). US-20210210557-A1 discloses a plurality of partition walls spaced apart on an encapsulant in the non-display area, where a photovoltaic element is beneath a wall opening. However the partitions and associated encapsulant do not overlap the PDL . CN 108229417 A discloses partitioning walls over a photo sensing region and on an encapsulant that covers a light emitting region. However the partitions do not overlap a PDL. Regarding claim 15, the references of the Prior Art of record and considered pertinent to the applicant's disclosure and to the examiner’s knowledge does not teach or render obvious, at least to the skilled artisan, the instant invention regarding: " a partition wall layer including a first partition wall opening overlapping a portion of the pixel defining layer and second partition wall openings corresponding to respective openings, wherein the partition wall layer is disposed on the encapsulation layer; …wherein the photovoltaic element is disposed in the first partition wall opening.”, as recited in Claim 15, with the remaining features. Any comments considered necessary by applicant must be submitted no later than the payment of the issue fee and, to avoid processing delays, should preferably accompany the issue fee. Such submissions should be clearly labeled “Comments on Statement of Reasons for Allowance.” Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to LAWRENCE C TYNES JR. whose telephone number is (571)270-7606. The examiner can normally be reached 9AM-5PM. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Zandra Smith can be reached at 571-272-2429. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /LAWRENCE C TYNES JR./Examiner, Art Unit 2899
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Prosecution Timeline

Sep 20, 2023
Application Filed
Dec 27, 2025
Non-Final Rejection — §102, §103, §112
Mar 26, 2026
Examiner Interview Summary
Mar 26, 2026
Applicant Interview (Telephonic)

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
85%
Grant Probability
94%
With Interview (+8.9%)
2y 5m
Median Time to Grant
Low
PTA Risk
Based on 763 resolved cases by this examiner. Grant probability derived from career allow rate.

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