DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1-4, 6-11,13-18, and 20 is/are rejected under 35 U.S.C. 103 as being unpatentable over Zhang et al. (US 20220199418) in view of Chen et al. (US 6238997 B1).
Regarding claim 1, Zhang et al. teaches a semiconductor processing method [¶ 0006] comprising:
providing a silicon-containing precursor and an oxygen-containing precursor [¶¶0007, 0008, and 0038, Zhang et al.] to a processing region of a semiconductor processing chamber [¶0007, Zhang et al.], wherein a substrate is housed within the processing region [¶0036, Zhang et al.], and wherein a feature [Fig. 2I, 222, Zhang et al.] extends through alternating layers of oxygen-containing material and nitrogen-containing material [Fig. 2I, alternating layers of nitride and oxide 212 and 214, Zhang et al.] disposed on the substrate [¶0007, 110, Zhang et al.];
forming plasma effluents of the silicon-containing precursor and the oxygen- containing precursor [¶0008]; and
contacting the substrate with the plasma effluents of the silicon-containing precursor and the oxygen-containing precursor [¶0008 and Fig. 3A], wherein the contacting forms a silicon-and- oxygen-containing material on at least a bottom portion of the feature [Fig. 2A-H and ¶0006], and wherein a temperature in the processing region is maintained at less than or about 0°C [¶0007].
Zhang et al. doesn’t teach a feature partially extending through alternating layers of oxygen-containing material and nitrogen-containing material.
Chen et al. teaches a feature partially extending through layers of oxygen-containing material and nitrogen-containing material [Fig. 3, Abstract, Col. 7 Lines 17-46, the layers may contain oxygen and nitrogen containing materials in an alternating fashion and it is seen through Fig. 3, there is a feature which partially extend through the layers, Col. 8 Lines 38-65].
It would have been obvious for a person of ordinary skill in the art before the effective filing date to combine the semiconductor processing method as taught by Zhang et al. with the partial etching of the feature as taught by Chen et al. because both references address the problem of forming or maintaining high-aspect-ratio features in layered semiconductor structures, and Zhang’s in-situ, low-temperature silicon-and-oxygen-containing passivation would have predictably improved bottom-side passivation and reduced lateral etching and profile distortion during continued etching of Chen’s multilayer feature. The proposed combination would merely have applied Zhang’s known passivation technique to the layered etch environment taught by Chen to obtain the predictable result of improved feature profile control.
Regarding claim 2, Zhang et al. in view of Chen et al. teaches the method of claim 1, wherein the silicon-containing precursor further comprises a halogen [i.e. fluorine, ¶¶ 0006 and 0007, Zhang et al.].
Regarding claim 3, Zhang et al. in view of Chen et al. teaches the method of claim 1, wherein the silicon-containing precursor comprises silicon tetrafluoride (SiF4) [¶¶ 0021 and 0037].
Regarding claim 4, Zhang et al. in view of Chen et al. teaches the method of claim 1, wherein the oxygen-containing precursor comprises diatomic oxygen (O2) [¶0037, Zhang et al.].
Regarding claim 7, Zhang et al. in view of Chen et al. teaches the method of claim 1, wherein the plasma effluents of the silicon-containing precursor and the oxygen-containing precursor are formed at a plasma power of less than or about 2,000 W (high-frequency or low-frequency power, between 1 W to 10,000 W [¶0044, Zhang et al.]).
Regarding claim 8, Zhang et al. in view of Chen et al. teaches the method of claim 1, further comprising: applying a bias power while contacting the substrate with the plasma effluents of the silicon-containing precursor and the oxygen-containing precursor [¶0044, Zhang et al.]
Regarding claim 9, Zhang et al. in view of Chen et al. teaches the method of claim 8, wherein the bias power is less than or about 2,500 W (high-frequency or low-frequency power is between 1 W to 10,000 W where additional DC bias may be applied [¶0044, Zhang et al.]).
Regarding claim 10, Zhang et al. in view of Chen et al. teaches the method of claim 1, further comprising: prior to providing the silicon-containing precursor to the processing region, etching the feature in the substrate (through recess etching [¶0055, 110, Zhang et al.]).
Regarding claim 11, Zhang et al. teaches a semiconductor processing method [¶0006] comprising:
providing a silicon-and-halogen-containing precursor and an oxygen-containing precursor to a processing region of a semiconductor processing chamber [¶¶0007 and 0038, i.e. Silicon tetrafluoride and O2], wherein a substrate is housed within the processing region [¶0036], and wherein a feature extends through alternating layers of oxygen-containing material and nitrogen-containing material disposed on the substrate [¶0007, feature, slit, 222 extends through alternating layers of nitride and oxide, 212 and 214, disposed on the substrate 110];
forming plasma effluents of the silicon-and-halogen-containing precursor and the oxygen-containing precursor [¶0008, i.e. fluorine]; and
contacting the substrate with the plasma effluents of the silicon-and-halogen- containing precursor and the oxygen-containing precursor [¶0008 and Fig. 3A, silicon, fluorine, and oxygen], wherein the contacting forms a silicon-oxygen-and-halogen-containing material on at least a bottom portion of the feature [Fig. 2A-H and ¶0006].
Zhang et al. doesn’t teach a feature partially extending through alternating layers of oxygen-containing material and nitrogen-containing material.
Chen et al. teaches a feature partially extending through layers of oxygen-containing material and nitrogen-containing material [Fig. 3, Abstract, Col. 7 Lines 17-46, the layers may contain oxygen and nitrogen containing materials in an alternating fashion and it is seen through Fig. 3, there is a feature which partially extend through the layers, Col. 8 Lines 38-65]
It would have been obvious for a person of ordinary skill in the art before the effective filing date to combine the semiconductor processing method as taught by Zhang et al. with the partial etching of the feature as taught by Chen et al. because it would be more efficient and economically friendly as described by Chen et al. (Col. 2, Lines 40-49).
Regarding claim 13, Zhang et al. in view of Chen et al. teaches the method of claim 11 wherein a flow rate of the oxygen-containing precursor is less than or about 25 sccm (Zhang teaches between 1 sccm and 1000 sccm which includes the claimed range [¶0041, Zhang et al.]).
Regarding claim 14, Zhang et al. in view of Chen et al. teaches the method of claim 11 wherein the silicon- oxygen-and-halogen-containing material is formed in the same semiconductor processing chamber in which the feature is etched [¶0097, Zhang et al.].
Regarding claim 15, Zhang et al. in view of Chen et al. teaches the method of claim 11 wherein the silicon- oxygen-and-halogen-containing material is physisorbed on the feature [¶0079 and Fig. 2A-H, Zhang teaches the ratios of the silicon-oxygen-and halogen(fluorine) are optimized to enhance physisorption of SiFx and then discusses the increase in the deposition rate of SiOxFy showcasing the physisorption of the silicon- oxygen-and-halogen-containing material].
Regarding claim 16, Zhang et al. in view of Chen et al. teaches the method of claim 11 wherein a temperature in the processing region is maintained at low temperature below 0°C (Zhang gives a range example between -120 to 0°C covering the range discussed in the claim [¶¶0045 and 0046, Zhang et al.]).
Regarding claim 17, Zhang et al. in view of Chen et al. teaches the method of claim 11 wherein a pressure in the processing region is maintained at less than or about 100 mTorr (pressure range given between 1 mTorr and 1 atm which includes the claimed range [¶0041, Zhang et al.]).
Regarding claim 18, Zhang et al. teaches a semiconductor processing method [¶0006] comprising:
providing one or more etchant precursors to a processing region of a semiconductor processing chamber [¶¶0006, 0007, 0008, and 0038, Zhang et al.], wherein a substrate is housed within the processing region [¶0036, Zhang et al.], and wherein the substrate comprises alternating layers of oxygen-containing material and nitrogen containing material [¶0007, Zhang teaches a substrate comprising a first, second, and third region which can be interpreted as layers of the substrate];
contacting the substrate with the one or more etchant precursors, wherein the contacting etches a feature into the alternating layers of oxygen-containing material and nitrogen-containing material [¶¶0036 and 0037, Zhang teaches a feature being etched into the nitride layer from etchant precursors comprising of fluorosaline and oxygen];
halting a flow of the one or more etchant precursors [¶0027, Zhang teaches the deposition step and etch step may be combined and preformed as a single step implying, they can be performed separately meaning there would need to be halting of the etchant precursor];
providing a silicon-containing precursor and an oxygen-containing precursor to the processing region [¶¶ 0007 and 0038, Zhang et al.];
forming plasma effluents of the silicon-containing precursor and the oxygen-containing precursor [¶0007, precursors comprising of silicon, fluorine, and oxygen, Zhang et al.]; and
contacting the substrate with the plasma effluents of the silicon-containing precursor and the oxygen-containing precursor [¶ 0008 and Fig. 3A, Zhang et al.], wherein the contacting forms a passivation material on at least a bottom portion of the feature [Fig. 2A-H and ¶0006, Zhang et al.], and wherein a temperature in the processing region is maintained at less than or about 0°C [¶0007, Zhang et al.].
Zhang et al. doesn’t teach a feature partially extending through alternating layers of oxygen-containing material and nitrogen-containing material.
Chen et al. teaches a feature partially extending through layers of oxygen-containing material and nitrogen-containing material [Fig. 3, Abstract, Col. 7 Lines 17-46, the layers may contain oxygen and nitrogen containing materials in an alternating fashion and it is seen through Fig. 3, there is a feature which partially extend through the layers, Col. 8 Lines 38-65]
It would have been obvious for a person of ordinary skill in the art before the effective filing date to combine the semiconductor processing method as taught by Zhang et al. with the partial etching of the feature as taught by Chen et al. because it would be more efficient and economically friendly as described by Chen et al. (Col. 2, Lines 40-49).
Zhang et al. doesn’t teach the contacting partially etches feature extending through alternating layers of oxygen-containing material and nitrogen-containing material.
Chen et al. teaches a feature partially extending through layers of oxygen-containing material and nitrogen-containing material [Fig. 3, Abstract, Col. 7 Lines 17-46, the layers may contain oxygen and nitrogen containing materials in an alternating fashion and it is seen through Fig. 3, there is a feature which partially extend through the layers, Col. 8 Lines 38-65]
It would have been obvious for a person of ordinary skill in the art before the effective filing date to combine the semiconductor processing method as taught by Zhang et al. with the partial etching of the feature as taught by Chen et al. because it would be more efficient and economically friendly as described by Chen et al. (Col. 2, Lines 40-49).
Regarding claim 20, Zhang et al. in view of Chen et al. teaches the semiconductor processing method of claim 18, wherein the passivation material comprises a silicon-oxygen-and-halogen-containing material [¶0006, the halogen being fluorine, Zhang et al.].
Claim 5 is rejected under 35 U.S.C. 103 as being unpatentable over Zhang et al. in view of Chen as applied to claim 1 above, and further in view of Hudson et al. (Pub No. US 2016/0163558 A1).
Regarding claim 5, Zhang et al. in view of Chen teaches the aforementioned information that teaches the method of claim 1.
Zhang et al. in view of Chen et al. doesn’t teach a feature depth greater than or about 150 nm.
Hudson et al. teaches a process for a semiconductor device where the etched feature size ranges with a depth based on the type of device made (see ¶¶0039-0042).
It would have been obvious to a person of ordinary skill in the art before the effective filing date of the claimed invention to implement larger feature depths greater than or about 150nm as required by the claims, because the implementation of larger depth features would be sought out as a larger depth would help with higher yield, reduced defects, and consistent quality over the vertical range as discussed in Hudson.
Claim 12 is rejected under 35 U.S.C. 103 as being unpatentable over Zhang et al. in view of Chen et al. as applied to claim 11 above, and further in view of Van Cleemput et al. (US 6395150 B1).
Regarding claim 12, Zhang et al. in view of Chen et al. teaches the aforementioned method of claim 11.
Zhang et al. in view of Chen et al. doesn’t explicitly teach the flow rate ratio of the silicon-and-halogen-containing precursor relative to the oxygen-containing precursor to be greater than or about 10:1.
Van Cleemput et al teaches the flow rate ratio of silicon-and-halogen-containing precursor relative to the oxygen-containing precursor to be greater than or about 10:1 [Col. 5 Lines 1-6, Table 2, Teaches the flow rates which would allow for ratio to occur and discloses the ratio would be dependent on the desired film and wafer size and in Col. 4, Lines 43-67 shows that silicon tetrafluoride can be used].
It would have been obvious for a person of ordinary skill in the art before the effective filing date to combine the method as taught by Zhang et al. with the flow rates taught by Van Cleemput et al. because as stated above, the flow rates are dependent on the film and wafer size and the ideal flow rate ratio can be said to be 10:1 based on the desired film and wafer size.
Claim 19 is rejected under 35 U.S.C. 103 as being unpatentable over Zhang et al. in view of Chen et al. as applied to claim 18 above, and further in view of Abel et al. (Pub No. US20230307290A1).
Regarding claim 19, Zhang et al. in view of Chen et al. teaches the aforementioned method of claim 18.
Zhang et al. in view of Chen et al. doesn’t teach a feature depth greater than 500 nm.
Abel et al. teaches structures that have a depth of 5-8 microns as well as 300-800nm [¶0055].
It would have been obvious to a person of ordinary skill in the art before the effective filing date of the claimed invention to implement larger feature depths as taught by Abel et al, because the implementation of larger depth features would be sought out as a larger depth would help with higher yield, reduced defects, and consistent quality over the vertical range and within the purview of one having ordinary skill in the art.
Response to Arguments
Applicant’s arguments, see Pages 6 and 7 of Response to Office Action of December 29, 2025, filed on 05/27/2026, with respect to the rejection(s) of claim(s) 1, 11, 12, and 18 under Zhang et al. have been fully considered. However, upon further consideration, a new ground(s) of rejection is made in view of Zhang et al. further in view of .
Applicant's arguments filed 05/27/2026 for the rejection of claim 19 have been fully considered but they are not persuasive. Zhang et al. in view of Abel et al. teaches the depth to be in a range of 300-800nm which is able to overcome the greater than 500nm de
Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
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/SUE A PURVIS/Supervisory Patent Examiner, Art Unit 2893
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