DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
Claim(s) 1-4, 6-11,13-18, and 20 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Zhang et. al (U.S. Pub No. US20220199418).
Regarding claim 1, Zhang et al. teaches a semiconductor processing method [¶ 0006] comprising:
providing a silicon-containing precursor and an oxygen-containing precursor [¶¶ 0007, 0008, and 0038] to a processing region of a semiconductor processing chamber [¶0007], wherein a substrate is housed within the processing region [¶ 0036], and wherein a feature [Fig. 2I, 222] extends through one or more layers of material [Fig. 2I, alternating layers of nitride and oxide 212 and 214] disposed on the substrate [¶ 0007, 110];
forming plasma effluents of the silicon-containing precursor and the oxygen- containing precursor [¶ 0008]; and
contacting the substrate with the plasma effluents of the silicon-containing precursor and the oxygen-containing precursor [¶ 0008 and Fig. 3A], wherein the contacting forms a silicon-and- oxygen-containing material on at least a bottom portion of the feature [Fig. 2A-H and ¶0006], and wherein a temperature in the processing region is maintained at less than or about 0°C [¶ 0007].
Regarding claim 2, Zhang et al. teaches the method of claim 1, wherein the silicon-containing precursor further comprises a halogen [i.e. fluorine, ¶¶ 0006 and 0007].
Regarding claim 3, Zhang et al. teaches the method of claim 1, wherein the silicon-containing precursor comprises silicon tetrafluoride (SiF4) [¶¶ 0021 and 0037].
Regarding claim 4, Zhang et al. teaches the method of claim 1, wherein the oxygen-containing precursor comprises diatomic oxygen (O2) [¶0037].
Regarding claim 6, Zhang et al. teaches the method of claim 1, wherein the one or more layers of material comprise alternating layers of oxygen-containing material and nitrogen-containing material [¶¶0007, 0055, and Fig. 2I, comprises alternating layers of nitride 212 and oxide 214]
Regarding claim 7, Zhang et al. teaches the method of claim 1, wherein the plasma effluents of the silicon-containing precursor and the oxygen-containing precursor are formed at a plasma power of less than or about 2,000 W (high-frequency or low-frequency power, between 1 W to 10,000 W [¶0044]).
Regarding claim 8, Zhang et al. teaches the method of claim 1, further comprising: applying a bias power while contacting the substrate with the plasma effluents of the silicon-containing precursor and the oxygen-containing precursor [¶0044]
Regarding claim 9, Zhang et al. teaches the method of claim 8, wherein the bias power is less than or about 2,500 W (high-frequency or low-frequency power is between 1 W to 10,000 W where additional DC bias may be applied [¶0044]).
Regarding claim 10, Zhang et al. teaches the method of claim 1, further comprising: prior to providing the silicon-containing precursor to the processing region, etching the feature in the substrate (through recess etching [¶0055, 110]).
Regarding claim 11, Zhang et al. teaches a semiconductor processing method [¶0006] comprising:
providing a silicon-and-halogen-containing precursor and an oxygen-containing precursor to a processing region of a semiconductor processing chamber [¶¶0007 and 0038, i.e. Silicon tetrafluoride and O2], wherein a substrate is housed within the processing region [¶0036], and wherein a feature extends through one or more layers of material disposed on the substrate [¶0007, feature, slit, 222 extends through layers of nitride and oxide, 212 and 214, disposed on the substrate 110];
forming plasma effluents of the silicon-and-halogen-containing precursor and the oxygen-containing precursor [¶0008, i.e. fluorine]; and
contacting the substrate with the plasma effluents of the silicon-and-halogen- containing precursor and the oxygen-containing precursor [¶ 0008 and Fig. 3A, silicon, fluorine, and oxygen], wherein the contacting forms a silicon-oxygen-and-halogen-containing material on at least a bottom portion of the feature [Fig. 2A-H and ¶0006].
Regarding claim 13, Zhang et al. teaches the method of claim 11 wherein a flow rate of the oxygen-containing precursor is less than or about 25 sccm (Zhang teaches between 1 sccm and 1000 sccm which includes the claimed range [¶0041]).
Regarding claim 14, Zhang et al. teaches the method of claim 11 wherein the silicon- oxygen-and-halogen-containing material is formed in the same semiconductor processing chamber in which the feature is etched [¶0097].
Regarding claim 15, Zhang et al. teaches the method of claim 11 wherein the silicon- oxygen-and-halogen-containing material is physisorbed on the feature [¶0079 and Fig. 2A-H, Zhang teaches the ratios of the silicon-oxygen-and halogen(fluorine) are optimized to enhance physisorption of SiFx and then discusses the increase in the deposition rate of SiOxFy showcasing the physisorption of the silicon- oxygen-and-halogen-containing material].
Regarding claim 16, Zhang et al. teaches the method of claim 11 wherein a temperature in the processing region is maintained at low temperature below 0°C (Zhang gives a range example between -120 to 0°C covering the range discussed in the claim [¶¶0045 and 0046]).
Regarding claim 17, Zhang et al. teaches the method of claim 11 wherein a pressure in the processing region is maintained at less than or about 100 mTorr (pressure range given between 1 mTorr and 1 atm which includes the claimed range [¶0041]).
Regarding claim 18, Zhang et al. teaches a semiconductor processing method [¶0006] comprising:
providing one or more etchant precursors to a processing region of a semiconductor processing chamber [¶¶0006, 0007, 0008, and 0038], wherein a substrate is housed within the processing region [¶0036], and wherein the substrate comprises one or more layers of material [¶0007, Zhang teaches a substrate comprising a first, second, and third region which can be interpreted as layers of the substrate];
contacting the substrate with the one or more etchant precursors, wherein the contacting etches a feature into the one or more layers of material [¶¶0036 and 0037, Zhang teaches a feature being etched into the nitride layer from etchant precursors comprising of fluorosaline and oxygen];
halting a flow of the one or more etchant precursors [¶0027, Zhang teaches the deposition step and etch step may be combined and preformed as a single step implying, they can be performed separately meaning there would need to be halting of the etchant precursor];
providing a silicon-containing precursor and an oxygen-containing precursor to the processing region [¶¶ 0007 and 0038];
forming plasma effluents of the silicon-containing precursor and the oxygen-containing precursor [¶0007, precursors comprising of silicon, fluorine, and oxygen]; and
contacting the substrate with the plasma effluents of the silicon-containing precursor and the oxygen-containing precursor [¶ 0008 and Fig. 3A], wherein the contacting forms a passivation material on at least a bottom portion of the feature [Fig. 2A-H and ¶0006], and wherein a temperature in the processing region is maintained at less than or about 0°C [¶0007].
Regarding claim 20, Zhang et al. teaches wherein the passivation material comprises a silicon-oxygen-and-halogen-containing material [¶0006, the halogen being fluorine].
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention.
Claim 5 is rejected under 35 U.S.C. 103 as being unpatentable over Zhang et al. as applied to claim 1 above, and further in view of Hudson et al. (Pub No. US 2016/0163558 A1).
Regarding claim 5, Zhang et al. teaches the aforementioned information that teaches the method of claim 1.
Zhang et al. doesn’t teach a feature depth greater than or about 150 nm.
Hudson et al. teaches a process for a semiconductor device where the etched feature size ranges with a depth based on the type of device made (see ¶¶0039-0042).
It would have been obvious to a person of ordinary skill in the art before the effective filing date of the claimed invention to implement larger feature depths greater than or about 150nm as required by the claims, because the implementation of larger depth features would be sought out as a larger depth would help with higher yield, reduced defects, and consistent quality over the vertical range as discussed in Hudson.
Claim 12 is rejected under 35 U.S.C. 103 as being unpatentable over Zhang et al. as applied to claim 11 above, and further in view of the following comments.
Regarding claim 12, Zhang et al. teaches the aforementioned method of claim 11.
Zhang et al. doesn’t explicitly teach the flow rate ratio of the silicon-and-halogen-containing precursor relative to the oxygen-containing precursor to be greater than or about 10:1.
One of ordinary skill in the art would have been led to the recited flow rate ratio of 10:1 for the silicon-and-halogen-containing precursor relative to the oxygen-containing precursor through routine experimentation to achieve a desired layer density and concentration of a specific precursor.
In addition, the selection of 10:1 flow rate ratio, it's obvious because it is a matter of determining optimum process conditions by routine experimentation with a limited number of species of result effective variables. These claims are prima facie obvious without showing that the claimed ranges achieve unexpected results relative to the prior art range. In re Woodruff, 16 USPQ2d 1935, 1937 (Fed. Cir. 1990). See also in re Huang, 40 USPQ2d 1685, 1688 (Fed. Cir. 1996) (claimed ranges or a result effective variable, which do not overlap the prior art ranges, are unpatentable unless they produce a new and unexpected result which is different in kind and not merely in degree from the results of the prior art). See also in re Boesch, 205 USPQ 215 (CCPA) (discovery of optimum value of result effective variable in known process is ordinarily within skill or art) and in re Aller, 105 USPQ 233 (CCPA 1995) (selection of optimum ranges within prior art general conditions is obvious).
Note that the specification contains no disclosure of either the critical nature of the claimed flow rate ratio of the silicon-and-halogen-containing precursor relative to the oxygen-containing precursor or any unexpected results arising therefrom. Where patentability is said to be based upon particular silicon-and-halogen-containing precursor relative to the oxygen-containing precursor flow rate ratio of 10:1, the Applicant must show that the chosen flow rate ratio is critical. In re Woodruf, 919 F.2d 1575, 1578, 16 USPQ2d 1934, 1936 (Fed. Cir. 1990).
Claim 19 is rejected under 35 U.S.C. 103 as being unpatentable over Zhang et al. as applied to claim 18 above, and further in view of Abel et al. (Pub No. US20230307290A1).
Regarding claim 19, Zhang et al. teaches the aforementioned method of claim 18.
Zhang et al. doesn’t teach a feature depth greater than or about 300 nm.
Abel et al. teaches structures that have a depth of 5-8 microns as well as 300-800nm [¶0055].
It would have been obvious to a person of ordinary skill in the art before the effective filing date of the claimed invention to implement larger feature depths as taught by Abel et al, because the implementation of larger depth features would be sought out as a larger depth would help with higher yield, reduced defects, and consistent quality over the vertical range and within the purview of one having ordinary skill in the art.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to NOOR MOHAMMAD ISMAIL TAHIR whose telephone number is (571)272-6166. The examiner can normally be reached Monday Friday, 8 a.m. 5 p.m. ET..
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/NOOR MOHAMMAD ISMAIL TAHIR/Examiner, Art Unit 2893
/SUE A PURVIS/Supervisory Patent Examiner, Art Unit 2893