Prosecution Insights
Last updated: October 02, 2026
Application No. 18/374,284

DISPLAY DEVICE

Non-Final OA §102§103§112
Filed
Sep 28, 2023
Priority
Dec 23, 2022 — RE 10-2022-0183087
Examiner
STEPHENSON, KENNETH STEPHEN
Art Unit
2898
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Samsung Display Co., Ltd.
OA Round
2 (Non-Final)
75%
Grant Probability
Favorable
2-3
OA Rounds
6m
Est. Remaining
75%
With Interview

Examiner Intelligence

Grants 75% — above average
75%
Career Allowance Rate
6 granted / 8 resolved
+7.0% vs TC avg
Minimal +0% lift
Without
With
+0.0%
Interview Lift
resolved cases with interview
Typical timeline
3y 6m
Avg Prosecution
25 currently pending
Career history
52
Total Applications
across all art units

Statute-Specific Performance

§101
3.4%
-36.6% vs TC avg
§103
42.7%
+2.7% vs TC avg
§102
28.0%
-12.0% vs TC avg
§112
23.0%
-17.0% vs TC avg
Black line = Tech Center average estimate • Based on career data from 8 resolved cases

Office Action

§102 §103 §112
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Priority Receipt is acknowledged of certified copies of papers required by 37 CFR 1.55. Response to Arguments Regarding the objection to the specification in the previous Office Action filed 10 March 2026, Applicant’s amendments discussed on page 13 in the reply filed 7 May 2026 are acknowledged and overcome the associated objection. As such, the associated objection is withdrawn Regarding the prior art rejections under 35 U.S.C. 102(a)(1) of Claims 1 & 15 as being anticipated by KIM in the aforementioned previous Office Action, Applicant asserts on page 14 of the aforementioned reply: Kim fails to disclose, teach, or suggest at least "wherein the barrier wall comprises a first barrier wall layer and a second barrier wall layer arranged such that the first barrier wall layer is recessed relative to the second barrier wall layer" as now claimed. Applicant’s assertion and associated arguments are acknowledged and have been fully considered but are moot in light of the new grounds of rejection based on the new interpretation of the existing prior art of record as necessitated by Applicant’s amendments. Specifically, YOUNG is now used to teach this limitation for Claims 1 & 15. Regarding the prior art rejection under 35 U.S.C. 103 of Claim 3 in the aforementioned previous Office Action, Applicant asserts on page 17 of the aforementioned reply: Kim and Young, individually or together in any combination, fail to disclose, teach, or suggest all of the elements of claim 3. To support this assertion, Applicant relies on the alleged patentability of the associated and amended base claim, Claim 1. Applicant’s arguments in this regard are acknowledged and have been fully considered but are moot in light of the new grounds of rejection based on the new interpretation of the existing prior art of record and new prior art reference JU as necessitated by Applicant’s amendments to the associated base claim, as these amendments have changed the scope of the associated dependent claims, including amended Claim 2, which presently comprises all of the limitations of previous Claim 3, as Claim 3 is presently canceled. Specifically, Claim 1 stands newly rejected as being unpatentable over YOUNG in view of JU. Therefore Claim 2 cannot be deemed patentable due to its dependence on Claim 1, rendering this argument moot. Further regarding the prior art rejection under 35 U.S.C. 103 of Claim 3 in the aforementioned previous Office Action, Applicant asserts on page 17 of the aforementioned reply: Young does not disclose or suggest the amended limitation that "the barrier wall comprises a first barrier wall layer and a second barrier wall layer arranged such that the first barrier wall layer is recessed relative to the second barrier wall layer.” To support this assertion, Applicant cites YOUNG—regarding components 510 and 515, which the Examiner maps to the claimed first and second barrier wall layers, respectively—and the instant specification, highlighting alleged differences between the known invention of YOUNG and Applicant’s invention and ultimately asserts that 510 and 515 of YOUNG do not teach or suggest said amended limitation. Applicant’s arguments in this regard are acknowledged and have been fully considered but are not found persuasive, as Applicant’s arguments are not commensurate in scope with said amended limitation. Further, as presently written, neither said amended limitation by itself nor Claim 1—in which said amended limitation is found—as whole requires any limitation which precludes the Examiner’s associated item-to-item mapping, as found in the prior art rejections below. Further still, as the Examiner’s associated item-to-item mapping meets all of the requirements of said amended limitation, amending the base claim to require "the barrier wall comprises a first barrier wall layer and a second barrier wall layer arranged such that the first barrier wall layer is recessed relative to the second barrier wall layer" is not deemed to patentably distinguish Applicant’s claimed invention from the known invention of YOUNG in view of JU. Regarding New Claims 22 – 25, Applicant asserts on page 19 of the aforementioned reply that KIM and/or YOUNG fails to disclose, teach, or suggest at least the limitations of these new claims. However, Applicant provides no evidence or support for this assertion. As such, Applicant’s assertion in this regard is acknowledged and has been fully considered but is not found persuasive due to the item-to-item mapping presented by the Examiner in the associated prior art rejections below. Further, as the Examiner’s item-to-item mapping meets all of the limitations of the new claims, amending the application to require the limitations of the new claims is deemed to not patentably distinguish Applicant’s invention from the known invention of the prior art of record. Claim Rejections - 35 USC § 112 The following is a quotation of 35 U.S.C. 112(b): (b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention. Claim 22 is rejected under 35 U.S.C. 112(b) as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor regards as the invention. Regarding Claim 22, Lin. 2 recites the limitation “a pixel defining layer” without a proper antecedent basis. For the purposes of examination, this limitations will be interpreted as “the pixel defining layer”. Examiner’s Note For the following rejections, consider both the original figures of YOUNG and the annotated figure given below. Also with regard to the YOUNG reference, as this document has been machine translated, the PDF of said machine translation has been added to the PTO-892 form of this Office Action and has been modified to include the paragraph numbers referenced below (e.g. EX0, EX1, etc.) for ease of prosecution and clarity of record. PNG media_image1.png 440 685 media_image1.png Greyscale PNG media_image2.png 564 718 media_image2.png Greyscale Claim Rejections - 35 USC § 102 The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. Claims 15 – 17 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by YOUNG (KR 20160137715 A). Regarding Claim 15, YOUNG discloses: A display device (Fig. 5 & Fig. 21: 2102; Par. EX0) comprising: a base layer (Fig. 5: 401); a circuit layer (Fig. 5: CL) disposed on the base layer (401); a plurality of anodes (Fig. 5: 440; Par. EX1 & Fig. 21: 1740; EX0) disposed on the circuit layer (CL); a pixel defining layer (Fig. 5: 450; Par. EX1) disposed on the circuit layer (CL), wherein light emitting openings (Fig. 5: LEO) are defined in the pixel defining layer (450) to overlap the plurality of anodes (440); a barrier wall (Fig. 5: 510/515) disposed on the pixel defining layer (450), wherein barrier openings (BRO) are defined in the barrier wall (510/515) to overlap the light emitting openings (LEO); (Note, BRO of Fig. 5 corresponds to BRO of Fig. 21, as 510 of Fig. 5 corresponds to 2110 of Fig. 21; Par. EX0.) wherein the barrier wall (510/515) comprises a first barrier wall layer (510) and a second barrier wall layer (515) arranged such that the first barrier wall layer (510) is recessed relative to the second barrier wall layer (515); a plurality of intermediate layers (470) disposed on the plurality of anodes (440) and accommodated in the light emitting openings (LEO); and an electrode layer (combined 480s from each TSP) disposed on the plurality of intermediate layers (470), wherein a common voltage is provided to the electrode layer (combined 480s from each TSP) in a first mode, and (This limitation is with respect to the manner in which the claimed device is intended to be used and does not differentiate the claimed device from the device disclosed by YOUNG, as YOUNG teaches all of the structural limitations of this claim, MPEP 2144 II.) a touch sensing signal is provided to the electrode layer (combined 480s from each TSP) in a second mode different from the first mode. (This limitation is with respect to the manner in which the claimed device is intended to be used and does not differentiate the claimed device from the device disclosed by YOUNG, as YOUNG teaches all of the structural limitations of this claim, MPEP 2144 II.) Regarding Claim 16, YOUNG discloses: The display device of claim 15, wherein the barrier wall (510/515 in Fig. 5 or corresponding 2110 in Fig. 21) includes a plurality of barrier wall patterns (islands of 2110) spaced apart from each other, and (As seen in Fig. 21) wherein the electrode layer (combined 480s from each TSP) includes a plurality of touch electrodes (Each 510/515 and its two adjacent 440/470/480 stacks, one of which is shown in Fig. 5 and a plurality of which are shown in Fig. 21 by their corresponding 2110s and adjacent 1740s, respectively; Par. EX0. As these electrodes “touch” the same grid of 1705s—as seen in Fig. 21—they may be construed to be “touch electrodes” under a broadest reasonable interpretation. For brevity and clarity, two such “touch electrodes” are denoted as TSPs—TSP-A and TSP-B—in Fig. 21.), each of which is electrically connected with a corresponding barrier wall pattern (corresponding island of 2110) among the plurality of barrier wall patterns (islands of 2110). (Fig. 5 shows a single TSP, wherein 480 is electrically connected with 510, which corresponds to a given island of 2110 in Fig. 21.) Regarding Claim 17, Young discloses: The display device of claim 16, wherein each of the plurality of touch electrodes (TSPs, one of which is provided in Fig. 5) is electrically connected with a first transistor (Fig. 5: 405/407/410 for subpixel_i) and a second transistor (Fig. 5: 405/407/410 for subpixel_j), and the first transistor (Fig. 5: 405/407/410 for subpixel_i) transfers the common voltage to the plurality of touch electrodes (TSPs) in the first mode and transfers the touch sensing signal to the plurality of touch electrodes (TSPs) in the second mode. (This limitation is with respect to the manner in which the claimed device is intended to be used and does not differentiate the claimed device from the device disclosed by YOUNG, as YOUNG teaches all of the structural limitations of this claim, MPEP 2144 II.) Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claims 1 – 2, 4 – 6, 8, & 23 – 25 are rejected under 35 U.S.C. 103 as being unpatentable over YOUNG in view of JU (US 20180083227 A1). Regarding Claim 1, YOUNG discloses: A display device (Fig. 5 & Fig. 21: 2102; Par. EX0) comprising: a base layer (Fig. 5: 401); a circuit layer (Fig. 5: CL) disposed on the base layer (401); an anode (Fig. 5: 440; Par. EX1 & Fig. 21: 1740; EX0) disposed on the circuit layer (CL); a pixel defining layer (Fig. 5: 450; Par. EX1) disposed on the circuit layer (CL), wherein a light emitting opening (Fig. 5: LEO) is defined in the pixel defining layer (450) to overlap the anode (440); a barrier wall (Fig. 5: 510/515) disposed on the pixel defining layer (450), wherein a barrier opening (BRO) is defined in the barrier wall (510/515) to overlap the light emitting opening (LEO), (Note, BRO of Fig. 5 corresponds to BRO of Fig. 21, as 510 of Fig. 5 corresponds to 2110 of Fig. 21; Par. EX0.) wherein the barrier wall (510/515) comprises a first barrier wall layer (510) and a second barrier wall layer (515) arranged such that the first barrier wall layer (510) is recessed relative to the second barrier wall layer (515); and …. a plurality of touch electrodes (Each 510/515 and its two adjacent 440/470/480 stacks, one of which is shown in Fig. 5 and a plurality of which are shown in Fig. 21 by their corresponding 2110s and adjacent 1740s, respectively; Par. EX0. As these electrodes “touch” the same grid of 1705s—as seen in Fig. 21—they may be construed to be “touch electrodes” under a broadest reasonable interpretation. For brevity and clarity, two such “touch electrodes” are denoted as TSPs—TSP-A and TSP-B—in Fig. 21.) disposed [on the circuit layer (CL)]. YOUNG does not disclose: a thin film encapsulation layer disposed over the circuit layer (CL) to cover the anode (440), the pixel defining layer (450), and the barrier wall (510/515); and … a plurality of touch electrodes (TSPs) disposed between the circuit layer (CL) and the thin film encapsulation layer. JU discloses: a thin film encapsulation layer (Fig. 2: 300) disposed over the circuit layer (120/130/140) to cover the anode (211)…and the barrier wall (190) [among other components]; Further, it would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to combine the teachings of YOUNG with those of JU such that the thin film encapsulation layer of JU covered the surface of the device of YOUNG to enable a thin film encapsulation layer to be disposed over the circuit layer to cover the anode, the pixel defining layer, and the barrier wall; and…a plurality of touch electrodes to be disposed between the circuit layer and the thin film encapsulation layer in YOUNG according to the teachings of JU for the further advantage of protecting the underlying components—particularly the anode, emission pattern, and cathode—of the device of YOUNG (JU Par. 59). Regarding Claim 2, YOUNG discloses: The display device of claim 1, further comprising: an emission pattern (470) disposed on the anode (440); and a cathode (combined 480s from each TSP) disposed on the emission pattern (470) and in contact with the barrier wall (510/515), wherein the cathode (combined 480s from each TSP) includes a plurality of cathodes (480s from a given TSP), and each of the plurality of touch electrodes (TSPs) includes a corresponding cathode (480s on either side of a given 510/515 or 2110 where one such corresponding cathode is seen in Fig. 5.) among the plurality of cathodes (480s from a given TSP). Regarding Claim 4, YOUNG discloses: The display device of claim 1, wherein the barrier wall (510/515 in Fig. 5 or corresponding 2110 in Fig. 21) includes a plurality of barrier wall patterns (islands of 2110) spaced apart from each other. (As seen in Fig. 21) Regarding Claim 5, YOUNG discloses: The display device of claim 4, wherein each of the plurality of touch electrodes (TSPs) includes a corresponding barrier wall pattern (individual island of 2110) among the plurality of barrier wall patterns (islands of 2110). Regarding Claim 6, YOUNG discloses: The display device of claim 1, wherein a common voltage is provided to the plurality of touch electrodes (TSPs) in a first mode, (This limitation is with respect to the manner in which the claimed device is intended to be used and does not differentiate the claimed device from the device disclosed by YOUNG in view of JU, as YOUNG in view of JU teaches all of the structural limitations of this claim, MPEP 2144 II.) a touch sensing signal is provided to the plurality of touch electrodes (TSPs) in a second mode different from the first mode, (This limitation is with respect to the manner in which the claimed device is intended to be used and does not differentiate the claimed device from the device disclosed by YOUNG in view of JU, as YOUNG in view of JU teaches all of the structural limitations of this claim, MPEP 2144 II.) each of the plurality of touch electrodes (TSPs, one of which is provided in Fig. 5) is electrically connected with a first transistor (Fig. 5: 405/407/410 for subpixel_i) and a second transistor (Fig. 5: 405/407/410 for subpixel_j), and the first transistor (Fig. 5: 405/407/410 for subpixel_i) transfers the common voltage to the plurality of touch electrodes (TSPs) in the first mode and transfers the touch sensing signal to the plurality of touch electrodes (TSPs) in the second mode. (This limitation is with respect to the manner in which the claimed device is intended to be used and does not differentiate the claimed device from the device disclosed by YOUNG in view of JU, as YOUNG in view of JU teaches all of the structural limitations of this claim, MPEP 2144 II.) Regarding Claim 8, YOUNG discloses: The display device of claim 1, further comprising: a plurality of trace lines (Fig. 5: 505 & Fig. 21: 1705s) electrically connected with the plurality of touch electrodes (Fig. 5: 505 is electrically connected with 510 of a TSP & Fig. 21: 1705s are electrically connected with 2110s of TSPs), wherein at least one trace line (1705-X) among the plurality of trace lines (1705s) is disposed in an opening defined between two adjacent touch electrodes (TSP-A and TSP-B) among the plurality of touch electrodes (TSPs), and the two adjacent touch electrodes (TSP-A and TSP-B) are spaced apart from each other by the opening and are disconnected from each other by the opening. (Fig. 21: TSP-A and TSP-B are physically separated by said opening. Thus, under a broadest reasonable interpretation, TSP-A and TSP-B are both spaced apart from each other by the opening and are spatially disconnected from each other by the opening.) Regarding Claim 23, YOUNG discloses: The display device of claim 1, wherein the first barrier wall layer (510) has a first conductivity (the conductivity of copper, EX3) and a first thickness (Fig. 5: maximum vertical thickness of 510), and the second barrier wall layer (515) has a second conductivity (the conductivity of negative photoresist, EX2) and a second thickness (Fig. 5: vertical thickness of 515), the first conductivity being higher than the second conductivity, and (The conductivity of copper is higher than the conductivity of negative photoresist.) the first thickness being greater than the second thickness. (As seen in Fig. 5) Regarding Claim 24, YOUNG discloses: An electronic device (Fig. 1: 100) comprising: a display device (Fig. 5 & 21: 2102; Par. EX0) comprising: a base layer (401); a circuit layer (CL) disposed on the base layer (401); an anode (Fig. 5: 440; Par. EX1 & Fig. 21: 1740; EX0) disposed on the circuit layer (CL); a pixel defining layer (450; Par. EX1) disposed on the circuit layer (CL), wherein a light emitting opening (LEO) is defined in the pixel defining layer (450) to overlap the anode (440); a barrier wall (510/515) disposed on the pixel defining layer (450), wherein a barrier opening (BRO) is defined in the barrier wall (510/515) to overlap the light emitting opening (LEO), (Note, BRO of Fig. 5 corresponds to BRO of Fig. 21, as 510 of Fig. 5 corresponds to 2110 of Fig. 21; Par. EX0.) wherein the barrier wall (510/515) comprises a first barrier wall layer (510) and a second barrier wall layer (515) arranged such that the first barrier wall layer (510) is recessed relative to the second barrier wall layer (515); and … a plurality of touch electrodes (Each 510/515 and its two adjacent 440/470/480 stacks, one of which is shown in Fig. 5, and a plurality of which are shown in Fig. 21 by their corresponding 2110 and adjacent 1740s, respectively; Par. EX0. As these electrodes “touch” the same grid of 1705s—as seen in Fig. 21—they may be construed to be “touch electrodes” under a broadest reasonable interpretation. For brevity and clarity, two such “touch electrodes” are denoted as TSPs—TSP-A and TSP-B—in annotated Fig. 21.) disposed [on the circuit layer (CL)]. YOUNG does not disclose: a thin film encapsulation layer disposed over the circuit layer (CL) to cover the anode (440), the pixel defining layer (450), and the barrier wall (510/515); and … a plurality of touch electrodes (TSPs) disposed between the circuit layer (CL) and the thin film encapsulation layer. JU discloses: a thin film encapsulation layer (Fig. 2: 300) disposed over the circuit layer (120/130/140) to cover the anode (211)…and the barrier wall (190) [among other components]; Further, it would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to combine the teachings of YOUNG with those of JU such that the thin film encapsulation layer of JU covered the surface of the device of YOUNG to enable a thin film encapsulation layer to be disposed over the circuit layer to cover the anode, the pixel defining layer, and the barrier wall; and…a plurality of touch electrodes to be disposed between the circuit layer and the thin film encapsulation layer in YOUNG according to the teachings of JU for the further advantage of protecting the underlying components—particularly the anode, emission pattern, and cathode—of the device of YOUNG (JU Par. 59). Regarding Claim 25, YOUNG discloses: The electronic device of claim 24, wherein the display device further comprises: a plurality of trace lines (Fig. 5: 505 & Fig. 21: 1705s) electrically connected with the plurality of touch electrodes (Fig. 5: 505 is electrically connected with 510 of a TSP & Fig. 21: 1705s are electrically connected with 2110s of TSPs), wherein at least one trace line (1705-X) among the plurality of trace lines (1705s) is disposed in an opening defined between two adjacent touch electrodes (TSP-A and TSP-B) among the plurality of touch electrodes (TSPs), and the two adjacent touch electrodes (TSP-A and TSP-B) are spaced apart from each other by the opening and are disconnected from each other by the opening. (Fig. 21: TSP-A and TSP-B are physically separated by said opening. Thus, under a broadest reasonable interpretation, TSP-A and TSP-B are both spaced apart from each other by the opening and are spatially disconnected from each other by the opening.) Claim 22 is rejected under 35 U.S.C. 103 as being unpatentable over YOUNG in view of JU and in further view of KIM (US 20210367015 A1) and KIM, SOO YOUNG et. al “Dark spot formation mechanism in organic light emitting diodes”, 2006. Regarding Claim 22, YOUNG and/or JU do not disclose: The display device of claim 1, further comprising a sacrificial pattern disposed between the anode (440) and the pixel defining layer (450), wherein a sacrificial opening is defined in the sacrificial pattern to expose a portion of an upper surface of the anode (440) and to overlap the light emitting opening (LEO). KIM discloses: a sacrificial pattern (Fig. 4: CPL) disposed between the anode (121) and the pixel defining layer (PDL), wherein a sacrificial opening (lateral gap in CPL) is defined in the sacrificial pattern (CPL) to expose a portion of an upper surface of the anode (121) and to overlap the light emitting opening (lateral gap in PDL). Further, it would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to combine the teachings of YOUNG in view of JU with those of KIM such that the invention of YOUNG in view of JU comprised the sacrificial pattern of KIM to enable the sacrificial pattern to be disposed between the anode and the pixel defining layer, wherein a sacrificial opening is defined in the sacrificial pattern to expose a portion of an upper surface of the anode and to overlap the light emitting opening in YOUNG in view of JU according to the teachings of KIM for the further advantage of “[preventing] direct contact between the [anode] and the pixel defining layer PDL…and [thereby preventing] diffusion of a part of the material of the pixel defining layer PDL to the [anode]…[which may] suppress or prevent the occurrence of dark spots.”, KIM Par. 98. In further support of this statement, note that the PDL in both KIM (Par. 99) and YOUNG (Par. EX3) comprise organic materials, which are known in the art to be a potential source of said dark spots, as evidenced by KIM, SOO YOUNG et. al. “Dark spot formation mechanism in organic light emitting diodes” 2006. Conclusion Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a). A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action. Any inquiry concerning this communication or earlier communications from the examiner should be directed to Kenneth S. Stephenson whose telephone number is (571)272-6686. The examiner can normally be reached Monday through Friday, 9 A.M. to 5 P.M. (EST).. Examiner interviews are available via telephone and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Julio Maldonado can be reached at (571) 272-1864. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /K.S.S./Examiner, Art Unit 2898 /JULIO J MALDONADO/Supervisory Patent Examiner, Art Unit 2898
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Prosecution Timeline

Sep 28, 2023
Application Filed
Mar 10, 2026
Non-Final Rejection mailed — §102, §103, §112
Apr 27, 2026
Interview Requested
May 05, 2026
Examiner Interview Summary
May 07, 2026
Response Filed
Aug 17, 2026
Final Rejection mailed — §102, §103, §112
Sep 17, 2026
Response after Non-Final Action

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Prosecution Projections

2-3
Expected OA Rounds
75%
Grant Probability
75%
With Interview (+0.0%)
3y 6m (~6m remaining)
Median Time to Grant
Moderate
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