Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Election/Restrictions
Applicant’s election without traverse of the invention of group 1, drawn to claims 1-9, in the reply filed on February 12, 2026 is acknowledged.
Applicant is reminded that upon the cancelation of claims to a non-elected invention, the inventorship must be corrected in compliance with 37 CFR 1.48(a) if one or more of the currently named inventors is no longer an inventor of at least one claim remaining in the application. A request to correct inventorship under 37 CFR 1.48(a) must be accompanied by an application data sheet in accordance with 37 CFR 1.76 that identifies each inventor by his or her legal name and by the processing fee required under 37 CFR 1.17(i).
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION. —The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claim 9 is rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention. This claim recites “wherein the second dielectric layer and the first dielectric layer are a single layer or a multilayer structure.” This claim language is indefinite as it may be interpreted to mean that a combination of the second dielectric layer AND the first dielectric layer together comprise a single layer or a multilayer structure, or it may mean that EACH of these layers comprise only an individual single layer or that each comprises a separate multilayer structure. Please make clear the scope of the claim – using “each of the first and second dielectric layers”, punctuation, etc... The claim will be examined below as best understood.
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
Claims 1, 5, 7, and 9 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Chen et al. US 20220059520.
Regarding claim 1, Chen discloses a package substrate comprising:
a first dielectric layer (figure 5c, 130, [0053]);
a first line layer (figure 5d, 310/400, [0056]) provided on the first dielectric layer (130), the first line layer comprising a dam (310/400);
a second dielectric layer (figure 5g, 140, [0058]) provided on the first dielectric layer and covering the first line layer (See figure 5g, where second dielectric layer 140 covers first dielectric layer 130 and first line layer (310/400);
a component embedded in the second dielectric layer and surrounded by the dam (See figure 5g, where component 200 is embedded in second dielectric layer 140 and surrounded by the dam 310/400 [0058]);
and a third dielectric layer (figure 5i, 600) provided on the second dielectric layer and covering the component (see figure 5i, where photoresist layer 600, comprising a dielectric material [0030], covers the second dielectric layer 140 and component 200).
Regarding claim 5, Chen discloses the package substrate according to claim 1, wherein the dam comprises at least one opening (see figure 5e, where the dam structure 310/400 comprises opening 230).
Regarding claim 7, Chen discloses the package substrate according to claim 1, wherein the first dielectric layer comprises a groove 230, the groove being located within the dam (see figure 5e, where the first dielectric layer comprises groove 230, which is located within the dam 310/400).
Regarding claim 9, Chen discloses wherein the second dielectric layer and the first dielectric layer are a single layer or a multilayer structure (first dielectric layer - figure 5c, 130, [0053] and second dielectric - figure 5g, 140, [0058] are each shown as a single).
Claims 1, 3, 5 and 7 are rejected under 35 U.S.C. 102(a)(2) as being anticipated by Huang et al. US 20250054824.
Regarding claim 1, Huang discloses a package substrate comprising:
a first dielectric layer (figure 3, 127, [0014]);
a first line layer provided on the first dielectric layer, the first line layer comprising a dam (see figure 3 – a first line layer comprising packaging substrate 110 wiring [0014], conductive terminals 124 [0015], and dam 150 [0022] is provided on first dielectric layer 127);
a second dielectric layer (figure 3, 125, [0015]) provided on the first dielectric layer (127) and covering the first line layer (figure 3 illustrates this configuration, which is described in paragraph [0015]);
a component (semiconductor die 121, figure 3, [0016]) embedded in the second dielectric layer (figure 3, 125) and surrounded by the dam (figure 3, 150, [0022-0023]);
and a third dielectric layer provided on the second dielectric layer and covering the component (See figure 3 – insulating encapsulation layer 122 is provided on second dielectric layer 125 and covers the component 121 in the horizontal direction. [0016])
Regarding claim 3, Huang discloses the package substrate according to claim 1, wherein a shape of the dam matches a shape of the component. (See figure 5, a top view of the structure of figure 3, where the top view of the dam has a rectangular shape, while the top view of the component 121, comprising parts 121a and 121b, also has a rectangular shape.)
Regarding claim 5, Huang discloses the package substrate according to claim 1, wherein the dam comprises at least one opening (See figure 5, a top view of the structure of figure 3, where dam 150 comprises an opening.)
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Regarding claim 7, Huang discloses the package substrate according to claim 1, wherein the first dielectric layer (127) comprises a groove, the groove being located within the dam (150) (See the annotated figure3 below, where the groove in first dielectric layer 127 is within the dam walls 150.)
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention.
Claims 2, 4, 6, and 8 are rejected under 35 U.S.C. 103 as being unpatentable over Chen in view of Hong et al. US 20210057299.
Regarding claim 2, Chen discloses the package substrate according to claim 1.
Chen lacks wherein a height of the dam is 5 to 50 μm.
However, Hong discloses a similar semiconductor package wherein the height of the dam is 20-30 μm (Hong [0022]).
It would have been obvious to a person of ordinary skill in the art at the time of filing to use a dam height of between 20-30 μm to prevent the overflow of encapsulant without making the layer unnecessarily thick and thus causing electrical interference with the electronic component (Hong [0034]).
Regarding claims 4 and 6, Chen as modified by Hong discloses the package substrate according to claim 1, with components having the scales in the range of μm (Hong [0056-0062]).
Chen as modified by Hong lacks specifically disclosing [claim 4] wherein a distance between a periphery of the component and the dam is 5 to 500 μm and/or an embedded depth of the component in the dam is equal to or greater than 1 μm and [claim 6] wherein a thickness of the second dielectric layer between the first dielectric layer and the component is 3 to 30 μm.
However, MPEP 2144.04 IV A states:
Changes in Size/Proportion - In re Rose, 220 F.2d 459, 105 USPQ 237 (CCPA 1955) (Claims directed to a lumber package "of appreciable size and weight requiring handling by a lift truck" were held unpatentable over prior art lumber packages which could be lifted by hand because limitations relating to the size of the package were not sufficient to patentably distinguish over the prior art.); In re Rinehart, 531 F.2d 1048, 189 USPQ 143 (CCPA 1976) ("mere scaling up of a prior art process capable of being scaled up, if such were the case, would not establish patentability in a claim to an old process so scaled." 531 F.2d at 1053, 189 USPQ at 148.). In Gardner v. TEC Syst., Inc., 725 F.2d 1338, 220 USPQ 777 (Fed. Cir. 1984), cert. denied, 469 U.S. 830, 225 USPQ 232 (1984), the Federal Circuit held that, where the only difference between the prior art and the claims was a recitation of relative dimensions of the claimed device and a device having the claimed relative dimensions would not perform differently than the prior art device, the claimed device was not patentably distinct from the prior art device.
Therefore, it would have been obvious to a person having ordinary skill in the art before the effective filing date to modify the position of the component relative to [claim 4] the dam (so that the distance between a periphery of the component and the dam is 5 to 500 μm) and [claim 6] the first and second dielectric layers (so that a thickness of the second dielectric layer between the first dielectric layer and the component is 3 to 30 μm) in order to optimize the performance of the package by balancing thermal, electrical, and structural strain factors that depend on this relative positioning (Chiu et al. US 20210125911, [0042]).
Since the second limitation of claim 4 “and/or an embedded depth of the component in the dam is equal to or greater than 1 μm” is part of an alternative “and/or” limitation it is not required that the prior art read on this limitation of the claim as presented.
Regarding claim 8, Chen discloses the package substrate according to claim 7.
Chen lacks wherein a depth of the groove is equal to or less than 60 μm.
However, Hong discloses a similar semiconductor package wherein the depth of the flow preventing groove is 20-30 μm (Hong [0008]).
It would have been obvious to a person of ordinary skill in the art at the time of filing to use a groove depth of between 20-30 μm to prevent the overflow of encapsulant without making the groove so deep that the thinning of the layer comprising the groove degrades the rigidity of that layer (Hong [0058]).
Claim 3 is rejected under 35 U.S.C. 103 as being unpatentable over Chen in view of Shih et al. US 20170110419.
Regarding claim 3, Chen discloses a package substrate according to claim 1.
Chen lacks wherein a shape of the dam matches a shape of the component.
However, Shih discloses a similar package substrate with a feature corresponding to the dam disclosed by Chen (Chen, figure 5d, element 310/400) – this feature is the ring-shaped supporting feature 460, illustrated in Shih figure 7, which may also function as a dam when molding compound is applied to seal the dies 420a [0036]. Figure 8, which shows a top view of the device of figure 7, shows that the dam structure of Shih (460) has a rectangular shape and that the component (420a) also has a rectangular shape. Thus, Chen modified by Shih discloses a package substrate wherein the shape of the dam matches the shape of the substrate.
Therefore, it would have been obvious to a person having ordinary skill in the art before the time of filing to include a dam which matches the shape of the component, to act as a supporting feature to avoid warpage and thus reduce the risk of known good die loss [0037].
Claims 2, 4, 6, and 8 are rejected under 35 U.S.C. 103 as being unpatentable over Huang in view of Hong et al. US 20210057299.
Regarding claim 2, Huang discloses the package substrate according to claim 1.
Huang lacks wherein a height of the dam is 5 to 50 μm.
However, Hong discloses a similar semiconductor package wherein the height of the dam is 20-30 μm (Hong [0022]).
It would have been obvious to a person of ordinary skill in the art at the time of filing to use a dam height of between 20-30 μm to prevent the overflow of encapsulant without making the layer unnecessarily thick and thus causing electrical interference with the electronic component (Hong [0034]).
Regarding claims 4 and 6, Huang as modified by Hong discloses the package substrate according to claim 1, with components having the scales in the range of μm (Hong [0056-0062]).
Huang as modified by Hong lacks specifically disclosing [claim 4] wherein a distance between a periphery of the component and the dam is 5 to 500 μm and/or an embedded depth of the component in the dam is equal to or greater than 1 μm and [claim 6] wherein a thickness of the second dielectric layer between the first dielectric layer and the component is 3 to 30 μm.
However, MPEP 2144.04 IV A states:
Changes in Size/Proportion - In re Rose, 220 F.2d 459, 105 USPQ 237 (CCPA 1955) (Claims directed to a lumber package "of appreciable size and weight requiring handling by a lift truck" were held unpatentable over prior art lumber packages which could be lifted by hand because limitations relating to the size of the package were not sufficient to patentably distinguish over the prior art.); In re Rinehart, 531 F.2d 1048, 189 USPQ 143 (CCPA 1976) ("mere scaling up of a prior art process capable of being scaled up, if such were the case, would not establish patentability in a claim to an old process so scaled." 531 F.2d at 1053, 189 USPQ at 148.). In Gardner v. TEC Syst., Inc., 725 F.2d 1338, 220 USPQ 777 (Fed. Cir. 1984), cert. denied, 469 U.S. 830, 225 USPQ 232 (1984), the Federal Circuit held that, where the only difference between the prior art and the claims was a recitation of relative dimensions of the claimed device and a device having the claimed relative dimensions would not perform differently than the prior art device, the claimed device was not patentably distinct from the prior art device.
Therefore, it would have been obvious to a person having ordinary skill in the art before the effective filing date to modify the position of the component relative to [claim 4] the dam (so that the distance between a periphery of the component and the dam is 5 to 500 μm) and [claim 6] the first and second dielectric layers (so that a thickness of the second dielectric layer between the first dielectric layer and the component is 3 to 30 μm) in order to optimize the performance of the package by balancing thermal, electrical, and structural strain factors that depend on this relative positioning (Chiu et al. US 20210125911, [0042]).
Since the second limitation of claim 4 “and/or an embedded depth of the component in the dam is equal to or greater than 1 μm” is part of an alternative “and/or” limitation it is not required that the prior art read on this limitation of the claim as presented.
Regarding claim 8, Huang discloses the package substrate according to claim 7.
Huang lacks wherein a depth of the groove is equal to or less than 60 μm.
However, Hong discloses a similar semiconductor package wherein the depth of the flow preventing groove is 20-30 μm (Hong [0008]).
It would have been obvious to a person of ordinary skill in the art at the time of filing to use a groove depth of between 20-30 μm to prevent the overflow of encapsulant without making the groove so deep that the thinning of the layer comprising the groove degrades the rigidity of that layer (Hong [0058]).
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure: US-20200381383, US-10249859, US-20220285304, US 20090309213, and US-20130334685, which disclose semiconductor package substrates with dams and grooves or trenches and multiple dielectric layers.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to KATRINA M H WALJESKI-MOSES whose telephone number is (571)272-0731. The examiner can normally be reached Mon- Fri 7:30 am- 4 pm.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Jeff Natalini can be reached at (571) 272-2266. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/KATRINA WALJESKI-MOSES/Examiner, Art Unit 2818
/JEFF W NATALINI/Supervisory Patent Examiner, Art Unit 2818
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