Attorney Docket Number: USP-NT531
Filing Date: 10/13/2023
Claimed Priority Date: 12/15/2022 (DIV of 18/081,856)
Inventor: Yang
Examiner: Shamita S. Hanumasagar
DETAILED ACTION
This Office action responds to the amendment filed on 05/14/2026.
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . In the event the determination of the status of the application as subject to AIA is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for a rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
Amendment Status
The amendment filed on 05/14/2026 in reply to the previous Office action mailed on 04/17/2026 has been entered. The present Office action is made with all the suggested amendments being fully considered. Accordingly, pending in this Office action are claims 1-10.
Drawings
The drawings are objected to under 37 CFR 1.83(a). The drawings must show every feature of the invention specified in the claims. Therefore, the following must be shown or the features canceled from the claims. No new matter should be entered.
“Directing the conductive pad of the chip to contact the bonding pad” and “forming a chip insulating layer on a bottom surface of the conductive pad” … such that “the bottom surface of the conductive pad is exposed from the chip insulating layer, wherein the bonding pad directly contacts the bottom surface conductive pad of the chip”, as recited in claim 10
Corrected drawing sheets in compliance with 37 CFR 1.121(d) are required in reply to the Office action to avoid abandonment of the application. Any amended replacement drawing sheet should include all of the figures appearing on the immediate prior version of the sheet, even if only one figure is being amended. The figure or figure number of an amended drawing should not be labeled as “amended.” If a drawing figure is to be canceled, the appropriate figure must be removed from the replacement sheet, and where necessary, the remaining figures must be renumbered and appropriate changes made to the brief description of the several views of the drawings for consistency. Additional replacement sheets may be necessary to show the renumbering of the remaining figures. Each drawing sheet submitted after the filing date of an application must be labeled in the top margin as either “Replacement Sheet” or “New Sheet” pursuant to 37 CFR 1.121(d). If the changes are not accepted by the examiner, the applicant will be notified and informed of any required corrective action in the next Office action. The objection to the drawings will not be held in abeyance.
Specification
The disclosure is objected to because the specification fails to provide sufficient antecedent basis for the following claim limitations:
“Directing the conductive pad of the chip to contact the bonding pad” and “forming a chip insulating layer on a bottom surface of the conductive pad” … such that “the bottom surface of the conductive pad is exposed from the chip insulating layer, wherein the bonding pad directly contacts the bottom surface conductive pad of the chip”, as recited in claim 10
Appropriate correction is required. No new matter should be entered.
Claim Rejections - 35 USC § 112
The following are quotations of 35 U.S.C. 112(a) and 35 U.S.C. 112(b):
(a) IN GENERAL.—The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor or joint inventor of carrying out the invention.
Claim 10 is rejected under 35 U.S.C. 112(a) as failing to comply with the written description requirement. The claim contains subject matter which was not described in the specification in such a way as to reasonably convey to one skilled in the relevant art that the inventor or a joint inventor, at the time the application was filed, had possession of the claimed invention.
Claim 10 has been amended to recite at least the new limitations of “directing the conductive pad of the chip to contact the bonding pad” and forming a chip insulating layer on a bottom surface of the conductive pad” … such that “the bottom surface of the conductive pad is exposed from the chip insulating layer, wherein the bonding pad directly contacts the bottom surface conductive pad of the chip”. The language recited in the claim suggests that a chip insulating layer has been formed on a bottom surface of the conductive pad, wherein simultaneously the bottom surface of the conductive pad is exposed from the chip insulating layer such that the bonding pad directly contacts the bottom surface of the conductive pad of the chip. As discussed below, such limitations are directed to New Matter.
Applicant has not alleged where support for the amendments to the claims can be found. However, a review of the written description fails to find any support for the claimed “directing the conductive pad of the chip to contact the bonding pad” and “forming a chip insulating layer on a bottom surface of the conductive pad”… such that “the bottom surface of the conductive pad is exposed from the chip insulating layer, wherein the bonding pad directly contacts the bottom surface conductive pad of the chip” features. The specification instead only appears to assert that a bottom surface of the conductive pad is exposed by the insulating layer, with no mention of a chip insulating layer being formed on a bottom surface of any conductive pad (see, e.g., par.0042/ll.1-4 of published application US 2024/0203916). Accordingly, the specification appears to fail to provide support for the seemingly simultaneous limitations of “directing the conductive pad of the chip to contact the bonding pad” and “forming a chip insulating layer on a bottom surface of the conductive pad” … such that “the bottom surface of the conductive pad is exposed from the chip insulating layer, wherein the bonding pad directly contacts the bottom surface conductive pad of the chip”, as recited in the claim.
Similarly, a review of the Drawings fails to identify “directing the conductive pad of the chip to contact the bonding pad” and “forming a chip insulating layer on a bottom surface of the conductive pad” … such that “the bottom surface of the conductive pad is exposed from the chip insulating layer, wherein the bonding pad directly contacts the bottom surface conductive pad of the chip”. The Drawings instead appear to show that no chip insulating layer has been formed on a bottom surface of the conductive pad at all. Accordingly, the Drawings appear to fail to provide support for the seemingly simultaneous limitations of “directing the conductive pad of the chip to contact the bonding pad” and “forming a chip insulating layer on a bottom surface of the conductive pad” … such that “the bottom surface of the conductive pad is exposed from the chip insulating layer, wherein the bonding pad directly contacts the bottom surface conductive pad of the chip”, as recited in the claim. Subsequently, the newly added limitations are directed to New Matter.
The applicant may cancel the claims, amend the claims, or demonstrate explicit support for the claimed subject matter in the original disclosure (e.g., by citing specific excerpts from Specification or features in Drawings related to the claimed embodiment, as originally filed). A broad statement alleging support for the claimed subject matter will be considered non-persuasive.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claims 1-7 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Lin (US 2017/0162556).
Regarding claim 1, Lin (see, e.g., figs. 1-23) shows all aspects of the instant invention, including a method of manufacturing a semiconductor structure 20 comprising:
providing (see, e.g., fig. 2) a substrate 21/221, the substrate comprising a substrate body 21 and a conductive pattern 221 formed on a top surface of the substrate body;
forming (see, e.g., fig. 4) an insulating layer 223 on the top surface of the substrate body to cover the conductive pattern on the top surface of the substrate body, wherein the insulating layer has an insulating opening 224 extended therethrough to expose a portion of the conductive pattern;
forming (see, e.g., fig. 5) a bonding pad 225, including 227 (see, e.g., pars.0057 and 0059/ll.6-7) directly on the conductive pattern through the insulating opening of the insulating layer by partially disposing the bonding pad within the insulating opening of the insulating layer to define a first portion within the insulating opening of the insulating layer to directly contact the conductive pattern and a second portion protruded out of the insulating opening of the insulating layer; and
bonding (see, e.g., fig. 7) a chip 23 to the substrate through the second portion of the bonding pad
Regarding claim 2, Lin (see, e.g., fig. 14) shows that a direct contact interface between the bonding pad 225, including 227 and the conductive pattern 221 is insulated and embedded in the insulating layer 223.
Regarding claim 3, Lin (see, e.g., fig. 5 and pars.0057 and 0058/ll.1-9) shows that forming the bonding pad 225, including 227 comprises plating a metal layer directly on the portion of the conductive pattern 221 exposed by the insulating layer 223.
Regarding claim 4, Lin (see, e.g., fig. 5) shows that a sum of a thickness of the conductive pattern 21 and a thickness of the metal layer 225, including 227 is greater than a thickness of the insulating layer 223.
Regarding claim 5, Lin (see, e.g., figs 2-5 and par.0059/ll.1-4) shows that the conductive pattern 21 comprises a plurality of conductive lines formed on the top surface of the substrate body 221 and being exposed through the insulating opening 224 of the insulating layer 223.
Regarding claim 6, Lin (see, e.g., fig. 5 and pars.0057 and 0058/ll.1-3) shows forming a plurality of bonding pads 225, including 227 directly on the conductive lines 21, comprising performing an electroplating process on the portions of the conductive lines exposed by the opening 224 of the insulating layer 223.
Regarding claim 7, Lin (see, e.g., fig. 2 and pars.0055/ll.11-13, 0057, and 0058/ll.1-3) shows that the conductive pattern 221 comprises copper, and forming the bonding pad 225, including 227 comprises plating a copper layer directly on a portion of the conductive pattern.
Allowable Subject Matter
Claims 8-9 are objected to as being dependent upon a rejected base claim but would be allowable if rewritten in independent form including all the limitations of the base claim and any intervening claims.
Claim 10 is rejected herein but would be allowable if (1) rewritten or otherwise established to overcome the 35 U.S.C. 112(a) rejections set forth in this Office action and (2) rewritten in independent form including all the limitations of the base claim and any intervening claims.
Response to Arguments
Applicant’s amendments to the specification as filed on 05/14/2026 have overcome the objections to the drawings set forth in the previous Office action mailed on 04/17/2026. Accordingly, the objections to the drawings put forth in the previous Office action are hereby withdrawn.
Applicant’s arguments with respect to the claims have been considered but are moot in view of the new grounds of rejection.
Conclusion
Applicant’s amendment necessitated the new grounds of rejection presented in this Office action. Accordingly, this action is made final. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire three months from the mailing date of this action. In the event a first reply is filed within two months of the mailing date of this final action and the advisory action is not mailed until after the end of the three-month shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than six months from the mailing date of this final action.
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Any inquiry concerning this communication or earlier communications from the examiner should be directed to Shamita Hanumasagar at (703) 756-1521 and between the hours of 7:00 AM to 5:00 PM (Eastern Standard Time) Monday through Thursday or by e-mail via Shamita.Hanumasagar@uspto.gov. If attempts to reach the examiner by telephone are unsuccessful, the examiner's supervisor, Wael Fahmy, can be reached on (571) 272-1705.
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/Shamita S. Hanumasagar/Examiner, Art Unit 2814
/WAEL M FAHMY/Supervisory Patent Examiner, Art Unit 2814
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