DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Double Patenting
The nonstatutory double patenting rejection is based on a judicially created doctrine grounded in public policy (a policy reflected in the statute) so as to prevent the unjustified or improper timewise extension of the “right to exclude” granted by a patent and to prevent possible harassment by multiple assignees. A nonstatutory double patenting rejection is appropriate where the conflicting claims are not identical, but at least one examined application claim is not patentably distinct from the reference claim(s) because the examined application claim is either anticipated by, or would have been obvious over, the reference claim(s). See, e.g., In re Berg, 140 F.3d 1428, 46 USPQ2d 1226 (Fed. Cir. 1998); In re Goodman, 11 F.3d 1046, 29 USPQ2d 2010 (Fed. Cir. 1993); In re Longi, 759 F.2d 887, 225 USPQ 645 (Fed. Cir. 1985); In re Van Ornum, 686 F.2d 937, 214 USPQ 761 (CCPA 1982); In re Vogel, 422 F.2d 438, 164 USPQ 619 (CCPA 1970); In re Thorington, 418 F.2d 528, 163 USPQ 644 (CCPA 1969).
A timely filed terminal disclaimer in compliance with 37 CFR 1.321(c) or 1.321(d) may be used to overcome an actual or provisional rejection based on nonstatutory double patenting provided the reference application or patent either is shown to be commonly owned with the examined application, or claims an invention made as a result of activities undertaken within the scope of a joint research agreement. See MPEP § 717.02 for applications subject to examination under the first inventor to file provisions of the AIA as explained in MPEP § 2159. See MPEP § 2146 et seq. for applications not subject to examination under the first inventor to file provisions of the AIA . A terminal disclaimer must be signed in compliance with 37 CFR 1.321(b).
The filing of a terminal disclaimer by itself is not a complete reply to a nonstatutory double patenting (NSDP) rejection. A complete reply requires that the terminal disclaimer be accompanied by a reply requesting reconsideration of the prior Office action. Even where the NSDP rejection is provisional the reply must be complete. See MPEP § 804, subsection I.B.1. For a reply to a non-final Office action, see 37 CFR 1.111(a). For a reply to final Office action, see 37 CFR 1.113(c). A request for reconsideration while not provided for in 37 CFR 1.113(c) may be filed after final for consideration. See MPEP §§ 706.07(e) and 714.13.
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Claims 1-13 are rejected on the ground of nonstatutory double patenting as being unpatentable over claims 1-13 of U.S. Patent No. 12,117,699 B1. Although the claims at issue are not identical, they are not patentably distinct from each other because application claims 1-13 are anticipated by claims 1-13 of the patent, and it is not patentably distinct from claims 1-13 of the patent. Please, see the Table as shown below:
Application Under Examination Claims
Patented Claims
Claim 1
Anticipated by patented claim 1
Claim 2
Anticipated by patented claim 2
Claim 3
Anticipated by patented claim 3
Claim 4
Anticipated by patented claim 4
Claim 5
Anticipated by patented claim 5
Claim 6
Anticipated by patented claim 6
Claim 7
Anticipated by patented claim 7
Claim 8
Anticipated by patented claim 8
Claim 9
Anticipated by patented claim 9
Claim 10
Anticipated by patented claim 10
Claim 11
Anticipated by patented claim 11
Claim 12
Anticipated by patented claim 12
Claim 13
Anticipated by patented claim 13
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
Claim(s) 1-8 are rejected under 35 U.S.C. 103 as being unpatentable over Inoue et al. (U.S. 2008/0012016 A1, hereinafter refer to Inoue) in view of LIU et al. (U.S. 2024/0315089 A1, hereinafter refer to LIU) and Tago et al. (WO 2010/082439 A1, hereinafter refer to Tago).
Regarding Claim 1: Inoue discloses a manufacturing method of a display panel (see Inoue, Figs.7 and 8 as shown below and ¶ [0002]), comprising:
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providing a first substrate (101) (see Inoue, Fig.7 as shown above);
forming a conductive layer (125) stack on the first substrate (101) (see Inoue, Figs.7 and 8 as shown above and ¶ [0095]- ¶ [0097]), wherein the conductive layer (125) stack comprises:
a first sub-layer (125b) (see Inoue, Figs.7 and 8 as shown above and ¶ [0095]- ¶ [0097]);
a second sub-layer (125b), disposed on the first sub-layer (125b), wherein a material of each of the first sub-layer (125b) and the second sub-layer (125b) comprises a transparent conductive material, and the transparent conductive material comprises an indium-containing oxide (see Inoue, Figs.7 and 8 as shown above and ¶ [0095]- ¶ [0097]); and
a third sub-layer (125a), disposed between the first sub-layer (125b) and the second sub-layer (125b), wherein a material of the third sub-layer comprises Al alloy film (see Inoue, Figs.7 and 8 as shown above and ¶ [0095]- ¶ [0097]);
forming a photoresist pattern (not shown) on the conductive layer stack (125) (see Inoue, Figs.7 and 8 as shown above and ¶ [0097]); and
performing an etching process on the conductive layer stack (125), wherein an etching solution is used in the etching process to etch the first sub-layer (125b), the second sub-layer (125b) and the third sub-layer (125a) to form a first patterned sub-layer (125b), a second patterned sub-layer (125b) and a third patterned sub-layer (125a) (see Inoue, Figs.7 and 8 as shown above and ¶ [0097]),
wherein the etching solution comprises 1 to 2.6 wt % of nitric acid, 35 to 45 wt % of acetic acid, 35 to 45 wt % of phosphoric acid and a remaining amount of water (see Inoue, Figs.7 and 8 as shown above and ¶ [0097]).
Inoue is silent upon explicitly disclosing wherein a material of the third sub-layer comprises silver or silver alloy;
wherein the etching solution comprises 1 to 2.6 wt % of nitric acid, 35 to 45 wt % of acetic acid, 35 to 45 wt % of phosphoric acid and a remaining amount of water.
Before effective filing date of the claimed invention the disclosed material of the third sub-layer were known to comprises silver or silver alloy and the etching solution to comprise the recited concentration in order to etch a stack of conductive layers and to avoid damage to the wiring layer and the barrier layers.
For support see LIU, which teaches wherein a material of the third sub-layer (conductive metal layer) comprises silver or silver alloy (see LIU, Fig.1, ¶ [0128], ¶ and [0149]);
wherein the etching solution comprises 1 to 2.6 wt % of nitric acid, 35 to 45 wt % (10 to 20 wt %) of acetic acid, 35 to 45 wt % (50 to 60 wt %) of phosphoric acid and a remaining amount of water (note: LIU is silent upon explicitly disclosing the etching solution includes water but LIU teaches the etching solution comprises lower end concentration ranges (1 + 10 + 50 = 61 wt%) and upper end concentration ranges (2.5 + 20 + 60 = 82.5 wt%). Hence, ordinary skill in the art recognize that the remaining concentration of the etching solution would be 39wt% to 17.5wt% as a water, For support see Tago et al. (WO 2010/082439 A1, hereinafter refer to Tago) teaches the etching solution comprises water, see Tago, pages.2-3) (see LIU, Fig.1, ¶ [0149], ¶ and [0157]).
Inoue discloses the claimed invention except for the material of the third sub-layer. Thus, it would have been obvious to one having ordinary skill in the art before effective filing date of the claimed invention to combine the teachings of Inoue, LIU, and Tago to enable the known stacked conductive layer to include a silver or silver alloy as the third sub-layer as taught by LIU in order to form stacked conductive layer, since it has been held to be within the general skill of a worker in the art to select a known material on the base of its suitability, for its intended use involves only ordinary skill in the art. In re Leshin, 125 USPQ 416.
Furthermore, it would have been obvious to one having ordinary skill in the art before effective filing date of the claimed invention to combine the teachings of Inoue and LIU to enable the recited concentration of etching solution for Inoue etching solution as taught by LIU in order to etch stacked conductive layer and to avoid damage to the wiring layer and the barrier layers.
The combination of Inoue, LIU, and Tago teaches an overlapping concentration ranges of etching solution as shown above; thus, it would have been obvious to one of ordinary skill in the art of making semiconductor devices to determine the workable or optimal value for the concentration of etching solution through routine experimentation and optimization to obtain optimal or desired device performance because the concentration of etching solution is a result-effective variable and there is no evidence indicating that it is critical or produces any unexpected results and it has been held that it is not inventive to discover the optimum or workable ranges of a result-effective variable within given prior art conditions by routine experimentation. See MPEP § 2144.05
Regarding Claim 2: Inoue as modified teaches a manufacturing method of a display panel as set forth in claim 1 as above. The combination of Inoue, LIU, and Tago further teaches wherein a temperature of the etching solution is greater than or equal to 26° C. and less than or equal to 40° C (etching temperature is usually 30 to 60 ° C) (see Tago, page.5).
Regarding Claim 3: Inoue as modified teaches a manufacturing method of a display panel as set forth in claim 1 as above. The combination of Inoue and LIU further teaches wherein the display panel comprises a reflective area, and the first patterned sub-layer (125b), the second patterned sub-layer (125b) and the third patterned sub-layer (125a) are disposed in the reflective area of the display panel (see Inoue, Figs.7 and 8 as shown above).
Regarding Claims 4, 5, and 6: Inoue as modified teaches a manufacturing method of a display panel as set forth in claim 1 as above. The combination of Inoue, LIU, and Tago is silent upon explicitly disclosing wherein removing the photoresist pattern after the etching process is performed, and removing the second patterned sub-layer after the photoresist pattern is removed (as claimed in claim 4);
forming a first alignment layer on the third patterned sub-layer within a specific time after the second patterned sub-layer is removed, wherein the first alignment layer is directly contacted with the third patterned sub-layer (as claimed in claim 5);
wherein the specific time is less than or equal to twenty-one hours (as claimed in claim 6).
However, the combination of Inoue, LIU, and Tago teaches wherein the etching process is one-step etching (see Inoue, Figs.7 and 8 as shown above and ¶ [0095]- ¶ [0097] and see LIU, Fig.1, ¶ [0128], ¶ and [0149]).
Hence, selection of any order of performing process steps for pattering the known stacked layer of conductive layers by known etching solution is prima facie obvious in the absence of new or unexpected results.
Regarding Claim 7: Inoue as modified teaches a manufacturing method of a display panel as set forth in claim 1 as above. The combination of Inoue and LIU further teaches wherein the indium-containing oxide comprises indium tin oxide or indium zinc oxide (see Inoue, Figs.7 and 8 as shown above and ¶ [0095]- ¶ [0097] and see LIU, Fig.1, ¶ [0128], ¶ and [0149]).
Regarding Claim 8: Inoue as modified teaches a manufacturing method of a display panel as set forth in claim 1 as above. The combination of Inoue and LIU further teaches wherein the etching process is one-step etching (see Inoue, Figs.7 and 8 as shown above and ¶ [0095]- ¶ [0097] and see LIU, Fig.1, ¶ [0128], ¶ and [0149]).
Claim(s) 9-13 are rejected under 35 U.S.C. 103 as being unpatentable over LIU et al. (U.S. 2024/0315089 A1, hereinafter refer to LIU) in view of Tago et al. (WO 2010/082439 A1, hereinafter refer to Tago) and Inoue et al. (U.S. 2008/0012016 A1, hereinafter refer to Inoue).
Regarding Claim 9: LIU discloses an etching solution used for performing an etching process on a conductive layer stack of a display panel to form a patterned conductive layer stack (see LIU, Fig.1, ¶ [0128], ¶ and [0149]), comprising:
1 to 2.6 wt % of nitric acid (see LIU, Fig.1, ¶ [0149], ¶ and [0157]);
35 to 45 wt % (10 to 20 wt %) of acetic acid (see LIU, Fig.1, ¶ [0149], ¶ and [0157]);
35 to 45 wt % (50 to 60 wt %) of phosphoric acid (see LIU, Fig.1, ¶ [0149], ¶ and [0157]); and
a remaining amount of water (note: LIU is silent upon explicitly disclosing the etching solution includes water but LIU teaches the etching solution comprises lower end concentration ranges (1 + 10 + 50 = 61 wt%) and upper end concentration ranges (2.5 + 20 + 60 = 82.5 wt%). Hence, ordinary skill in the art recognize that the remaining concentration of the etching solution would be 39wt% to 17.5wt% as a water, For support see Tago et al. (WO 2010/082439 A1, hereinafter refer to Tago) teaches the etching solution comprises water, see Tago, pages.2-3) (see LIU, Fig.1, ¶ [0149], ¶ and [0157]),
wherein the conductive layer stack comprises a first sub-layer, a second sub-layer and a third sub-layer, the third sub-layer is disposed between the first sub-layer and the second sub-layer, the patterned conductive layer stack comprises a first patterned sub-layer, a second patterned sub-layer and a third patterned sub-layer, and the third patterned sub-layer is disposed between the first patterned sub-layer and the second patterned sub-layer, and the etching solution is used in the etching process to etch the first sub-layer, the second sub-layer and the third sub-layer to form the first patterned sub-layer, the second patterned sub-layer and the third patterned sub-layer (see LIU, Fig.1, ¶ [0128], ¶ and [0149]).
LIU is silent upon explicitly disclosing the metal layer of barrier layer comprises wherein each of the first sub-layer, the second sub-layer, the first patterned sub-layer and the second patterned sub-layer comprises a transparent conductive material comprising an indium-containing oxide, and each of the third sub-layer and the third patterned sub-layer comprises silver or silver alloy.
However, LIU teaches electrode layer 41 comprises wherein each of the first sub-layer, the second sub-layer, the first patterned sub-layer and the second patterned sub-layer comprises a transparent conductive material comprising an indium-containing oxide, and each of the third sub-layer and the third patterned sub-layer comprises silver or silver alloy (see LIU, Fig.1, ¶ [0128], ¶ and [0149]).
Furthermore, Inoue teaches enabling the known etching solution for etching the stack of conductive layer comprising transparent conductive material and reflective conductive material alternatively stacked (see Inoue, Figs.7 and 8 as shown above, ¶ [0011], and ¶ [0095]- ¶ [0097]).
Hence, it would have been obvious to one of ordinary skill in the art before effective filing date of the claimed invention to combine the teachings of LIU, Tago, and Inoue to enable the known etching solution for patterning the LIU’s stack of conductive layer comprising transparent conductive material and reflective conductive material as taught by Inoue in order to obtain an electrode or a line made from a metal film with a transparent electrode layer and also have high reliability and productivity.
Regarding Claim 10: LIU as modified teaches an etching solution used for performing an etching process on a conductive layer stack of a display panel to form a patterned conductive layer stack as set forth in claim 9 as above. The combination of LIU, Tago, and Inoue further teaches wherein the etching process is one-step etching (see LIU, Fig.1, ¶ [0128], ¶ and [0149] and see Inoue, Figs.7 and 8 as shown above, ¶ [0011], and ¶ [0095]- ¶ [0097]).
Note: patentability of a product does not depend on its method of production.
Regarding Claim 11: LIU as modified teaches an etching solution used for performing an etching process on a conductive layer stack of a display panel to form a patterned conductive layer stack as set forth in claim 9 as above. The combination of LIU, Tago, and Inoue further teaches wherein a temperature of the etching solution is greater than or equal to 26° C. and less than or equal to 40° C (etching temperature is usually 30 to 60 ° C) (see Tago, page.5).
Regarding Claim 12: LIU as modified teaches an etching solution used for performing an etching process on a conductive layer stack of a display panel to form a patterned conductive layer stack as set forth in claim 9 as above. The combination of LIU, Tago, and Inoue further teaches wherein the indium-containing oxide comprises indium tin oxide or indium zinc oxide (see LIU, Fig.1, ¶ [0128], ¶ and [0149] and see Inoue, Figs.7 and 8 as shown above, ¶ [0011], and ¶ [0095]- ¶ [0097]).
Regarding Claim 13: LIU as modified teaches an etching solution used for performing an etching process on a conductive layer stack of a display panel to form a patterned conductive layer stack as set forth in claim 9 as above. The combination of LIU, Tago, and Inoue further teaches wherein the display panel comprises a reflective area, and the patterned conductive layer stack is disposed in the reflective area of the display panel (see LIU, Fig.1, ¶ [0128], ¶ and [0149] and see Inoue, Figs.7 and 8 as shown above, ¶ [0011], and ¶ [0095]- ¶ [0097]).
Conclusion
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/BITEW A DINKE/Primary Examiner, Art Unit 2812