Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Election/Restrictions
Election was made without traverse in the reply filed on 1/14/2026. Applicant has elected Invention Group I, corresponding to claims 1-6. Invention Group II, corresponding to claims 7-10, is withdrawn from further consideration.
Specification
The specification submitted 10/19/2023 has been accepted by the examiner.
Drawings
New corrected drawings in compliance with 37 CFR 1.121(d) are required in this application because the current drawings appear to be missing lines that clearly convey the shapes of the features, especially see examples of this issue in Figs. 6-18. Applicant is advised to employ the services of a competent patent draftsperson outside the Office, as the U.S. Patent and Trademark Office no longer prepares new drawings. The corrected drawings are required in reply to the Office action to avoid abandonment of the application. The requirement for corrected drawings will not be held in abeyance.
The drawings are objected to under 37 CFR 1.83(a). The drawings must show every feature of the invention specified in the claims. Therefore, the following must be shown or the feature(s) canceled from the claim(s). No new matter should be entered.
Claim 1: attaching the pads of the one or more of the thermally conductive dies to an electrical interconnecting component
Corrected drawing sheets in compliance with 37 CFR 1.121(d) are required in reply to the Office action to avoid abandonment of the application. Any amended replacement drawing sheet should include all of the figures appearing on the immediate prior version of the sheet, even if only one figure is being amended. The figure or figure number of an amended drawing should not be labeled as “amended.” If a drawing figure is to be canceled, the appropriate figure must be removed from the replacement sheet, and where necessary, the remaining figures must be renumbered and appropriate changes made to the brief description of the several views of the drawings for consistency. Additional replacement sheets may be necessary to show the renumbering of the remaining figures. Each drawing sheet submitted after the filing date of an application must be labeled in the top margin as either “Replacement Sheet” or “New Sheet” pursuant to 37 CFR 1.121(d). If the changes are not accepted by the examiner, the applicant will be notified and informed of any required corrective action in the next Office action. The objection to the drawings will not be held in abeyance.
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale or otherwise available to the public before the effective filing date of the claimed invention.
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
Claims 1 and 4-6 are rejected under 35 U.S.C. 102(a)(1)/(a)(2) as being anticipated by Yu (US # 20180158749).
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Regarding Claim 1, Yu (US # 20180158749) teaches a method for preparing a thermally conductive semiconductor packaging structure ([0018] describes “heat dissipation through the use of a dummy thermal chip”; also describing trenches “formed in the backside of the package and filled with a thermal interface material (TIM) to provide heat dissipation”; [0021] describes “Dummy vias can be formed, for example, for heat dissipation of the substrate.”), comprising:
providing a wafer (115), which comprises multiple sub-regions (sub-regions 150 demarcated by “non-die areas” 160), wherein pads (125) are provided on front sides (top side of 115, as shown in Fig. 1) of the sub-regions,
patterning back sides of the sub-regions to form grooves (via holes corresponding to vias 120; see [0023] about process techniques),
filling the grooves with a thermally conductive material (see [0022] describing a primary purpose of conducting heat; [0026] teaches copper as material) to form thermally conductive members;
cutting the wafer along borders of the sub-regions to obtain thermally conductive dies ([0027] the processed wafer 110 will be stacked and singulated form stacked die structures; see also Figs. 10-11);
forming a die packaging structure (see Figs. 14, 36, and 59) by packaging one or more of the thermally conductive dies (in Fig. 40, dies 655 and 659 comprise thermal dies) together (analogous dies 212 are formed as a layer, for example, see 231 of Fig. 19; see [0072]), wherein each of the thermally conductive dies comprises a first surface (top, as shown in Fig. 14) and a second surface (bottom) opposite to the first surface, with the first surface exposing the thermally conductive members (shown in Fig. 14), wherein the second surface is provided with electrically conductive connectors (985 connected to pads of 111, see Fig. 22) which are electrically connected to the pads (after carrier 205 is removed, contacts are attached, see also [0055]),
attaching the pads of the one or more of the thermally conductive dies to an electrical interconnecting component (processed wafer 511, see Figs. 45, 48 showing analogous dies formed on top of feature 511 and interconnected at least by pads 711),
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providing a substrate (package component 691; see [0128] and Figs. 43 and 57), and electrically connecting the electrical interconnecting component to the substrate (features 685 are used to interconnect with features 693), and
forming a heat dissipating cover (a heat spreader 695) over the substrate, wherein the heat dissipating cover is in contact with the thermally conductive members (thermal contact through a thermal interface material (TIM) 690).
Regarding Claim 4, Yu teaches the method according to claim 1, wherein techniques for filling the grooves with the thermally conductive material to form the thermally conductive members comprises one of deposition, coating, curing and grinding (see a few of these techniques described at [0023, 26, 37]).
Regarding Claim 5, Yu teaches the method according to claim 1, wherein techniques for forming the grooves comprises one or more of mechanical grooving, laser grooving, chemical etching, and plasma etching ([0023]).
Regarding Claim 6, Yu teaches the method according to claim 1, wherein there are N thermally conductive members formed in each of the thermally conductive dies, wherein N ≥ 2 (more than two thermal vias 120 are shown).
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention.
Claim 2 is rejected under 35 U.S.C. 103 as being unpatentable over Yu (US # 20180158749) in view of Meade (US # 20240170387).
Regarding Claim 2, Yu teaches the method according to claim 1, wherein the die packaging structure constitutes a part of a flip-chip packaging structure (see Fig. 27 showing flipped chip).
Although Yu discloses much of the claimed invention, it does not explicitly teach the method according to claim 1, wherein the die packaging structure constitutes a part of a fan-out packaging structure, a part of a 2.5D packaging structure.
Nonetheless the prior art at the time the application was filed renders such non-explicit feature differences obvious, as explained below.
For example, Meade is in the same or analogous field, and it teaches die package configurations, including flip-chip ([0002, 49]), 2.5D IC packaging ([0050]) and fan-out packaging structure ([0048]).
A person having ordinary skill in the art would have recognized that modifying the method of package configuration of Yu with one of the configurations suggested by Meade would be obvious. Specifically, the modification suggested by Meade would be to employ a method according to claim 1, wherein the die packaging structure constitutes a part of a fan-out packaging structure, a part of a 2.5D packaging structure. The rationale for this obvious modification is that fan-out, 2.5D, and flip-chip each provides advantages, depending on the application and thermal management needs. This would have been apparent to a person having ordinary skill in the art in reading both references because the existence and benefits of these common configurations are well known in the art (see MPEP 2144.01).
Claim 3 is rejected under 35 U.S.C. 103 as being unpatentable over Yu (US # 20180158749) in view of Meade (US # 20240170387) and Noguchi (US # 20060197181).
Regarding Claim 3, although Yu discloses much of the claimed invention, it does not explicitly teach the method according to claim 1, wherein the thermally conductive material comprises one or more of graphene, aluminum trioxide, ceramics, and indium.
Nonetheless the prior art at the time the application was filed renders such non-explicit feature differences obvious, as explained below.
For example, Noguchi is in the same or analogous field, and it teaches using ceramic material to fill a hole (11b) in a wafer (1) in order to dissipate heat ([0069] and Figs. 7-8).
A person having ordinary skill in the art would have recognized that modifying the heat dissipation material of Yu with the material suggested by Noguchi would be obvious. Specifically, the modification suggested by Noguchi would be to employ a method according to claim 1, wherein the thermally conductive material comprises one or more of graphene, aluminum trioxide, ceramics, and indium. It would have been obvious to one of ordinary skill in the art at the time the claimed invention was made to use ceramic since it has been held by the courts that selection of a prior art material on the basis of its suitability for its intended purpose is within the level of ordinary skill. In re Leshing, 125 USPQ 416 (CCPA 1960) and Sinclair & Carroll Co. v. Interchemical Corp., 65 USPQ 297 (1945).
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to CHRISTOPHER A JOHNSON whose telephone number is (571)272-9475. The examiner can normally be reached normally working Monday to Friday between 9 am and 6 pm Eastern Time.
Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Brent Fairbanks can be reached on (408) 918-7532. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/CHRISTOPHER A JOHNSON/ Primary Examiner, Art Unit 2899