Prosecution Insights
Prosecution Insights
Technology area: Semiconductors, Circuits & Optics
5 pending office actions • 5 art units • 5 examiners • 0 of 5 (0%) have an AI response strategy ready • 12 patents granted in the last 365 days
Sj Semiconductor(Jiangyin) Corporation is currently managing 4 pending office actions in the Semiconductors, Circuits & Optics technology area. These actions are distributed among 4 distinct examiners, which indicates a high level of individual review for each application. The workload is further spread across 4 distinct art units, suggesting that the company's semiconductor technology is being examined by several different specialized groups. This distribution requires the company to coordinate a strategy that accounts for many different USPTO divisions.
The busiest examiner, CHEN, YU, is responsible for 1 busiest examiner pending action. This is one of the 4 pending office actions currently active for the company. With 4 distinct examiners and 4 distinct art units, the company must manage multiple timelines and examiner preferences simultaneously. The Semiconductors, Circuits & Optics portfolio is undergoing a diverse examination process that requires attention to the specific standards of each of the 4 distinct art units, providing a broad base of examiner feedback compared to more concentrated portfolios.
Based on the USPTO statutory response window for each pending office action. 4 of the docket's apps have a known mailing date; the rest are excluded from the tile counts.
Every pending office action with a known statutory deadline, placed on a days-until-due axis. Dots left of Today are overdue; the further right, the more runway. Cases that share a deadline window stack vertically. 4 of the docket's apps have a known mailing date.
Difficulty is derived from the rejection statutes on the most recent pending office action. §101-driven and multi-statute cases are graded Hard; §112-only and obviousness-type double-patenting cases are graded Easy; everything else is Medium. "Unknown" means we have not yet parsed a statute for that office action.
| Bucket | Cases |
|---|---|
| §103 only | 4 (80%) |
| Multi-statute (no §101) | 1 (20%) |
How the docket's pending cases split across USPTO tech-center bands.
Manual office-action response work runs about 10 hours per case. The time-saved bands below show what IP Author's prosecution pipeline typically delivers — a conservative 20% on the low end, 35% in the middle, 50% on the high end.
| Examiner | Apps on this docket | Allow rate | Interview lift |
|---|---|---|---|
| CHEN, YU | 1 | 67.9% | +29.6% |
| ZARNEKE, DAVID A | 1 | 71.0% | +11.2% |
| ANDERSON, WILLIAM H | 1 | 85.1% | +17.9% |
| CAMPBELL, SHAUN M | 1 | 72.8% | +8.6% |
| TRAN, TRANG Q | 1 | 81.3% | +7.3% |
Cases in front of an examiner with an allow rate of 80%+ where the difficulty is Easy or Medium. The top 2 ordered by deadline are shown.
| App # | Title | Examiner | Due in |
|---|---|---|---|
| 18139748 | THREE-DIMENSIONAL FAN-OUT MEMORY POP STRUCTURE AND PACKAGING METHOD THEREOF | ANDERSON, WILLIAM H | 59d overdue |
| 18132602 | HIGH-DENSITY-INTERCONNECTION PACKAGING STRUCTURE AND METHOD FOR PREPARING SAME | TRAN, TRANG Q | — |
Multi-statute / §101-driven matters, or cases in front of an examiner with an allow rate under 30%. The top 1 ordered by deadline are shown.
Cases in front of an examiner whose interview lift is 10 percentage points or more — i.e. interviewed cases historically resolve more favorably than non-interviewed ones. The top 3 ordered by deadline are shown.
| App # | Title | Examiner | Due in |
|---|---|---|---|
| 18139748 | THREE-DIMENSIONAL FAN-OUT MEMORY POP STRUCTURE AND PACKAGING METHOD THEREOF | ANDERSON, WILLIAM H | 59d overdue |
| 18367477 | FAN-OUT PACKAGING UNIT USED IN POP PACKAGING AND METHOD FOR MANUFACTURING SAME | CHEN, YU | 10d overdue |
| 18244315 | SYSTEM-LEVEL FAN-OUT PACKAGING STRUCTURE AND METHOD FOR MANUFACTURING SAME | ZARNEKE, DAVID A | 85d |
| Art Unit | Apps |
|---|---|
| 2896 | 1 |
| 2891 | 1 |
| 2817 | 1 |
| 2893 | 1 |
| 2811 | 1 |
| App # | Title | Examiner | Art Unit | Statutes | Status | Due in | AI | Filed |
|---|---|---|---|---|---|---|---|---|
| 18367477 | FAN-OUT PACKAGING UNIT USED IN POP PACKAGING AND METHOD FOR MANUFACTURING SAME | CHEN, YU | 2896 | §103§112 | Non-Final OA | 10d overdue | Pending | Sep 13, 2023 |
| 18244315 | SYSTEM-LEVEL FAN-OUT PACKAGING STRUCTURE AND METHOD FOR MANUFACTURING SAME | ZARNEKE, DAVID A | 2891 | §103 | Non-Final OA | 85d | Pending | Sep 11, 2023 |
| 18139748 | THREE-DIMENSIONAL FAN-OUT MEMORY POP STRUCTURE AND PACKAGING METHOD THEREOF | ANDERSON, WILLIAM H | 2817 | §103 | Non-Final OA | 59d overdue | Pending | Apr 26, 2023 |
| 18137994 | ELECTRONIC PACKAGING STRUCTURE | CAMPBELL, SHAUN M | 2893 | §103 | Non-Final OA | 168d overdue | Pending | Apr 21, 2023 |
| 18132602 | HIGH-DENSITY-INTERCONNECTION PACKAGING STRUCTURE AND METHOD FOR PREPARING SAME | TRAN, TRANG Q | 2811 | §103 | Non-Final OA | — | Pending | Apr 10, 2023 |
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