DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Continued Examination Under 37 CFR 1.114
A request for continued examination under 37 CFR 1.114, including the fee set forth in 37 CFR 1.17(e), was filed in this application after final rejection. Since this application is eligible for continued examination under 37 CFR 1.114, and the fee set forth in 37 CFR 1.17(e) has been timely paid, the finality of the previous Office action has been withdrawn pursuant to 37 CFR 1.114. Applicant's submission filed on 7/11/2026 has been entered.
Response to Amendment
Applicant's amendments filed 7/11/2026 have been entered and considered. The amendments to claims 1, 4-6, and 9 are acknowledged.
Claim Rejections - 35 USC § 112
Claims 1-9 rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
Claim 1 recites “a plurality of die regions, disposed on a semiconductor wafer”, “a scribe line region,” disposed between the plurality of die regions”, “a plurality of metal wires disposed on the top surface of each die region and the second top surface of the scribe line region”, and “wherein a center of each circuit probing pad is disposed on a center line of the scribe line region”. These limitations are directed to a particular semiconductor structure before any dicing of the semiconductor wafer takes place. Meanwhile, the limitations “wherein the scribe line region is diced to define a kerf scribe line portion and a remaining scribe line portion”, wherein each of the circuit probing pads has a kerf portion disposed on the kerf scribe line portion of the scribe line region and a remaining circuit probing pad disposed on the remaining scribe line portion of the scribe line region”, “remaining circuit probing pads”, and “a substrate having a first side facing the scribe line region and an opposed second side; a substrate metal wire formed through the substrate to place the substrate metal wire on the first side and the second side of the substrate; and a solder ball disposed on the second side of the substate and electrically connected to the substrate metal wire thereon, wherein the solder ball is electrically connected to at least one of the bump pads” are directed to a semiconductor structure where the semiconductor wafer has been singulated and individual die regions have been bonded to a substrate. If the claimed structure is in the intermediate process step, there are no kerf regions, remaining portions of circuit probing pads, nor substrates with metal wires. If the claimed structure is in the final step, there are no longer any scribe line regions or a semiconductor wafer. The claimed device is not clearly defined.
Claims 2-9 are rejected based on their dependency on claim 1.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to ERIC MULERO FLORES whose telephone number is (571)270-0070. The examiner can normally be reached Mon-Fri 8am-5pm (typically).
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Julio Maldonado can be reached at (571)272-1864. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/ERIC MANUEL MULERO FLORES/Examiner, Art Unit 2898 /JULIO J MALDONADO/Supervisory Patent Examiner, Art Unit 2898
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