Detailed Action
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale or otherwise available to the public before the effective filing date of the claimed invention.
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
Claim(s) 1 is/are rejected under 35 U.S.C. 102(a)(1)/102(a)(2) as being anticipated by Lin et. Al. (US 20200212049 A1 hereinafter Lin).
Regarding claim 1, Lin teaches in Figs. 3-4 with associated text a semiconductor device structure, comprising: a substrate 201, wherein the substrate has an opening 201g formed from an upper surface of the substrate, wherein the opening of the substrate has a curved lateral surface extended from the upper surface of the substrate and a bottom formed below the upper surface of the substrate (Fig. 4, [0058]); an isolation layer 210c comprising an upper layer formed on the upper surface of the substrate (210c spaces the metal 210b and so is interpreted to be an isolation layer Fig. 4, [0061]), and a fuse medium 210d conformally formed in the opening of the substrate (Fig. 4, [0062]); a fuse structure (210 and 201e) comprising a fuse electrode 210b disposed within the substrate (Fig. 4, [0060]), wherein a lateral surface of the fuse medium is formed between the curved lateral surface of the opening and a lateral surface of the fuse electrode (Fig. 4, [0062]), wherein a bottom surface of the fuse medium is formed between the bottom of the opening and a lower surface of the fuse electrode (Fig. 4, [0062]); a first word line 204 electrically coupled to the fuse structure (they are part of the same circuit so that they are interpreted to be electrically coupled, Fig. 4, [0057]); and a doped region (201d and 201e) surrounding the first word line (Figs. 3-4, [0057]); wherein a horizontal distance between the fuse electrode of the fuse structure and the first word line changes with respect to a depth of the fuse electrode along a direction perpendicular to the substrate (distance changes due to the tapering of.210 with respect to the depth Fig. 4).
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Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102 of this title, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 2-3 and 5-7 is rejected under 35 U.S.C. 103 as being unpatentable over Lin as applied to claim 1 and further in view of Wu et. Al. (US 20200075610 A1 hereinafter Wu).
Regarding claim 2, Lin teaches the semiconductor device structure of claim 1.
Lin does not specify a second word line electrically connected to the fuse structure, wherein the opening is formed between the first word line and the second word line.
Wu discloses in Figs. 1A-1B with associated text a first and second word line (GR0, GR1 and associated transistors [0025]-[0026]) electrically connected to a fuse structure (GP0, OXP0 and portions of SD2 and SD3 thereunder) (Fig. 1A, [0027]) wherein the fuse structure is formed between the first word line and the second word line (Fig. 1A) so that by using a similar arrangement for the word lines and fuse structure of Lin the opening would be formed between the first word line and the second word line.
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to use the arrangement of Wu for the word lines and fuse structure of Lin to make a circuit similar to that taught by Wu so as to be electrically connected to the fuse structure of Lin because according to Wu compared to approaches in which a single transistor couples an anti-fuse device to a bit line through a single current path such a structure enables an increased current during read operations, thereby improving the ability to detect a programmed status of an anti-fuse device, e.g., anti-fuse device MNP0 [0048].
Regarding claim 3, Lin in view of Wu teaches the first word line is electrically connected to the second word line in parallel (Wu Fig. 1A).
Regarding claim 5, Lin in view of Wu teaches a metallization layer (WLRM0, V1 and V3 of Wu Figs. 1A-1B) having a top plate portion (the metallization is a flat wire and so is considered to be a top plate) disposed on the upper surface of substrate (it is on the surface of the substate through intervening layers) and electrically connected (connected through the word line) to the fuse electrode of the fuse structure, wherein the metallization layer vertically overlaps the first word line (Fig. 1B, [0034]) wherein the top plate portion is integrated with the fuse electrode (both are part of the same circuit an on the same substrate and so are interpreted to be integrated (Figs. 1A-1B) the claim wouldn’t necessarily require them to be monolithic).
Regarding claim 6, Lin in view of Wu teaches the metallization layer has a first portion (portion over GR0 of Wu) extending between the first word line and second word line (-x direction) and a second portion (V1 and or V3) extending substantially orthogonal to the first portion (out of the page in Fig 1B).
Regarding claim 7, Lin in view of Wu teaches the top plater portion of the metallization layer vertically overlaps the second word line (Wu Fig. 1B, [0034]).
Claims 4 and 8-9 are rejected under 35 U.S.C. 103 as being unpatentable over Lin in view of Wu as applied to claim 1 and further in view of Ha et. Al. (US 20070077713 A1 hereinafter Ha).
Regarding claim 4, Lin in view of Wu teaches the semiconductor device structure of claim 1.
Lin does not specify an air gap disposed between the first word line and the second word line however Wu teaches the fuse electrode disposed between the first word line and the second word line wherein the air gap is enclosed by the fuse electrode and is disposed within the opening of the substrate.
Ha discloses in Figs. 9 with associated text an electrode similar to the fuse electrode of Lin comprising an air gap 152 surrounded by the electrode (Fig. 9, [0152]) wherein the air gap is enclosed by the electrode and is disposed within an opening of the substrate (Fig. 9) so that by using an airgap in the fuse electrode of Lin in view of Wu an air gap would be disposed between the first word line and the second word line wherein the air gap is enclosed by the fuse electrode and is disposed within an opening of the substrate.
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to form the fuse electrode of Lin in view of Wu in such a way that an air gap is surrounded by the fuse electrode because according to Ha it is possible that a void 152 may be formed in the lower channel trench 107a because the width of the lower channel trench 107a is greater than that of the upper channel trench 107b [0056] so that such a void would naturally occur in the device of Lin in view of Wu.
Regarding claim 8, Lin in view of Wu teaches the semiconductor device structure of claim 5.
Lin does not specify the fuse electrode has the lateral surface protruded toward the first word line, wherein the lateral surface of the fuse electrode is a convex surface.
Ha discloses in Fig. 9 with associated text an electrode 151 similar to that of Lin has a lateral surface protruded outward (lateral surface at 107 protrudes outward Fig. 9), wherein the lateral surface of the fuse electrode is a convex surface (Fig. 9) so that by using such a protrusion in Lin in view of Wu the fuse electrode would have the lateral surface protruded toward the first word line, wherein the lateral surface of the fuse electrode is a convex surface.
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to fuse the protruding fuse electrode of Ha for the fuse electrode of Lin in view of Wu because according to Ha The channel trench 107 may include a lower channel trench 107a of which an inner wall has a substantially round profile [0050] so that such a structure would be suitable for the recessed gate of Lin in view of Wu.
Regarding claim 9, Lin in view of Wu and Ha teaches the fuse electrode has a lower surface (lower surface of 151C extending over the substrate of Ha Fig. 9) substantially parallel to an upper surface of the substrate, wherein the lower surface of the fuse electrode is a flat surface (Fig. 9).
Allowable Subject Matter
Claim 10 is objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
The following is a statement of reasons for the indication of allowable subject matter:
After completing a thorough search of dependent claim 10, the prior art of record, alone or in combination does not disclose, teach or fairly suggest a semiconductor device structure, comprising: an opening formed from an upper surface of the substrate, wherein the opening of the substrate has a curved lateral surface extended from the upper surface of the substrate and a bottom formed below the upper surface of the substrate; an isolation layer comprising an upper layer formed on the upper surface of the substrate, and a fuse medium conformally formed in the opening of the substrate; a fuse structure comprising a fuse electrode disposed within the opening of the substrate; wherein a horizontal distance between the fuse electrode of the fuse structure and the first word line changes with respect to a depth of the fuse electrode along a direction far away from perpendicular to the substrate; a second word line electrically connected to the fuse structure, wherein the opening is formed between the first word line and the second word line; a metallization layer having a top plate portion disposed on the upper surface of the substrate and electrically connected to the fuse electrode of the fuse structure, wherein the top plate portion of the metallization layer vertically overlaps the first word line, wherein the top plate portion is integrated with the fuse electrode and a block layer disposed under the fuse electrode of the fuse structure; wherein the bottom of the opening is formed on the block layer and is a flat bottom that a width of the bottom of the opening is equal to a width of the block layer in combination with the rest of the limitations of the claim.
Response to Arguments
Applicant's arguments filed 07/15/2026 have been fully considered but they are not persuasive. Regarding the arguments on page 6 Lin teaches the substrate has an opening 201g formed from an upper surface of the substrate, wherein the opening of the substrate has a curved lateral surface extended from the upper surface of the substrate and a bottom formed below the upper surface of the substrate (see annotated Fig. above). Regarding the arguments on page 7 Lin teaches an isolation layer 210c comprising an upper layer formed on the upper surface of the substrate (210c spaces the metal 210b and so is interpreted to be an isolation layer Fig. 4, [0061]), and a fuse medium 210d conformally formed in the opening of the substrate (Fig. 4, [0062]); a fuse structure (210 and 201e) comprising a fuse electrode 210b disposed within the substrate (Fig. 4, [0060]), wherein a lateral surface of the fuse medium is formed between the curved lateral surface of the opening and a lateral surface of the fuse electrode (Fig. 4, [0062]), wherein a bottom surface of the fuse medium is formed between the bottom of the opening and a lower surface of the fuse electrode (Fig. 4, [0062]) as discussed in the rejection of claim 1 above. Regarding the arguments on page 8 Wu is relied upon to teach the limitation of claims 2, 5 and 7 as discussed in the rejection above and Ha is relied upon to teach the limitations of claim 8-9 as discussed in the rejection above.
Applicant’s arguments, see page 9, filed 05/28/2026, with respect to claim 10 have been fully considered and are persuasive. The rejection of claim 10 has been withdrawn.
Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to AARON J GRAY whose telephone number is (571)270-7629. The examiner can normally be reached Monday-Friday 9am-4pm.
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/AARON J GRAY/Examiner, Art Unit 2897
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