Prosecution Insights
Last updated: April 19, 2026
Application No. 18/384,138

BURIED INTERCONNECT TRAVERSING TRENCH ISOLATION

Non-Final OA §102§103§112
Filed
Oct 26, 2023
Examiner
SMITH, BRADLEY
Art Unit
2817
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Globalfoundries U S Inc.
OA Round
1 (Non-Final)
80%
Grant Probability
Favorable
1-2
OA Rounds
2y 6m
To Grant
76%
With Interview

Examiner Intelligence

Grants 80% — above average
80%
Career Allow Rate
695 granted / 873 resolved
+11.6% vs TC avg
Minimal -3% lift
Without
With
+-3.1%
Interview Lift
resolved cases with interview
Typical timeline
2y 6m
Avg Prosecution
37 currently pending
Career history
910
Total Applications
across all art units

Statute-Specific Performance

§101
2.6%
-37.4% vs TC avg
§103
42.6%
+2.6% vs TC avg
§102
25.5%
-14.5% vs TC avg
§112
24.8%
-15.2% vs TC avg
Black line = Tech Center average estimate • Based on career data from 873 resolved cases

Office Action

§102 §103 §112
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Drawings The drawings are objected to under 37 CFR 1.83(a). The drawings must show every feature of the invention specified in the claims. Therefore, the “one buried interconnect structure comprises a Vss line and a Vdd line electrically strapped to active regions” must be shown or the feature(s) canceled from the claim(s). No new matter should be entered. Corrected drawing sheets in compliance with 37 CFR 1.121(d) are required in reply to the Office action to avoid abandonment of the application. Any amended replacement drawing sheet should include all of the figures appearing on the immediate prior version of the sheet, even if only one figure is being amended. The figure or figure number of an amended drawing should not be labeled as “amended.” If a drawing figure is to be canceled, the appropriate figure must be removed from the replacement sheet, and where necessary, the remaining figures must be renumbered and appropriate changes made to the brief description of the several views of the drawings for consistency. Additional replacement sheets may be necessary to show the renumbering of the remaining figures. Each drawing sheet submitted after the filing date of an application must be labeled in the top margin as either “Replacement Sheet” or “New Sheet” pursuant to 37 CFR 1.121(d). If the changes are not accepted by the examiner, the applicant will be notified and informed of any required corrective action in the next Office action. The objection to the drawings will not be held in abeyance. Claim Rejections - 35 USC § 112 The following is a quotation of 35 U.S.C. 112(b): (b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention. The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph: The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention. Claims 4, 10 and 18 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention. Claim 4 discloses “wherein the trench isolation structure is on sides and a bottom surface of the at least one buried interconnect structure”. The examiner submits that if the trench isolation structure is on all sides of the interconnect and the bottom surface of the interconnect then the isolation structure would not extend through the trench isolation structure as disclosed in claim 3. The examiner submits the limitation “the trench isolation structure is on sides” could have at least two interpretations. The first interpretation would be some sides are covered. The second interpretation would be all sides are covered . The third interpretation would be all vertical sides are covered. MPEP 2173.06 II disclose “it would not be proper to reject such a claim on the basis of prior art. As stated in In reSteele, 305 F.2d 859, 134 USPQ 292 (CCPA 1962), a rejection under 35 U.S.C. 103 should not be based on considerable speculation about the meaning of terms employed in a claim or assumptions that must be made as to the scope of the claims.” Therefore prior art will not be applied to claim 4. Claim 10 discloses “one buried interconnect structure comprises a Vss line and a Vdd line electrically strapped to active regions”. The examiner does not understand how the “one buried interconnect structure” can comprise both “a Vss line and a Vdd line”. MPEP 2173.06 II disclose “it would not be proper to reject such a claim on the basis of prior art. As stated in In reSteele, 305 F.2d 859, 134 USPQ 292 (CCPA 1962), a rejection under 35 U.S.C. 103 should not be based on considerable speculation about the meaning of terms employed in a claim or assumptions that must be made as to the scope of the claims.” Therefore, prior art will not be applied to claim 10. Claim 18 discloses “the trench isolation structure extending through the epitaxial semiconductor material and the semiconductor substrate”. The examiner submits the limitation “the trench isolation structure extending through the epitaxial semiconductor material and the semiconductor substrate” could have at least two interpretations. The first interpretation would be the isolation trench extends through the substrate. The second interpretation would be the isolation trench extends through the epitaxial material and into the substrate. The examiner will only address the limitation “an epitaxial semiconductor material over the semiconductor substrate” with regards to claim 18. Claim Rejections - 35 USC § 102 The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. Claim(s) 1-3, 5-9, and 13 is/are rejected under 35 U.S.C. 102a1 as being anticipated by Kim et al. (US 2023/0106015). Regarding claim 1, Kim et al. disclose a semiconductor substrate (101) (figs. 5A and 8A); a trench isolation structure (107 or 110)(figs. 5A and 8A) extending into the semiconductor substrate; and at least one buried interconnect structure (142, 144, 180)(figs. 5A and 8A) in the semiconductor substrate and crossing (under) the trench isolation structure. Regarding claim 2, Kim et al. disclose the at least (part of) one buried interconnect structure (180) comprises a metallic interconnect [0039]. under an active device (160)(fig. 5A). Regarding claim 3, Kim et al. disclose the at least (part of) one buried interconnect structure (144) extends through the trench isolation structure (110)(fig. 5A). Regarding claim 5, Kim et al. disclose the at least (part of) one buried interconnect structure (142, 144, 180) (partially) surrounds the trench isolation structure (110) (fig. 5A). Regarding claim 6, Kim et al. disclose wherein the at least (part of) one buried interconnect (180) structure is below a top surface of the semiconductor substrate (fig. 5A). Regarding claim 7, Kim et al. disclose an epitaxial semiconductor material (101B) over the semiconductor substrate (fig. 9C). Regarding claim 8, Kim et al. disclose a via interconnect (146)(fig. 5A) structure extending through the trench isolation structure (110) from a top side, the via interconnect structure contacting the at least one buried interconnect structure. Regarding claim 9, Kim et al. disclose further comprising active regions (130) and at least one gate structure (165) between the active regions, wherein the at least one buried interconnect structure (180) is perpendicular to the active regions and parallel to the gate structure. Regarding claim 13, Kim et al. disclose the semiconductor substrate (101) comprises bulk semiconductor material [0020]. Claim(s) 14, 15, 17 and 18 is/are rejected under 35 U.S.C. 102a1 as being anticipated by Kim et al. (US 2023/0106015). Regarding claim 14, Kim et al. disclose a semiconductor substrate (101) (figs. 5A and 8A); a trench isolation structure (110) (figs. 5A and 8A) extending into the semiconductor substrate; a buried interconnect structure (180) comprising a metal material [0039], the buried interconnect structure located below a top surface of the semiconductor substrate and adjacent to the trench isolation structure (figs. 5A and 8A) and ; and a via interconnect (144, 146) structure contacting the buried interconnect structure and extending through the trench isolation structure(fig. 5A). Regarding claim 15, Kim et al. disclose the metal material comprises a refractory metal (tungsten)[0039]. Regarding claim 17, Kim et al. disclose the buried interconnect structure (180)(fig. 8A) surrounds (is on either side of the middle isolation structures 110 in fig 8A) the trench isolation structure (middle isolation structure 110). Regarding claim 18, Kim et al. disclose an epitaxial semiconductor material (101B) over the semiconductor substrate (101A) (fig. 9C). Claim(s) 20 is/are rejected under 35 U.S.C. 102a1 as being anticipated by Kim et al. (US 2023/0106015). Regarding claim 20, Kim et al. disclose forming a trench isolation structure (110) extending into a semiconductor substrate (101); and forming at least one buried interconnect structure (180) in the semiconductor substrate and crossing (under) the trench isolation structure (figs. 5A and 8A). Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claim(s) 19 is/are rejected under 35 U.S.C. 103 as being unpatentable over Kim et al. (US 2023/0106015) as applied to claim 14 above in view of Wu (US 2012/0228702). Kim disclose the invention supra. Kim fails to disclose the buried interconnect structure is provided at a bottom of the trench isolation structure. Wu disclose the buried interconnect structure (metal line 18, word line (19a) [0204]) is provided at a bottom of the trench isolation structure (20)[0205]. The prior art included each element claimed, although not necessarily in a single prior art reference, with the only difference between the claimed invention and the prior art being the lack of actual combination of the elements in a single prior art reference. One of ordinary skill in the art could have combined the elements as claimed by known methods (the isolation trench would electrically isolate the metal line), and that in combination, each element merely performs the same function as it does separately. One of ordinary skill in the art would have recognized that the results of the combination were predictable (the dielectric in the trench would electrically isolate the metal line). Allowable Subject Matter Claims 11-12, and 16 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to BRADLEY K SMITH whose telephone number is (571)272-1884. The examiner can normally be reached Monday-Friday, 10am-6pm. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Marlon Fletcher can be reached at 571-272-2063. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /BRADLEY SMITH/Primary Examiner, Art Unit 2817
Read full office action

Prosecution Timeline

Oct 26, 2023
Application Filed
Mar 10, 2026
Non-Final Rejection — §102, §103, §112 (current)

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
80%
Grant Probability
76%
With Interview (-3.1%)
2y 6m
Median Time to Grant
Low
PTA Risk
Based on 873 resolved cases by this examiner. Grant probability derived from career allow rate.

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