Prosecution Insights
Last updated: May 29, 2026
Application No. 18/385,435

INTERCONNECTION STRUCTURE AND MANUFACTURING METHOD THEREOF

Non-Final OA §102§103
Filed
Oct 31, 2023
Examiner
PHAM, LONG
Art Unit
2897
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Taiwan Semiconductor Manufacturing Company Ltd.
OA Round
1 (Non-Final)
92%
Grant Probability
Favorable
1-2
OA Rounds
0m
Est. Remaining
97%
With Interview

Examiner Intelligence

Grants 92% — above average
92%
Career Allowance Rate
1509 granted / 1649 resolved
+23.5% vs TC avg
Moderate +6% lift
Without
With
+5.5%
Interview Lift
resolved cases with interview
Typical timeline
2y 3m
Avg Prosecution
27 currently pending
Career history
1679
Total Applications
across all art units

Statute-Specific Performance

§101
0.1%
-39.9% vs TC avg
§103
56.9%
+16.9% vs TC avg
§102
23.7%
-16.3% vs TC avg
§112
9.5%
-30.5% vs TC avg
Black line = Tech Center average estimate • Based on career data from 1649 resolved cases

Office Action

§102 §103
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Election/Restrictions Applicant’s election without traverse of claims 17-36 in the reply filed on 3/27/26 is acknowledged. Claim Rejections - 35 USC § 102 The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. Claim(s) 17, 18, 19, and 24 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Wang et al. (US pat 7968967). With respect to claim 17, Wang et al. teach a method for manufacturing an interconnection structure comprising (figs. 1-18, particularly fig. 9 and associated text): forming a first dielectric layer 26 formed on a first etch stop layer 20; forming a first conductive feature 102 in the first dielectric layer; disposing a second dielectric layer 26 on one side of the first dielectric layer to cover the first conductive feature; and forming a second conductive feature 202 in the first dielectric layer, wherein the first conductive feature comprises a first conductive material (aluminum) and the second conductive feature comprises a second conductive material (silver) and a barrier layer 204, the first conductive material is different from the second conductive material, and the first conductive material does not contain copper, and the second conductive material does not contain copper. With respect to claim 18, Wang et al. teach forming a third conductive feature 142 in the second dielectric layer, wherein the third conductive feature comprises a third conductive material (tungsten), the third conductive material does not contain copper. See fig. 9 and associated text. With respect to claim 19, Wang et al. teach forming a third conductive feature 142 and a fourth conductive feature 242 respectively in the second dielectric layer, wherein the third conductive feature 142 and the first conductive feature 102 is electrically connected, and the fourth conductive feature 242 is electrically connected to the second conductive feature 202. See fig. 9 and associated text. With respect to claim 24, Wang et al. teach the first conductive feature and the second conductive feature are respectively embedded in the first dielectric layer and are not connected to each other. See fig. 9 and associated text. Claim(s) 26 and 29 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Lee et al. (US pub 20230064448). With respect to claim 26, Lee et al. teach a method for manufacturing an interconnection structure comprising (figs. 1-33, particularly fig. 18 and associated text): forming a first dielectric layer 21; forming a first conductive feature left 23 and a second conductive feature right 23 in the first dielectric layer; disposing a second dielectric layer 26 on one side of the first dielectric layer to cover the first and second conductive features; and forming a third conductive feature left 28 and a fourth conductive feature right 28 in the second dielectric layer and electrically connecting the third conductive feature to the first conductive feature and electrically connecting the fourth conductive feature to the second conductive feature, wherein the second conductive feature is a via with a second critical dimension (top width), and the fourth conductive feature is a wire with a fourth critical dimension (top width) greater than the second critical dimension. wherein the second conductive feature comprises a second conductive material 23 (Al or Co) and the fourth conductive feature comprises a fourth conductive material 28 (Cu) and a barrier layer 27 surrounding the fourth conductive material, the second conductive material is different from the fourth conductive material, and the second conductive material does not contain copper, and the fourth conductive material contains copper. With respect to claim 29, Lee et al. teach the second conductive material comprises cobalt (Co), ruthenium (Ru), molybdenum (Mo), chromium (Cr), tungsten (W), manganese (Mn), Rhodium (Rh), iridium (Ir), nickel (Ni), palladium (Pd), platinum (Pt), silver (Ag), gold (Au), aluminum (Al) or alloys of the above metals. See fig. 18 and associated text. Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claim(s) 30 is/are rejected under 35 U.S.C. 103 as being unpatentable over Lee et al. (US pub 20230064448). With respect to claim 30, Lee et al. fail to the interconnector or connector includes NiAl. However, the use of NiAl alloy for conductor material is well-known in semiconductor art. Claim(s) 31, and 35 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Lee et al. (US pub 20230064448). With respect to claim 31, Lee et al. teach a method for manufacturing an interconnection structure comprising (figs. 1-33, particularly fig. 18 and associated text): disposing a bottom conductive feature 23 in a first dielectric layer 21; and disposing a top conductive feature 28 in a second dielectric layer 26 located on a side of the first dielectric layer and electrically connecting the top conductive feature to the bottom conductive feature, wherein the bottom conductive feature is formed by partially etching the first dielectric layer to form a concave and forming a first conductive material 23 ((Al or Co) into the concave, and the first conductive material does not contain copper; wherein the top conductive feature is formed by partially etching the second dielectric layer to form a line trench and forming a second conductive material 28 (Cu) and a barrier layer 27 into the line trench, and the second conductive material contains copper. With respect to claim 35, Lee et al. teach the bottom conductive feature has a first critical dimension (top width), and the top conductive feature has a second critical dimension (top width) greater than the first critical dimension. See fig. 18 and associated text. Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claim(s) 32, 33, 34, and 36 is/are rejected under 35 U.S.C. 103 as being unpatentable over Lee et al. (US pub 20230064448). With respect to claim 32, Lee et al. teach the top conductive feature is copper wire but fail to teach the range for the width for the wire. However, it would have been obvious to one of ordinary skill in the art of making semiconductor devices to determine the workable or optimal value or range for the wire width through routine experimentation and optimization to obtain optimal or desired device performance because there is no evidence indicating that claimed range is critical or produces any unexpected results and it has been held that it is not inventive to discover the optimum or workable ranges of a result-effective variable within given prior art conditions by routine experimentation. See MPEP 2144.05. With respect to claim 33, Lee et al. teach the bottom conductive feature is a blind via but fail to teach the range for the width for the blind via. However, it would have been obvious to one of ordinary skill in the art of making semiconductor devices to determine the workable or optimal value or range for the blind via width through routine experimentation and optimization to obtain optimal or desired device performance because there is no evidence indicating that claimed range is critical or produces any unexpected results and it has been held that it is not inventive to discover the optimum or workable ranges of a result-effective variable within given prior art conditions by routine experimentation. See MPEP 2144.05. With respect to claim 34, Lee et al. teach wherein a resistivity of the first conductive material is greater than a resistivity of the second conductive material (because of the presence of barrier 27 around the second conductive material). See fig. 18 and associated text. With respect to claim 36, Lee et al. teach the top conductive feature is copper wire but fail to teach the range for the width for the wire. However, it would have been obvious to one of ordinary skill in the art of making semiconductor devices to determine the workable or optimal value or range for the wire width through routine experimentation and optimization to obtain optimal or desired device performance because there is no evidence indicating that claimed range is critical or produces any unexpected results and it has been held that it is not inventive to discover the optimum or workable ranges of a result-effective variable within given prior art conditions by routine experimentation. See MPEP 2144.05. Allowable Subject Matter Claims 20-23, 25, and 27-28 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. Examiner’s Cited References The cited references generally show the similar or related structure having a first conductive feature and a second conductive feature in a dielectric layer wherein the materials for the first and second features are different and don’t contain copper as presently claimed by applicant. Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to LONG PHAM whose telephone number is (571)272-1714. The examiner can normally be reached Mon-Friday. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Jacob Choi can be reached at 469-295-9060. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. LONG . PHAM Examiner Art Unit 2823 /LONG PHAM/Primary Examiner, Art Unit 2897
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Prosecution Timeline

Oct 31, 2023
Application Filed
May 06, 2026
Non-Final Rejection mailed — §102, §103 (current)

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
92%
Grant Probability
97%
With Interview (+5.5%)
2y 3m (~0m remaining)
Median Time to Grant
Low
PTA Risk
Based on 1649 resolved cases by this examiner. Grant probability derived from career allowance rate.

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