Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 1, 2, 3, 4, 6, 8, 10, 11, 12, 13, 14, 16, 17, 18 is/are rejected under 35 U.S.C. 103 as being unpatentable over US20140071457A1 (hereinafter Cai), in view of JP 2011232279 A (Yutaka), and further in view of US20210262950A1 (hereinafter Blasenheim).
Regarding claim 1, Cai teaches a semiconductor measurement system comprising: “an illumination source configured to generate an amount of illumination radiation incident on a semiconductor wafer” (fig. 6 element 602, para [0070]), “wherein one or more structures are fabricated on a surface of the semiconductor wafer” (para [0004] lines 1-8, para [0030] lines 1-6); “a detector configured to detect an amount of collected radiation from the semiconductor wafer in response to the incident amount of illumination radiation” (fig. 6 element 604, para [0072]); “a wafer normal position sensor subsystem configured to measure a normal position value at a first plurality of locations across the surface of the semiconductor wafer” (fig. 6 elements 306, 304, 310; the normal position value is θ as shown in fig. 4A), “wherein each normal position value is a position of the semiconductor wafer with respect to the illumination source and the detector in a direction normal to the surface of the semiconductor wafer” (the orthogonal broken line in element 312 of fig. 4A is perpendicular with respect to the illumination source and the detector in a direction normal to the surface of the semiconductor wafer);
Cai does not teach a computing system configured to: estimate values characterizing a local slope associated with each of the first plurality of locations across the surface of the semiconductor wafer based on the normal position values at the first plurality of locations; and estimate a desired correction of orientation of the semiconductor wafer at a measurement location of the semiconductor wafer based on the values characterizing the local slope and values of a wafer orientation correction map.
Yutaka, from the same field of endeavor as Cai, teaches “a computing system configured to: estimate values characterizing a local slope associated with each of the first plurality of locations across the surface of the semiconductor wafer based on the normal position values at the first plurality of locations” (Abstract lines 2-14; the local slope corresponds to the tilt of the substrate).
Therefore, it would have been obvious to a person having ordinary skill in the art before the effective filing date of the invention to apply the teaching of Yutaka to Cai to have “a computing system configured to: estimate values characterizing a local slope associated with each of the first plurality of locations across the surface of the semiconductor wafer based on the normal position values at the first plurality of locations” in order to prevent false recognition of tilt of a substrate due to solder or rubbish or the like scattered on the substrate (Abstract lines 1-2).
Cai, when modified by Yutaka, does not teach “estimate a desired correction of orientation of the semiconductor wafer at a measurement location of the semiconductor wafer based on the values characterizing the local slope and values of a wafer orientation correction map”.
Blasenheim, from the same field of endeavor as Cai, teaches “estimate a desired correction of orientation of the semiconductor wafer at a measurement location of the semiconductor wafer based on the values characterizing the local slope and values of a wafer orientation correction map” (para [0108], para [0109]; the local slope corresponds to the tilt).
Therefore, it would have been obvious to a person having ordinary skill in the art before the effective filing date of the invention to apply the teaching of Blasenheim to Cai, when modified by Yutaka, to have “estimate a desired correction of orientation of the semiconductor wafer at a measurement location of the semiconductor wafer based on the values characterizing the local slope and values of a wafer orientation correction map” in order to ensure effective measurements (para [0014]).
Regarding claim 2, Cai does not teach the semiconductor measurement system of Claim 1, further comprising: a specimen positioning system configured to orient the semiconductor wafer about a first axis and a second axis at the measurement location based on the desired correction of orientation, wherein the first and second axes are aligned with the surface of the semiconductor wafer and the second axis is orthogonal to the first axis.
Blasenheim, from the same field of endeavor as Cai, teaches the semiconductor measurement system of Claim 1, further comprising: “a specimen positioning system configured to orient the semiconductor wafer about a first axis and a second axis at the measurement location based on the desired correction of orientation, wherein the first and second axes are aligned with the surface of the semiconductor wafer and the second axis is orthogonal to the first axis” (the positioning system is element 140 as shown in fig. 5; the axes are RX and RY, para [0109]).
Therefore, it would have been obvious to a person having ordinary skill in the art before the effective filing date of the invention to apply the teaching of Blasenheim to Cai, when modified by Yutaka, to have the semiconductor measurement system of Claim 1, further comprising: “a specimen positioning system configured to orient the semiconductor wafer about a first axis and a second axis at the measurement location based on the desired correction of orientation, wherein the first and second axes are aligned with the surface of the semiconductor wafer and the second axis is orthogonal to the first axis” in order to orient the sample at the correct orientation and in order to ensure effective measurements (para [0014]).
Regarding claim 3, Cai does not teach the semiconductor measurement system of Claim 2, the computing system further configured to: “estimate a value of a parameter of interest characterizing the one or more structures based on an amount of collected radiation detected at the measurement spot after the semiconductor wafer is oriented about the first and second axes based on the desired correction of orientation”.
Blasenheim, from the same field of endeavor as Cai, teaches the semiconductor measurement system of Claim 2, the computing system further configured to: “estimate a value of a parameter of interest characterizing the one or more structures based on an amount of collected radiation detected at the measurement spot after the semiconductor wafer is oriented about the first and second axes based on the desired correction of orientation” (para [0066]; the measurement can also be performed after proper orientation of the sample).
Therefore, it would have been obvious to a person having ordinary skill in the art before the effective filing date of the invention to apply the teaching of Blasenheim to Cai, when modified by Yutaka, to have the semiconductor measurement system of Claim 2, the computing system further configured to: “estimate a value of a parameter of interest characterizing the one or more structures based on an amount of collected radiation detected at the measurement spot after the semiconductor wafer is oriented about the first and second axes based on the desired correction of orientation” in order produce angularly resolved scattered x-rays (para [0066]).
Regarding claim 4, Cai does not teach the semiconductor measurement system of Claim 1, further comprising: “a wafer orientation measurement subsystem comprising: a first optical illumination source configured to generate an optical illumination beam directed to a surface of a calibration semiconductor wafer”; and “a first optical detector configured to detect light reflected from the calibration semiconductor wafer in response to the incident optical illumination beam”, wherein the computing system is further configured to: estimate an orientation of the calibration semiconductor wafer with respect to the illumination source and the detector at each of a second plurality of locations across the surface of the calibration semiconductor wafer based on a location of incidence of the light reflected from the calibration semiconductor wafer on the first optical detector at each of the second plurality of locations across the surface of the calibration semiconductor wafer.
Blasenheim, from the same field of endeavor as Cai, teaches the semiconductor measurement system of Claim 1, further comprising: “a wafer orientation measurement subsystem comprising: a first optical illumination source configured to generate an optical illumination beam directed to a surface of a calibration semiconductor wafer” (fig. 6 element 201 para [0085]); and “a first optical detector configured to detect light reflected from the calibration semiconductor wafer in response to the incident optical illumination beam” (fig. 6 element 205 para [0085]), wherein the computing system is further configured to: estimate an orientation of the calibration semiconductor wafer with respect to the illumination source and the detector (figs. 6-7) at “each of a second plurality of locations across the surface of the calibration semiconductor wafer based on a location of incidence of the light reflected from the calibration semiconductor wafer on the first optical detector at each of the second plurality of locations across the surface of the calibration semiconductor wafer” (para [0105] multiple sites on the wafer).
Therefore, it would have been obvious to a person having ordinary skill in the art before the effective filing date of the invention to apply the teaching of Blasenheim to Cai, when modified by Yutaka, to have the semiconductor measurement system of Claim 1, further comprising: “a wafer orientation measurement subsystem comprising: a first optical illumination source configured to generate an optical illumination beam directed to a surface of a calibration semiconductor wafer”; and “a first optical detector configured to detect light reflected from the calibration semiconductor wafer in response to the incident optical illumination beam”, wherein the computing system is further configured to: estimate an orientation of the calibration semiconductor wafer with respect to the illumination source and the detector at each of a second plurality of locations across the surface of the calibration semiconductor wafer based on a location of incidence of the light reflected from the calibration semiconductor wafer on the first optical detector at each of the second plurality of locations across the surface of the calibration semiconductor wafer in order ensure effective measurements (para [0014]).
Regarding claim 6, Cai does not teach the semiconductor measurement system of Claim 1, wherein the wafer normal position sensor subsystem is an element of an automatic focusing subsystem of the semiconductor measurement system configured to position the semiconductor wafer in a focal plane of the illumination source and detector.
Yutaka, from the same field of endeavor as Cai, teaches “the semiconductor measurement system of Claim 1, wherein the wafer normal position sensor subsystem is an element of an automatic focusing subsystem of the semiconductor measurement system configured to position the semiconductor wafer in a focal plane of the illumination source and detector” (p. 6 para 2 lines 6-9; the focusing method implies the semiconductor wafer in a focal plane of the illumination source and detector).
Therefore, it would have been obvious to a person having ordinary skill in the art before the effective filing date of the invention to apply the teaching of Yutaka to Cai, when modified by Blasenheim and Wormington, to have “the semiconductor measurement system of Claim 1, wherein the wafer normal position sensor subsystem is an element of an automatic focusing subsystem of the semiconductor measurement system configured to position the semiconductor wafer in a focal plane of the illumination source and detector” in order to prevent false recognition of tilt of a substrate due to solder or rubbish or the like scattered on the substrate (Abstract lines 1-2).
Regarding claim 8, Cai teaches the semiconductor measurement system of Claim 1, wherein the one or more structures fabricated on the surface of the semiconductor wafer include one or more film structures (para [0030] lines 6-15), one or more critical dimension structures, or a combination thereof.
Regarding claim 10, Cai does not teach the semiconductor measurement system of Claim 4, wherein the optical detector is a quadrant cell photoreceiver.
Blasenheim, from the same field of endeavor as Cai, teaches the semiconductor measurement system of Claim 4, wherein the optical detector is a quadrant cell photoreceiver (para [0089] lines 1-3; two dimensional imaging device is a quadrant cell photoreceiver).
Therefore, it would have been obvious to a person having ordinary skill in the art before the effective filing date of the invention to apply the teaching of Blasenheim to Cai, when modified by Yutaka, to have the semiconductor measurement system of Claim 4, wherein the optical detector is a quadrant cell photoreceiver in order ensure effective measurements (para [0014]).
Regarding claim 11, Cai teaches the semiconductor measurement system of Claim 1, “the wafer normal position sensor subsystem, comprising: an optical illumination source configured to generate an amount of optical illumination directed to the surface of the semiconductor wafer; and an optical detector configured to detect light reflected from the semiconductor wafer in response to the incident optical illumination” (these are all shown in fig. 4A), “wherein the computing system is further configured to estimate the normal position value at the first plurality of locations across the surface of the semiconductor wafer based on a location of incidence of the light reflected from the semiconductor wafer on the optical detector at each of the first plurality of locations across the surface of the semiconductor wafer” (fig. 6 the computing system is element 302 where the normal is θ as shown in fig. 4A).
Regarding claim 12, Cai teaches the semiconductor measurement system of Claim 11, wherein the optical detector is a bi-cell photoreceiver (para [0059] lines 20-21), a position sensitive detector comprising an array of photosensitive cells, or an interferometer.
Regarding claim 13, the modified device of Cai does not teach the semiconductor measurement system of Claim 11, wherein the illumination source and the optical illumination source are the same illumination source.
MPEP 2144.04 VI-B In re Harza, 274 F.2d 669, 124 USPQ 378 (CCPA 1960) states that “the court held that mere duplication of parts has no patentable significance unless a new and unexpected result is produced”. This means the limitation “the semiconductor measurement system of Claim 11, wherein the illumination source and the optical illumination source are the same illumination source” is merely a duplication of parts.
Therefore, it would have been obvious to a person having ordinary skill in the art before the effective filing date of the invention to apply wherein the illumination source and the optical illumination source are the same illumination source in order to reduce the cost of the device.
Regarding claim 14, Cai teaches the semiconductor measurement system of Claim 2, the specimen positioning system, comprising: “a two axis wafer stage configured to locate the semiconductor wafer with respect to the illumination source and the detector at any location on the surface of the semiconductor wafer” (para [0029] lines 5-9; para [0025] lines 5-13, actuating the stage in two axes); a wafer chuck configured to removably couple the semiconductor wafer to the specimen positioning system (para [0029] lines 5-9).
Cai, when modified by Yutaka, does not teach “at least three actuators spaced apart from one another, wherein each of the at least three actuators is mechanically coupled between the wafer chuck and the two axis wafer stage, wherein a direction of extent of each of the at least three actuators is approximately parallel to a direction normal to the surface of the semiconductor wafer when coupled to the wafer chuck”.
Blasenheim, from the same field of endeavor as Cai, teaches “at least three actuators spaced apart from one another, wherein each of the at least three actuators is mechanically coupled between the wafer chuck and the two axis wafer stage, wherein a direction of extent of each of the at least three actuators is approximately parallel to a direction normal to the surface of the semiconductor wafer when coupled to the wafer chuck” (this entire limitation is shown in fig. 5 actuators 150A-C, para [0077-80]).
Therefore, it would have been obvious to a person having ordinary skill in the art before the effective filing date of the invention to apply the teaching of Blasenheim to Cai, when modified by Yutaka, to have “at least three actuators spaced apart from one another, wherein each of the at least three actuators is mechanically coupled between the wafer chuck and the two axis wafer stage, wherein a direction of extent of each of the at least three actuators is approximately parallel to a direction normal to the surface of the semiconductor wafer when coupled to the wafer chuck” in order to orient the sample at the correct orientation in order to ensure effective measurements (para [0014]).
Regarding claim 16, Cai teaches a method comprising: measuring a normal position value at a first plurality of locations across the surface of a semiconductor wafer (this represents θ in fig. 4A), wherein each normal position value is a position of the semiconductor wafer with respect to an illumination source (fig. 4a element 310) and a detector of a semiconductor measurement system in a direction normal to the surface of the semiconductor wafer (fig. 4a element 304);
Cai does not teach estimating values characterizing a local slope associated with each of the first plurality of locations across the surface of the semiconductor wafer based on the normal position values at the first plurality of locations; and estimating a desired correction of orientation of the semiconductor wafer at a measurement location of the semiconductor wafer based on the values characterizing the local slope and values of a wafer orientation correction map.
Yutaka, from the same field of endeavor as Cai, teaches “estimating values characterizing a local slope associated with each of the first plurality of locations across the surface of the semiconductor wafer based on the normal position values at the first plurality of locations” (Abstract lines 2-14; the local slope corresponds to the tilt of the substrate).
Therefore, it would have been obvious to a person having ordinary skill in the art before the effective filing date of the invention to apply the teaching of Yutaka to Cai to have “estimating values characterizing a local slope associated with each of the first plurality of locations across the surface of the semiconductor wafer based on the normal position values at the first plurality of locations” in order to prevent false recognition of tilt of a substrate due to solder or rubbish or the like scattered on the substrate (Abstract lines 1-2).
Cai, when modified by Yutaka, does not teach “estimating a desired correction of orientation of the semiconductor wafer at a measurement location of the semiconductor wafer based on the values characterizing the local slope and values of a wafer orientation correction map”.
Blasenheim, from the same field of endeavor as Cai, teaches “estimating a desired correction of orientation of the semiconductor wafer at a measurement location of the semiconductor wafer based on the values characterizing the local slope and values of a wafer orientation correction map” (para [0108], para [0109]; the local slope corresponds to the tilt).
Therefore, it would have been obvious to a person having ordinary skill in the art before the effective filing date of the invention to apply the teaching of Blasenheim to Cai, when modified by Yutaka, to have “estimating a desired correction of orientation of the semiconductor wafer at a measurement location of the semiconductor wafer based on the values characterizing the local slope and values of a wafer orientation correction map” in order to ensure effective measurements (para [0014]).
Regarding claim 17, Cai does not teach the method of Claim 16, further comprising: orienting the semiconductor wafer at the measurement location about a first axis and a second axis based on the desired correction of orientation, wherein the first and second axes are aligned with the surface of the semiconductor wafer and the second axis is orthogonal to the first axis.
Blasenheim, from the same field of endeavor as Cai, teaches “the method of Claim 16, further comprising: orienting the semiconductor wafer at the measurement location about a first axis and a second axis based on the desired correction of orientation, wherein the first and second axes are aligned with the surface of the semiconductor wafer and the second axis is orthogonal to the first axis” (the positioning system is element 140 as shown in fig. 5; the axes are RX and RY, para [0109]).
Therefore, it would have been obvious to a person having ordinary skill in the art before the effective filing date of the invention to apply the teaching of Blasenheim to Cai, when modified by Yutaka, to have the method of Claim 16, further comprising: orienting the semiconductor wafer at the measurement location about a first axis and a second axis based on the desired correction of orientation, wherein the first and second axes are aligned with the surface of the semiconductor wafer and the second axis is orthogonal to the first axis in order to orient the sample at the correct orientation and in order to ensure effective measurements (para [0014]).
Regarding claim 18, Cai teaches the method of Claim 17, further comprising: generating an amount of illumination radiation incident on the semiconductor wafer at the measurement location (fig. 6 element 602), wherein one or more structures are fabricated on the surface of the semiconductor wafer (fig. 6 para [0030] lines 1-10); “detecting an amount of collected radiation from the semiconductor wafer in response to the incident amount of illumination radiation” (fig. 6 element 604).
Cai, when modified by Yutaka, fails to teach estimating a value of a parameter of interest characterizing the one or more structures based on the amount of collected radiation detected at the measurement spot after the semiconductor wafer is oriented about the first and second axes based on the desired correction of orientation.
Blasenheim, from the same field of endeavor as Cai, teaches estimating a value of a parameter of interest characterizing the one or more structures based on the amount of collected radiation detected at the measurement spot after the semiconductor wafer is oriented about the first and second axes based on the desired correction of orientation (para [0066]; the measurement can also be performed after proper orientation of the sample).
Therefore, it would have been obvious to a person having ordinary skill in the art before the effective filing date of the invention to apply the teaching of Blasenheim to Cai, when modified by Yutaka, to have estimating a value of a parameter of interest characterizing the one or more structures based on the amount of collected radiation detected at the measurement spot after the semiconductor wafer is oriented about the first and second axes based on the desired correction of orientation in order produce angularly resolved scattered x-rays (para [0066]).
Claim(s) 5, 19, 20 is/are rejected under 35 U.S.C. 103 as being unpatentable over Cai, Yutaka, and Blasenheim, as applied to claim(s) 4, 16 above, and further in view of JP 2019191169 A (hereinafter Wormington).
Regarding claim 5, Cai does not teach the semiconductor measurement system of claim 4 the semiconductor measurement system of wherein the wafer normal position sensor subsystem is further configured measure a normal position value at the second plurality of locations across the surface of the calibration semiconductor wafer, and “wherein the computing system is further configured to: estimate values characterizing a local slope associated with each of the second plurality of locations across the surface of the calibration semiconductor wafer based on the normal position values at the second plurality of locations”; and the estimated orientation of the calibration semiconductor wafer with respect to the illumination source and the detector.
Blasenheim, from the same field of endeavor as Cai, teaches the semiconductor measurement system of the semiconductor measurement system of wherein the wafer normal position sensor subsystem is further configured measure a normal position value at the second plurality of locations across the surface of the calibration semiconductor wafer (para [0105] multiple sites on the wafer, figs. 6-7 shows normal to the wafer surface), “wherein the computing system is further configured to: estimate values characterizing a local slope associated with each of the second plurality of locations across the surface of the calibration semiconductor wafer based on the normal position values at the second plurality of locations” (para [0108-109]) and the estimated orientation of the calibration semiconductor wafer with respect to the illumination source and the detector (para [0108-109]).
Therefore, it would have been obvious to a person having ordinary skill in the art before the effective filing date of the invention to apply the teaching of Blasenheim to Cai, when modified by Yutaka, to have the semiconductor measurement system of the semiconductor measurement system of wherein the wafer normal position sensor subsystem is further configured measure a normal position value at the second plurality of locations across the surface of the calibration semiconductor wafer, “wherein the computing system is further configured to: estimate values characterizing a local slope associated with each of the second plurality of locations across the surface of the calibration semiconductor wafer based on the normal position values at the second plurality of locations” and the estimated orientation of the calibration semiconductor wafer with respect to the illumination source and the detector in order ensure effective measurements (para [0014]).
Cai, when modified by Yutaka and Blasenheim, fails to teach wherein each normal position value is a position of the unpatterend semiconductor wafer with respect to the illumination source and the detector in a direction normal to the surface of the calibration semiconductor wafer and generate the wafer orientation correction map based on a difference between the estimated values characterizing the local slope at each of the second plurality of locations across the surface of the calibration semiconductor wafer.
Wormington, from the same field of endeavor as Cai, teaches wherein each normal position value is a position of the unpatterend semiconductor wafer with respect to the illumination source and the detector in a direction normal to the surface of the calibration semiconductor wafer (p. 8 para 8) and generate the wafer orientation correction map based on a difference between the estimated values characterizing the local slope at each of the second plurality of locations across the surface of the calibration semiconductor wafer (p. 8 para 8; also Wormington teaches the estimated orientation, which is the tilt angles providing the overall orientation of the wafer, in comparison to the the blanket area, p. 11 para 5).
Therefore, it would have been obvious to a person having ordinary skill in the art before the effective filing date of the invention to apply the teaching of Wormington to Cai, when modified by Yutaka and Blasenheim, to have wherein each normal position value is a position of the unpatterend semiconductor wafer with respect to the illumination source and the detector in a direction normal to the surface of the calibration semiconductor wafer and generate the wafer orientation correction map based on a difference between the estimated values characterizing the local slope at each of the second plurality of locations across the surface of the calibration semiconductor wafer in order to improve the accuracy of the measurements.
Regarding claim 19, the modified apparatus of Cai fails to teach the method of Claim 16, further comprising: measuring a normal position value at a second plurality of locations across a surface of a calibration semiconductor wafer, wherein each normal position value is a position of the semiconductor wafer with respect to the illumination source and the detector of the semiconductor measurement system in a direction normal to the surface of the calibration semiconductor wafer; estimating values characterizing a local slope associated with each of the second plurality of locations across the surface of the calibration semiconductor wafer based on the normal position values at the second plurality of locations; and generating the wafer orientation correction map based on a difference between the estimated values characterizing the local slope at each of the second plurality of locations across the surface of the calibration semiconductor wafer and a measured orientation of the calibration semiconductor wafer with respect to the illumination source and the detector.
Wormington, from the same field of endeavor as Cai, teaches the method of Claim 16, further comprising: measuring a normal position value at a second plurality of locations across a surface of a calibration semiconductor wafer (p. 8 para 8; the second plurality of locations correspond to the unpatterned surface), “wherein each normal position value is a position of the semiconductor wafer with respect to the illumination source and the detector of the semiconductor measurement system in a direction normal to the surface of the calibration semiconductor wafer” (p. 8 last para to p. 9 para 1); “estimating values characterizing a local slope associated with each of the second plurality of locations across the surface of the calibration semiconductor wafer based on the normal position values at the second plurality of locations” (p. 8 para 8); and “generating the wafer orientation correction map based on a difference between the estimated values characterizing the local slope at each of the second plurality of locations across the surface of the calibration semiconductor wafer and a measured orientation of the calibration semiconductor wafer with respect to the illumination source and the detector” (p. 11 para 5, the difference between the tilt angles measured in the blanket area and the patterned area of the wafer).
Therefore, it would have been obvious to a person having ordinary skill in the art before the effective filing date of the invention to apply the teaching of Wormington to Cai, when modified by Yutaka and Blasenheim, to have the method of Claim 16, further comprising: measuring a normal position value at a second plurality of locations across a surface of a calibration semiconductor wafer, wherein each normal position value is a position of the semiconductor wafer with respect to the illumination source and the detector of the semiconductor measurement system in a direction normal to the surface of the calibration semiconductor wafer; estimating values characterizing a local slope associated with each of the second plurality of locations across the surface of the calibration semiconductor wafer based on the normal position values at the second plurality of locations; and generating the wafer orientation correction map based on a difference between the estimated values characterizing the local slope at each of the second plurality of locations across the surface of the calibration semiconductor wafer and a measured orientation of the calibration semiconductor wafer with respect to the illumination source and the detector in order to improve the accuracy of the measurements.
Regarding claim 20, the modified apparatus of Cai does not teach the method of Claim 19, further comprising: generating an optical illumination beam directed to the surface of the calibration semiconductor wafer; detecting light reflected from the calibration semiconductor wafer in response to the incident optical illumination beam; and determining the measured orientation of the calibration semiconductor wafer with respect to the illumination source and the detector at each of a second plurality of locations across the surface of the calibration semiconductor wafer based on a location of incidence of the detected light reflected from the calibration semiconductor wafer at each of the second plurality of locations across the surface of the calibration semiconductor wafer.
Wormington, from the same field of endeavor as Cai, teaches “the method of Claim 19, further comprising: generating an optical illumination beam directed to the surface of the calibration semiconductor wafer; detecting light reflected from the calibration semiconductor wafer in response to the incident optical illumination beam; and determining the measured orientation of the calibration semiconductor wafer with respect to the illumination source and the detector at each of a second plurality of locations across the surface of the calibration semiconductor wafer based on a location of incidence of the detected light reflected from the calibration semiconductor wafer at each of the second plurality of locations across the surface of the calibration semiconductor wafer” (this entire limitation is discussed in p. 11 para 5-7; the second locations represent the blanket surface).
Therefore, it would have been obvious to a person having ordinary skill in the art before the effective filing date of the invention to apply the teaching of Wormington to Cai, when modified by Yutaka and Blasenheim, to have “the method of Claim 19, further comprising: generating an optical illumination beam directed to the surface of the calibration semiconductor wafer; detecting light reflected from the calibration semiconductor wafer in response to the incident optical illumination beam; and determining the measured orientation of the calibration semiconductor wafer with respect to the illumination source and the detector at each of a second plurality of locations across the surface of the calibration semiconductor wafer based on a location of incidence of the detected light reflected from the calibration semiconductor wafer at each of the second plurality of locations across the surface of the calibration semiconductor wafer” in order to improve the accuracy of the measurements.
Claim(s) 7, 9 is/are rejected under 35 U.S.C. 103 as being unpatentable over Cai, Yutaka, and Blasenheim, as applied to claim(s) 1, 4 above, and further in view of KR 20170113339 A (hereinafter Marcus).
Regarding claim 7, the modified device of Cai does not teach the semiconductor measurement system of Claim 1, wherein the illumination source and the detector are elements of any of a single wavelength ellipsometer, a spectroscopic ellipsometer, a beam profile reflectometer, an x-ray based scatterometer, and a spectroscopic reflectometer.
Marcus, from the same field of endeavor as Cai, teaches the semiconductor measurement system of Claim 1, wherein the illumination source and the detector are elements of any of a single wavelength ellipsometer, a spectroscopic ellipsometer, a beam profile reflectometer, an x-ray based scatterometer, and a spectroscopic reflectometer (p. 2 para 14).
Therefore, it would have been obvious to a person having ordinary skill in the art before the effective filing date of the invention to apply the teaching of Marcus to the modified device of Cai to have “the semiconductor measurement system of Claim 1, wherein the illumination source and the detector are elements of any of a single wavelength ellipsometer, a spectroscopic ellipsometer, a beam profile reflectometer, an x-ray based scatterometer, and a spectroscopic reflectometer” in order to obtain various characteristics of the substrate (p. 2 para 14 last sentence).
Regarding claim 9, the modified device of Cai does not teach the semiconductor measurement system of claim 4, wherein the optical illumination source is a Light Emitting Diode (LED) based light source, a laser based light source, or a Xenon based light source.
Marcus, from the same field of endeavor as Cai, teaches the semiconductor measurement system of claim 4, wherein the optical illumination source is a Light Emitting Diode (LED) based light source, a laser based light source (p. 2 para 14), or a Xenon based light source.
Therefore, it would have been obvious to a person having ordinary skill in the art before the effective filing date of the invention to apply the teaching of Marcus to the modified device of Cai to have “the semiconductor measurement system of claim 4, wherein the optical illumination source is a Light Emitting Diode (LED) based light source, a laser based light source, or a Xenon based light source” in order to obtain various characteristics of the substrate (p. 2 para 14 last sentence).
Claim(s) 15 is/are rejected under 35 U.S.C. 103 as being unpatentable over Cai, Yutaka, and Blasenheim, as applied to claim(s) 14 above, and further in view of JP H10116120 A (hereinafter Toshiya).
Regarding claim 15, Cai, when modified by Yutaka and Blasenheim, does not teach the semiconductor measurement system of Claim 14, the specimen positioning system further comprising: at least three position sensors, each of the at least three position sensors located in close proximity to a corresponding actuator of the at least three actuators, wherein each of the at least three position sensors is configured to measure a displacement in the direction of extent of each corresponding actuator.
Toshiya, from the same field of endeavor as Cai, teaches “the semiconductor measurement system of Claim 14, the specimen positioning system further comprising: at least three position sensors, each of the at least three position sensors located in close proximity to a corresponding actuator of the at least three actuators, wherein each of the at least three position sensors is configured to measure a displacement in the direction of extent of each corresponding actuator” (fig. 1 three actuators 3a-c and three position sensors 5a-c, p. 2 para 2).
Therefore, it would have been obvious to a person having ordinary skill in the art before the effective filing date of the invention to apply the teaching of Toshiya to Cai, when modified by Yutaka and Blasenheim, to have “the semiconductor measurement system of Claim 14, the specimen positioning system further comprising: at least three position sensors, each of the at least three position sensors located in close proximity to a corresponding actuator of the at least three actuators, wherein each of the at least three position sensors is configured to measure a displacement in the direction of extent of each corresponding actuator” in order to suppress the influence of interference and independently setting control characteristics for each axis (p. 1 para 1 second para).
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claim(s) 21 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Blasenheim.
Regarding claim 21, Blasenheim a semiconductor measurement system comprising: an illumination source configured to generate an amount of illumination radiation incident on a semiconductor wafer at a measurement spot (fig. 1 element 110, para [0058]), wherein one or more critical dimension structures are fabricated on a surface of the semiconductor wafer at the measurement spot (para [0179], para [0066]); a detector configured to detect an amount of collected radiation from the semiconductor wafer in response to the incident amount of illumination radiation (fig. 1 element 119, para [0066]); “a specimen positioning system configured to position the semiconductor wafer with respect to the illumination source and the detector at a desired orientation about a first axis and a second axis, wherein the first axis and the second axis are aligned with the surface of the semiconductor wafer and the second axis is orthogonal to the first axis” (the specimen positioning system is element 200, para [0085], para [0108-0109]); and a computing system configured to: estimate the desired orientation of the semiconductor wafer with respect to the illumination source and the detector based on a location of the measurement spot on the semiconductor wafer and a local wafer orientation correction map (para [0108-0109]); and “estimate a value of a parameter of interest characterizing the one or more structures based on the amount of collected radiation detected at the measurement spot after the semiconductor wafer is positioned about the first and second axes at the desired orientation” (para [0066]; the measurement can also be performed after proper orientation of the sample).
Conclusion
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/ROBERTO FABIAN JR/ Examiner, Art Unit 2877
/Kara E. Geisel/ Supervisory Patent Examiner, Art Unit 2877