Prosecution Insights
Last updated: August 18, 2026
Application No. 18/394,399

PACKAGING ARCHITECTURE FOR PHOTONIC COMPONENTS

Non-Final OA §103
Filed
Dec 22, 2023
Examiner
SANDVIK, BENJAMIN P
Art Unit
2812
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Nokia Corporation
OA Round
1 (Non-Final)
77%
Grant Probability
Favorable
1-2
OA Rounds
0m
Est. Remaining
83%
With Interview

Examiner Intelligence

Grants 77% — above average
77%
Career Allowance Rate
890 granted / 1161 resolved
+8.7% vs TC avg
Moderate +6% lift
Without
With
+6.2%
Interview Lift
resolved cases with interview
Typical timeline
2y 8m
Avg Prosecution
31 currently pending
Career history
1183
Total Applications
across all art units

Statute-Specific Performance

§101
0.5%
-39.5% vs TC avg
§103
64.5%
+24.5% vs TC avg
§102
22.7%
-17.3% vs TC avg
§112
6.2%
-33.8% vs TC avg
Black line = Tech Center average estimate • Based on career data from 1161 resolved cases

Office Action

§103
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Election/Restrictions Applicant’s election without traverse of claims 1-13 in the reply filed on 6/1/2026 is acknowledged. Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claims 1 and 5-13 are rejected under 35 U.S.C. 103 as being unpatentable over Chang et al (U.S. Pub #2021/0096310), in view of Dong et al (U.S. Pub #2022/0155526). With respect to claim 1, Chang teaches an opto-electronic assembly, comprising: a photonic integrated circuit (PIC) (Fig. 2B, PD); a radio frequency integrated circuit (RFIC) (Fig. 2B, ED); a substrate (Fig. 2B, 300), and an interposer (Fig. 2B, 140 and/or 170), wherein the RFIC is mounted on the PIC and is electrically connected to the PIC (Paragraph 29), wherein the PIC is mounted and electrically connected (Fig. 2B, 160) to the substrate (Fig. 2B, 300) via the interposer (Fig. 2B, 140 and/or 170). Chang does not teach that the ED is an RFIC. Dong teaches that an EIC in a system with a PIC can operate at RF speeds (Paragraph 24). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to configure the ED of Chang as a RFIC as taught by Dong in order to allow high speed communication between the PD and ED (Paragraph 24). With respect to claim 5, Chang teaches that the interposer (Fig. 2B, 140 and 170) has a surface oriented toward the PIC and the substrate, the surface overlaps partly with the PIC (Fig. 2B, PD) and partly with the substrate (Fig. 2B, 300). With respect to claim 6, Chang teaches that the interposer comprises redistribution layers (RDLs) (Fig. 2B, 170) as horizontal interconnects between PIC connector pads (Fig. 2B, unlabeled pads in layers 152) and interposer connector pads (Fig. 2B, unlabeled pads on 170). With respect to claim 7, Chang teaches that each of the horizontal interconnects connects a plurality of the PIC connector pads with a plurality of substrate pads (Fig. 2B, pads of 300 connected to 180). With respect to claim 8, Chang teaches that the RDLs within the PIC (Fig. 2B, RDLs in layers 152) are used to connect the ED via the PIC connector pads to establish an electrical connection to the substrate. With respect to claim 9, Chang teaches that at least some of the horizontal interconnects on the interposer are arranged geometrically in parallel example Fig. 4A, 430). With respect to claim 10, Chang teaches that the interposer comprises at least one of the following: a single RDL comprising a plurality of electrically conductive lines; and a stack of multiple RDLs (Fig. 2B, 170), each RDL of the stack comprising a plurality of electrically conductive lines. With respect to claim 11, Chang teaches that the interposer further comprises a single or multiple isolating layers, (Fig. 2B, isolating layers of 170 and 140; Fig. 1B, 172) wherein the RDL is arranged between these isolating layers. With respect to claim 12, Chang teaches that the interposer further comprises a plurality of electrically conductive contact elements (Fig. 2B, 160), and each of the electrically conductive contact elements traverses the isolating layers. With respect to claim 13, Chang teaches that each of the electrically conductive contact (Fig. 2B, 160) elements connects one of the electrically conductive lines to one of a node on the substrate and a node on the PIC (Paragraph 41-42). Allowable Subject Matter Claims 2-4 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to BENJAMIN P SANDVIK whose telephone number is (571)272-8446. The examiner can normally be reached M-F: 10-6. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Davienne Monbleau can be reached at (571)-272-1945. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /BENJAMIN P SANDVIK/ Primary Examiner, Art Unit 2812
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Prosecution Timeline

Dec 22, 2023
Application Filed
Jul 15, 2026
Non-Final Rejection mailed — §103 (current)

Precedent Cases

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
77%
Grant Probability
83%
With Interview (+6.2%)
2y 8m (~0m remaining)
Median Time to Grant
Low
PTA Risk
Based on 1161 resolved cases by this examiner. Grant probability derived from career allowance rate.

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