DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Preliminary Amendment
The preliminary amendment filed on December 22nd, 2023 has been entered.
Information Disclosure Statement
The IDS filed on 07/12/2024 and 05/14/2025 have been considered.
Specification
The title of the invention is not descriptive. A new title is required that is clearly indicative of the invention to which the claims are directed.
The following title is suggested: Method for direct bonding of semiconductor elements.
Claim Objections
Claim 6 is objected to because of the following informalities: In claim 6, line 3, “the upper surface of the semiconductor” should be change to --the upper surface of the semiconductor substrate--. Appropriate correction is required.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 1-4, 7, 9, 11, and 12-14 is/are rejected under 35 U.S.C. 103 as being unpatentable over Kweskin (U.S. Pub. 2019/0067085) in view of Shen et al. (U.S. Pub. 2015/0357272).
In re claim 1, Kweskin discloses a method for forming a bonding layer on an upper surface (front surface) 102 of a semiconductor substrate 100, the method comprising: exposing the upper surface 102 of the semiconductor substrate 100 to products of at least one plasma containing nitrogen and oxygen (subjected to oxygen plasma treatment and nitrogen plasma treatment) to form a semiconductor-containing oxynitride layer (silicon oxynitride) on the upper surface 102 of the semiconductor substrate 100 (see paragraphs [0025], [0053], [0054] and figs. 1A-C), and direct bonding the upper surface of the semiconductor substrate 100 to a semiconductor element 500 (see paragraphs [0035], [0062] and fig. 2).
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Kweskin is silent to wherein preparing the upper surface for direct bonding to a semiconductor element, the preparing the upper surface comprising planarizing the upper surface.
However, Shen discloses in a same field of endeavor, a method for forming a bonding layer 26 on an upper surface of a semiconductor substrate 10, including, inter-alia, preparing the upper surface for direct bonding to a semiconductor element 28, the preparing the upper surface comprising planarizing (via a chemical mechanical polishing (CMP) technique) the upper surface (see paragraph [0057] and figs. 6-8).
Therefore, it is respectfully submitted that it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to be motivated to incorporate the technique as taught by Shen into the method for forming a bonding layer on the upper surface of the semiconductor substrate of Kweskin in order to enable the preparing the upper surface for direct bonding to a semiconductor element, the preparing the upper surface comprising planarizing the upper surface in Kweskin to be performed in order to enhance adhesion between the semiconductor substrate and the semiconductor element and furthermore a thinner 2D IC package can be obtain. Furthermore, it would have been obvious because all the claimed elements were known in the prior art and one skilled in the art could have combined the elements as claimed by known methods with no change in their respective functions, and the combination would have yielded predictable results to one of ordinary skill in the art at the time of the invention. KSR International Co. v. Teleflex Inc. (KSR), 550 U.S. 398 (2007). “If a technique has been used to improve one device, and a person of ordinary skill in the art would recognize that it would improve similar devices in the same way, using the technique is obvious unless its actual application is beyond that person’s skill.” Id.
In re claim 2, as applied to claim 1 above, Kweskin in combination with Shen discloses wherein the semiconductor substrate comprises bare silicon (see paragraph [0025] of Kweskin).
In re claim 3, as applied to claim 1 above, Kweskin in combination with Shen discloses wherein the semiconductor-containing oxynitride layer comprises silicon oxynitride (see paragraph [0053] of Kweskin).
In re claim 4, as applied to claim 1 above, Kweskin in combination with Shen discloses wherein exposing the upper surface of the semiconductor substrate to products of at least one plasma comprises exposing the upper surface of the semiconductor substrate to products of a remote plasma system (see paragraph [0054] of Kweskin).
In re claim 7, as applied to claim 1 above, Kweskin discloses wherein exposing the upper surface of the semiconductor substrate to products of at least one plasma comprises performing the plasma process at a temperature in the range of 20° C-400° C (see paragraph [0057]) but is silent to wherein exposing the upper surface of the semiconductor substrate to products of at least one plasma comprises performing the plasma process at a temperature in the range of 100° C-300° C.
Although, Kweskin teaches that the temperature range is broader than that of Applicant’s temperature range, it is respectfully submitted that it would have been obvious to one of ordinary skill in the art to optimize the temperature range for exposing the upper surface of the semiconductor substrate to products of at least one plasma to be in a range of 100° C-300° C since it is respectfully submitted that there is no evidence indicating the temperature ranges for exposing the upper surface of the semiconductor to products of at least one plasma is critical and it has been held that it is not inventive to discover the optimum or workable temperature ranges of a result-effective variable within given prior art conditions by routine experimentation. See MPEP § 2144.05. See In re Woodruff, 919 F.2d 1575, 1578, 16 USPQ2d 1934, 1936 (Fed. Cir. 1990); In re Rose, 220 F.2d 459, 105 USPQ 237 (CCPA 1955); In re Rinehart, 531 F.2d 1048, 189 USPQ 143 (CCPA 1976); Gardner v. TEC Systems, Inc., 725 F.2d 1338, 220 USPQ 777 (Fed. Cir. 1984), cert. denied, 469 U.S. 830, 225 USPQ 232 (1984); In re Dailey, 357 F.2d 669, 149 USPQ 47 (CCPA 1966); In re Aller, 220 F.2d 454, 456, 105 USPQ 233,235 (CCPA 1955).
In re claim 9, as applied to claim 1 above, Kweskin discloses wherein exposing the upper surface of the semiconductor substrate to products of at least one plasma comprises performing the plasma process at a pressure in the range of 0.1-1 Torr (see paragraph [0057]) but is silent to wherein exposing the upper surface of the semiconductor substrate to products of at least one plasma comprises performing the plasma process at a pressure in the range of 0.5-2 Torr.
Although, Kweskin discloses that the pressure range is overlapping to that of Applicant’s range, it is respectfully submitted that it would have been obvious to one of ordinary skill in the art to optimize the pressure range during the exposing of the upper surface of the semiconductor to products of at least one plasma to be in a range of about 0.5-2 Torr since it is respectfully submitted that there is no evidence indicating the pressure range during exposing the upper surface of the semiconductor to products of at least one plasma is critical and it has been held that it is not inventive to discover the optimum or workable pressure ranges of a result-effective variable within given prior art conditions by routine experimentation. See MPEP § 2144.05. See In re Woodruff, 919 F.2d 1575, 1578, 16 USPQ2d 1934, 1936 (Fed. Cir. 1990); In re Rose, 220 F.2d 459, 105 USPQ 237 (CCPA 1955); In re Rinehart, 531 F.2d 1048, 189 USPQ 143 (CCPA 1976); Gardner v. TEC Systems, Inc., 725 F.2d 1338, 220 USPQ 777 (Fed. Cir. 1984), cert. denied, 469 U.S. 830, 225 USPQ 232 (1984); In re Dailey, 357 F.2d 669, 149 USPQ 47 (CCPA 1966); In re Aller, 220 F.2d 454, 456, 105 USPQ 233,235 (CCPA 1955).
In re claim 11, Kweskin in combination with Shen discloses a method for forming a bonded structure, comprising: direct bonding the semiconductor-containing bonding layer 200 formed on the semiconductor substrate 100 according to the method of claim 1 to a second semiconductor element 500 (see paragraphs [0053], [0062] and fig. 2 of Kweskin).
In re claim 12, as applied to claim 11 above, Kweskin in combination with Shen discloses wherein the semiconductor substrate 100 comprises silicon, wherein a second semiconductor substrate 500 of the second semiconductor element comprises silicon, and wherein direct bonding the semiconductor-containing bonding layer 200 to the second semiconductor element 500 comprises direct bonding the semiconductor-containing bonding layer 200 to the second semiconductor substrate 500 (see paragraphs [0035], [0062] and fig. 2 of Kweskin).
In re claim 13, as applied to claim 11 above, Kweskin in combination with Shen discloses wherein the method further comprising: forming a dielectric bonding layer (300,400) over the second semiconductor substrate 500 of the second semiconductor element; and wherein direct bonding the semiconductor-containing bonding layer 200 to the second semiconductor element 500 comprises direct bonding the semiconductor-containing bonding layer 200 to the dielectric bonding layer (300,400) (see paragraphs [0035], [0062] and fig. 2 of Kweskin).
In re claim 14, as applied to claim 11 above, Kweskin in combination with Shen discloses wherein the method further comprising: forming a second semiconductor-containing bonding layer (300,400) over the second semiconductor substrate 500 of the second semiconductor element by exposing an upper surface of the second semiconductor substrate to products of at least one plasma containing nitrogen and oxygen (see paragraph [0053] of Kweskin); and wherein direct bonding the semiconductor-containing bonding layer 200 to the second semiconductor element comprises direct bonding the semiconductor-containing bonding layer 200 to the second semiconductor-containing bonding layer (300,400) (see paragraphs [0035], [0053], [0062] and figs. 1A-C and 2 of Kweskin).
Claim(s) 15, 16, and 19-24 is/are rejected under 35 U.S.C. 103 as being unpatentable over Kweskin (U.S. Pub. 2019/0067085).
In re claim 15, Kweskin discloses a method for forming a bonded structure, comprising: providing a first semiconductor element having a base substrate layer 100 comprising a semiconductor material (see paragraph [0025] and figs. 1A-C); forming a first bonding layer 120 comprising a semiconductor-containing oxynitride material (silicon oxynitride) over the base substrate layer 100 (see paragraph [0053] and fig. 1B), the first bonding layer having a thickness in the range of between about 10 nm and about 10,000 nm (see paragraph [0038]), the first bonding layer 120 having a first bonding surface (see paragraph [0053] and figs. 1B-C); providing a second semiconductor element 500 having a second bonding surface; and directly bonding the first bonding surface of the first semiconductor element 100 to the second bonding surface of the second semiconductor element 500 (see paragraphs [0035], [0062] and fig. 2).
Kweskin is silent to wherein the first bonding layer having a thickness in the range of 0.5 nm-10 nm.
However, although Kweskin discloses that the thickness range of the first bonding layer as shown above to be broader than Applicant’s thickness range, it is respectfully submitted that it would have been obvious to one of ordinary skill in the art to optimize the thickness range of the first bonding layer to be in a range of 0.5 nm-10 nm during routine experimentation since it is respectfully submitted that there is no evidence indicating the thickness range of the first bonding layer is critical and it has been held that it is not inventive to discover the optimum or workable pressure ranges of a result-effective variable within given prior art conditions by routine experimentation. See MPEP § 2144.05. See In re Woodruff, 919 F.2d 1575, 1578, 16 USPQ2d 1934, 1936 (Fed. Cir. 1990); In re Rose, 220 F.2d 459, 105 USPQ 237 (CCPA 1955); In re Rinehart, 531 F.2d 1048, 189 USPQ 143 (CCPA 1976); Gardner v. TEC Systems, Inc., 725 F.2d 1338, 220 USPQ 777 (Fed. Cir. 1984), cert. denied, 469 U.S. 830, 225 USPQ 232 (1984); In re Dailey, 357 F.2d 669, 149 USPQ 47 (CCPA 1966); In re Aller, 220 F.2d 454, 456, 105 USPQ 233,235 (CCPA 1955).
In re claim 16, as applied to claim 15 above, Kweskin discloses wherein forming the first bonding layer comprises exposing an upper surface of the first semiconductor element 100 to a nitrogen and oxygen containing plasma (subjected to oxygen plasma treatment and nitrogen plasma treatment) (see paragraph [0053] and figs. 1B-C).
In re claim 19, as applied to claim 15 above, Kweskin discloses wherein the method further comprising forming a second bonding layer 400 over a base substrate layer of the second semiconductor element 500, the base substrate layer of the second semiconductor element comprising a semiconductor material (see paragraphs [0035], [0062] and fig. 2).
In re claim 20, as applied to claim 19 above, Kweskin discloses wherein the second bonding layer comprises semiconductor-containing oxynitride material (see paragraphs [0035], [0037], [0053], note that, the dielectric layer comprises one or more insulating material selected from the group consisting of silicon dioxide, silicon nitride, silicon oxynitride, or any combination thereof). Therefore, it is respectfully submitted that that it would have been obvious to one of ordinary skill in the art to select silicon oxynitride to be the material for the second bonding layer since it has been held to be within the general skill of a worker in the art to select a known material on the basis of it suitability for the intended use as a matter of obvious design choice. In re Leshin, 125 USPQ 416.
In re claim 21, as applied to claim 19, Kweskin discloses wherein the second bonding layer comprises dielectric material (see paragraphs [0035], [0037], [0053]).
In re claim 22, as applied to claim 21 above, Kweskin discloses wherein the dielectric material is an oxide material (see paragraph [0037]).
In re claims 23 and 24, as applied to claim 15 above, Kweskin discloses wherein the method further comprising annealing the bonded structure at a temperature in a range of about 300° C-700° C for a duration of about 0.5 hours to about 10 hours (see paragraph [0070) but is silent to wherein the method further comprising: annealing the bonded structure at a temperature in the range of 100° C-300° C for a duration of 10 minutes to 1 hour and wherein the annealing the bonded structure comprises a temperature in the range of 150° C-250° C for a duration of 15 minutes to 30 minutes.
However, it is respectfully submitted that it would have been obvious to one of ordinary skill in the art to optimize the annealing temperature range and the time duration range to be in the range of 100° C-300° C for a duration of 10 minutes to 1 hour and to a temperature in the range of 150° C-250° C for a duration of 15 minutes to 30 minutes during routine experimentation since it is respectfully submitted that there is no evidence indicating the annealing temperature range and time duration for the bonded structure is critical and it has been held that it is not inventive to discover the optimum or workable temperature ranges and time duration ranges of a result-effective variable within given prior art conditions by routine experimentation. See MPEP § 2144.05. See In re Woodruff, 919 F.2d 1575, 1578, 16 USPQ2d 1934, 1936 (Fed. Cir. 1990); In re Rose, 220 F.2d 459, 105 USPQ 237 (CCPA 1955); In re Rinehart, 531 F.2d 1048, 189 USPQ 143 (CCPA 1976); Gardner v. TEC Systems, Inc., 725 F.2d 1338, 220 USPQ 777 (Fed. Cir. 1984), cert. denied, 469 U.S. 830, 225 USPQ 232 (1984); In re Dailey, 357 F.2d 669, 149 USPQ 47 (CCPA 1966); In re Aller, 220 F.2d 454, 456, 105 USPQ 233,235 (CCPA 1955).
Claim(s) 5 is/are rejected under 35 U.S.C. 103 as being unpatentable over Kweskin (U.S. Pub. 2019/0067085) in view of Shen et al. (U.S. Pub. 2015/0357272), as applied to claim 1 above and further in view of Turner et al. (U.S. Pub. 2023/0352284).
In re claim 5, as applied to claim 1 above, Kweskin and Shen are silent to wherein exposing the upper surface of the semiconductor substrate to products of at least one plasma comprises exposing the upper surface of the semiconductor substrate to products of an in situ plasma system.
However, Turner discloses wherein exposing the upper surface of the semiconductor substrate to products of at least one plasma comprises exposing the upper surface of the semiconductor substrate to products of an in situ plasma system (see paragraph [0053]).
Therefore, it is respectfully submitted that it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to be motivated to incorporate the technique as taught by Turner into the method for forming a bonding layer on an upper surface of a semiconductor substrate of Kweskin to be performed because in doing so several processes for plasma processing are carried out in sequence without exposing the semiconductor substrate to air between the processes (see paragraph [0053] of Turner).
Claim(s) 6 and 10 is/are rejected under 35 U.S.C. 103 as being unpatentable over Kweskin (U.S. Pub. 2019/0067085) in view of Shen et al. (U.S. Pub. 2015/0357272), as applied to claim 1 above and further in view of Varadarajan et al. (U.S. Pub. 2018/0315597).
In re claims 6 and 10, as applied to claim 1 above, Kweskin and Shen are silent to wherein exposing the upper surface of the semiconductor substrate to products of at least one plasma comprises flowing the products of a plasma containing nitrogen and/or oxygen over the upper surface of the semiconductor at a flow rate of about 50 sccm to 200 sccm nitrogen and/or about 10 sccm to 50 sccm oxygen, wherein when the plasma contains both nitrogen and oxygen a ratio of nitrogen flow rate to oxygen flow rate ranges from 1:1 to 10:1 and wherein exposing the upper surface of the semiconductor substrate to products of at least one plasma comprises performing the plasma process at a cyclic electrical power in the range of 50 W-200 W and at a cyclic frequency in the range of 40 KHz-1 MHz.
However, Varadarajan discloses wherein exposing the upper surface of the semiconductor substrate to products of at least one plasma comprises flowing the products of a plasma containing oxygen over the upper surface of the semiconductor at a flow rate of about 5 sccm to 20 sccm oxygen and wherein exposing the upper surface of the semiconductor substrate to products of at least one plasma comprises performing the plasma process at a cyclic electrical power in the range of 3kW and at a cyclic frequency in the range of 2.45-13.56 MHz (see paragraph [0039]).
Therefore, it is respectfully submitted that it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to be motivated to incorporate the technique as taught by Varadarajan into the method for forming a bonding layer on an upper surface of a semiconductor substrate of Kweskin in order to enable wherein exposing the upper surface of the semiconductor substrate to products of at least one plasma comprises flowing the products of a plasma containing oxygen over the upper surface of the semiconductor at a flow rate of about 5 sccm to 20 sccm oxygen and wherein exposing the upper surface of the semiconductor substrate to products of at least one plasma comprises performing the plasma process at a cyclic electrical power in the range of 3kW and at a cyclic frequency in the range of 2.45-13.56 MHz in Kweskin to be performed. Furthermore, it is respectfully submitted that it would have been obvious to one of skill in the art to optimize during routine experimentation the flow rate of nitride and oxygen to be at a flow rate of about 50 sccm to 200 sccm nitrogen to be about 10 sccm to 50 sccm oxygen, wherein when the plasma contains both nitrogen and oxygen, to optimize a ratio of nitrogen flow rate to oxygen flow rate ranges from 1:1 to 10:1 and to optimize a cyclic electrical power to be in the range of 50 W-200 W and to optimize a cyclic frequency to be in the range of 40 KHz-1 MHz because it is respectfully submitted that there is no evidence indicating the flow rate of nitrogen, the flow rate of oxygen, the ratio of nitrogen flow rate to the oxygen flow rate, the cyclic electrical power range, and the cyclic frequency range is critical and it has been held that it is not inventive to discover the optimum or workable ranges of a result-effective variable within given prior art conditions by routine experimentation. See MPEP § 2144.05. See In re Woodruff, 919 F.2d 1575, 1578, 16 USPQ2d 1934, 1936 (Fed. Cir. 1990); In re Rose, 220 F.2d 459, 105 USPQ 237 (CCPA 1955); In re Rinehart, 531 F.2d 1048, 189 USPQ 143 (CCPA 1976); Gardner v. TEC Systems, Inc., 725 F.2d 1338, 220 USPQ 777 (Fed. Cir. 1984), cert. denied, 469 U.S. 830, 225 USPQ 232 (1984); In re Dailey, 357 F.2d 669, 149 USPQ 47 (CCPA 1966); In re Aller, 220 F.2d 454, 456, 105 USPQ 233,235 (CCPA 1955).
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure.
Olsen (U.S. Pub. 2008/0032510) discloses a method of forming a layer comprising silicon and nitrogen on a substrate comprises introducing a substrate comprising silicon into a chamber and then exposing the substrate in the chamber to a plasma of nitrogen.
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