DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Election/Restrictions
Applicant’s election without traverse of Species A and sub-species A1 in the reply filed on July 05, 2026 is acknowledged. The elected Species A and sub-species A1 read on Claims 1-3, 7-13 and 15-17. Claims 4-6, 14 and 18-20 are canceled, and Claims 21-27 are added. Claims 1-3, 7-13, 15-17 and 21-27 are currently pending.
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(B) CONCLUSION. - The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claim 21 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
Claim 21, lines 3 recites “separating the second collector from the second collector the fourth base”. There is insufficient antecedent basis for these limitations in the claim 21 because it is not clear that if the limitation reads “second collector is separated from the second collector” which should be “separating the second collector from the fourth base”. Therefore, it is unclear and the scope of the claim is unclear.
Appropriate correction is required.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
Claims 8-10 are rejected under 35 U.S.C. 102(a)(2) as being anticipated by KIM, Joo Hyung (US 20170309620 A1) “KIM et al.”.
Regarding Independent Claim 8, KIM et al. Figs. 1-8 discloses, a semiconductor device (“a bipolar junction transistor 200” ¶ [0045]) comprising:
a first doped region 230 (“emitter regions 230” ¶ [0045]);
a second doped region 240 (“base regions 240” ¶ [0045]) encircling the first doped region 230;
a third doped region (“collector region 250” ¶ [0045]) encircling the first doped region 230 and the second doped region 240, and
separated from the first doped region 230 by the second doped region 240 (Fig. 4 shows 250 is separated from 230 by 240);
a fourth doped region 242 encircling the first doped region, the second doped region and the third doped region (“second base region 242 formed to surround the collector region 250 within the plane” ¶ [0054]); and
a fifth doped region 260 encircling the first doped region, the second doped region, the third doped region and the fourth doped region (“a second well region 260 formed to surround the second base region 242” ¶ [0059]),
wherein the first doped region 230, the third doped region 250 and the fifth doped region 260 have a first doping type (“the plurality of emitter regions 230 and the collector region 250 may have a first conductivity type” ¶ [0046]; “a third p-type impurity region used as the second well region 260” ¶ [0059]), and the second doped region 240 and the fourth doped region 242 have a second doping type complementary to the first doping type (“a plurality of first n-type impurity regions used as the first base regions 240” ¶ [0046]; “a second n-type impurity region used as the second base region 242” ¶ [0056]).
Regarding Claim 9, KIM et al. discloses the semiconductor device of Claim 8. KIM et Figs. 1-8 further discloses, wherein a doping concentration of the first doped region 230, a doping concentration of the third doped region 250 and a doping concentration of the fifth doped region 260 are substantially equal (“the emitter regions, the collector region, and the second well region may be formed simultaneously.” ¶ [0027]; As 230, 250 and 260 are formed simultaneously with the same doping type, the concentrations of these layers are equal;).
Regarding Claim 10, KIM et al. discloses the semiconductor device of Claim 8. KIM et Figs. 1-8 further discloses, wherein a doping concentration of the second doped region 240 and a doping concentration of the fourth doped region 242 are substantially equal (“the second base region 242 may have the second conductivity type, and the second base region 242 may be formed with the first base region 240.” ¶ [0072]; As 240 and 242 are formed simultaneously with the same doping type, the concentrations of these layers are equal).
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed
invention is not identically disclosed as set forth in section 102, if the differences between the
claimed invention and the prior art are such that the claimed invention as a whole would have
been obvious before the effective filing date of the claimed invention to a person having
ordinary skill in the art to which the claimed invention pertains. Patentability shall not be
negated by the manner in which the invention was made.
Claims 1-2, 11, 13 and 15-17 are rejected under 35 U.S.C. 103 as being unpatentable over KIM, Joo Hyung (US 20170309620 A1) “KIM et al.” in view of Gupta; Sandhya (US 6747294 B1) “Gupta et al.”.
Regarding Independent Claim 1, KIM et al. Figs. 1-8 discloses, a semiconductor device (“a bipolar junction transistor 100” ¶ [0042]) comprising;
an emitter 130 (“an emitter region 130” ¶ [0042]);
a first base 140 (“, a ring-shaped base region 140” ¶ [0042]) encircling the emitter 230;
a first collector 150 (“a ring-shaped collector region 150” ¶ [0042]) encircling the emitter 130 and the first base 140, wherein the first collector 150 is separated from the emitter 130 by the first base 140 (Fig. 2 shows 150 is separated from 130 by 140);
a second base 142 encircling the emitter 130, the first base 140 and the first collector 150 (“a ring-shaped second base region 142 configured to at least partially surround the collector region 150, and the base region 140 and the second base region 142” ¶ [0042]); and
a doped region 160 encircling the second base 142, and separated from the emitter 130, the first base 140 and the first collector 150 by the second base 142,
wherein the emitter 130, the first base 140, the first collector 150, the second base 142 and second collector 160 form a concentric pattern (Fig. 2 shows the concentric pattern).
However, KIM et al. does not disclose, a second doped region is a collector.
In the similar field of endeavor of bipolar integrated circuits, Gupta et al. Figs. 1-2 discloses, second doped region is a collector (“central guard ring 10 acts as a minority carrier collector” Column 6, Line 51).
It would have been obvious to person having ordinary skill in the art before the effective filling date to modify the second well region of KIM et al. with the second collector of Gupta et al. in order to isolate a device that causes parasitic current (i.e., acting as an emitter of a parasitic junction transistor) or to isolate a device that is particularly susceptible to the influence of parasitic current caused by a nearby device (i.e., acting as a collector of a parasitic junction transistor), although it is typically more effective to do the former because a single inducing device may affect several other devices. The guard ring may be deployed in a lateral direction to reduce lateral parasitic current, or deployed in a vertical direction to reduce vertical parasitic current. Illustrations in the present description, however, assume lateral deployment, which is the most probable case when the guard ring is used to surround a laterally diffused MOS (LDMOS) power device (Gupta et al., Column 4, Lines 6-19).
Regarding Claim 2, KIM et al. as modified by Gupta et al. the limitations of claim 1. KIM et al. Fig. 2, further discloses, wherein the emitter 130, the first base 140, the first collector 150, the second base 142, and the second collector 160 form a point symmetric pattern about a center in the emitter 130.
Regarding Claim 11, KIM et al. discloses the semiconductor device of Claim 8. However, KIM et Figs. 1-8 does not disclose:
a first well under the first doped region;
a second well encircling and separated from the first well;
a third well under the third doped region;
a fourth well encircling the first well, the second well and the third well; and
a fifth well under the fifth doped region,
wherein the first well, the third well and the fifth well have the first doping type, and the second well and the fourth well have the second doping type.
In the similar field of endeavor of bipolar integrated circuits, Gupta et al. Figs. 1-10 discloses, a first well under the first doped region (“Devices 6 and 8 are formed in N-type tubs 7 and 9 respectively” Column 5, Lines 28-29);
a second well encircling and separated from the first well (“Flanking rings 12 and 14 are each formed by a P-type tub” Column 5, Lines 16-17);
a third well under the third doped region (“N+ implant 26 is placed in central guard ring (N-type tub) 10” Column 5, Lines 21-22);
a fourth well encircling the first well, the second well and the third well (“P+ implants 28 …. 14 (P-type tubs)” Column 5, Lines 22-23); and
a fifth well under the fifth doped region (“two laterally spaced central guard rings ….104” Column 11, Lines 6-7; “” Column 6, Lines 4-5),
wherein the first well, the third well and the fifth well have the first doping type (Above mapping discloses the first well, the third well and the fifth well have N-type doping), and the second well and the fourth well have the second doping type (Above mapping discloses the second well, and the fourth well have P-type doping).
It would have been obvious to person having ordinary skill in the art before the effective filling date to modify the second well region of KIM et al. with the doped wells of Gupta et al. in order to isolate a device that causes parasitic current (i.e., acting as an emitter of a parasitic junction transistor) or to isolate a device that is particularly susceptible to the influence of parasitic current caused by a nearby device (i.e., acting as a collector of a parasitic junction transistor), although it is typically more effective to do the former because a single inducing device may affect several other devices. The guard ring may be deployed in a lateral direction to reduce lateral parasitic current, or deployed in a vertical direction to reduce vertical parasitic current. Illustrations in the present description, however, assume lateral deployment, which is the most probable case when the guard ring is used to surround a laterally diffused MOS (LDMOS) power device (Gupta et al., Column 4, Lines 6-19).
Regarding Claim 13, KIM et al. as modified by Gupta et al. the limitations of claim 11. However, KIM et al. does not disclose, further comprising: a first deep well under the first well;
a second deep well under a portion of the second well; and
a third deep well under the fourth doped region,
wherein the first deep well has the first doping type, and the second deep well and the third deep well have the second doping type.
In the similar field of endeavor of bipolar integrated circuits, Gupta et al. Figs. 1-10 discloses, a first deep well (respective buried layer 38” Column 5, Lines 31) under the first well (“Devices 6 and 8 are formed in N-type tubs 7 and 9 respectively. N-type tubs 7 and 9 each include a respective buried layer 38 and 39” Column 5, Lines 29-31);
a second deep well (“P-type buried layers 34” Column 5, Lines 27-28) under a portion of the second well; and
a third deep well (“P-type buried layers 36” Column 5, Lines 27-28) under the fourth doped region,
wherein the first deep well has the first doping type (38 is N-type), and the second deep well and the third deep well have the second doping type (34 and 36 are P-Type).
It would have been obvious to person having ordinary skill in the art before the effective filling date to modify the second well region of KIM et al. with the doped wells of Gupta et al. in order to isolate a device that causes parasitic current (i.e., acting as an emitter of a parasitic junction transistor) or to isolate a device that is particularly susceptible to the influence of parasitic current caused by a nearby device (i.e., acting as a collector of a parasitic junction transistor), although it is typically more effective to do the former because a single inducing device may affect several other devices. The guard ring may be deployed in a lateral direction to reduce lateral parasitic current, or deployed in a vertical direction to reduce vertical parasitic current. Illustrations in the present description, however, assume lateral deployment, which is the most probable case when the guard ring is used to surround a laterally diffused MOS (LDMOS) power device (Gupta et al., Column 4, Lines 6-19).
Regarding Independent Claim 15, KIM et al. Figs. 1-8 discloses, semiconductor device (“a bipolar junction transistor 100” ¶ [0042]) comprising:
a first collector (left 160 in Fig. 1) and a second collector (right 160 in Fig. 1) separated from each other;
a third collector (left 150 in Fig. 1) and a fourth collector (right 150 in Fig. 1) disposed between the first collector and the second collector, and separated from each other; and
an emitter 130 (“emitter regions 130” ¶ [0042]) disposed between and separated from the third collector (left 150 in Fig. 1) and the fourth collector (right 150 in Fig. 1);
wherein the first collector and the second collector are coupled to each other, and the third collector and the fourth collector are coupled to each other (Fig. 2 shows the collectors are encircled and connected), and
wherein a distance between the first collector (left 160 in Fig. 1) and the emitter 130 is equal to a distance between the second collector (right 160 in Fig. 1) and the emitter 130, and a distance between the third collector (left 150 in Fig. 1) and the emitter 130 is equal to a distance between the fourth collector (right 150 in Fig. 1) and the emitter 130 (Figs. 1-2 show that the emitter 130, the first base 140, the first collector 150, the second base 142 and second collector 160 form a concentric pattern, therefore a distance between the first collector and the emitter is equal to a distance between the second collector and the emitter, and a distance between the third collector and the emitter is equal to a distance between the fourth collector and the emitter).
However, KIM et al. does not disclose, second doped region 160 is a collector.
In the similar field of endeavor of bipolar integrated circuits, Gupta et al. Figs. 1-2 discloses, second doped regions are collector (“guard ring 10 acts as a minority carrier collector” Column 6, Line 51).
It would have been obvious to person having ordinary skill in the art before the effective filling date to modify the second well region of KIM et al. with the second collector of Gupta et al. in order to isolate a device that causes parasitic current (i.e., acting as an emitter of a parasitic junction transistor) or to isolate a device that is particularly susceptible to the influence of parasitic current caused by a nearby device (i.e., acting as a collector of a parasitic junction transistor), although it is typically more effective to do the former because a single inducing device may affect several other devices. The guard ring may be deployed in a lateral direction to reduce lateral parasitic current, or deployed in a vertical direction to reduce vertical parasitic current. Illustrations in the present description, however, assume lateral deployment, which is the most probable case when the guard ring is used to surround a laterally diffused MOS (LDMOS) power device (Gupta et al., Column 4, Lines 6-19).
Regarding Claim 16, KIM et al. discloses the semiconductor device of Claim 15. KIM et Figs. 1-8 further discloses, wherein the first collector, the second collector, the third collector, the fourth collector and the emitter comprise a same doping type (“the first p-type impurity regions used as the emitter regions 230, respectively. Further, a second p-type impurity region used as the collector region 250” ¶ [0046]; “a third p-type impurity region used as the second well region 260” ¶ [0059]).
Regarding Claim 17, KIM et al. discloses the semiconductor device of Claim 15. KIM et Figs. 1-8 further discloses, further comprising
a first base (left 142 in Fig. 1) between the first collector (left 160 in Fig. 1) and the third collector (left 150 in Fig. 1);
a second base (left 140 in Fig. 1) between the third collector (left 150 in Fig. 1) and the emitter 130;
a third base (right 140 in Fig. 1) between the emitter 130 and the fourth collector (right 150 in Fig. 1); and
a fourth base (right 142 in Fig. 1) between the fourth collector (right 150 in Fig. 1) and the second collector (right 160 in Fig. 1).
Claims 3, 7, 12, 21 and 24-27 are rejected under 35 U.S.C. 103 as being unpatentable over KIM, Joo Hyung (US 20170309620 A1) “KIM et al.” in view of Gupta; Sandhya (US 6747294 B1) “Gupta et al.” further in view of Chung, Tao Wen (US 20100301453 A1) “Chung et al.”.
Regarding Claim 3, KIM et al. as modified by Gupta et al. the limitations of claim 1. However, KIM et al. does not disclose, further comprising an undoped region encircling the emitter, wherein the undoped region is disposed between the emitter and the first base.
In the similar field of endeavor of bipolar integrated circuits, Chung et al. Figs. 1A-1B discloses, further comprising an undoped region encircling the emitter, wherein the undoped region is disposed between the emitter and the first base (“Shallow trench isolation (STI) regions laterally space collector C apart from base contact B, and space emitter E apart from base contact B,” ¶ [0003]).
It would have been obvious to person having ordinary skill in the art before the effective filling date to modify the second well region of KIM et al. with the STI of Chung et al. so that the lateral electron-injection path is long. Accordingly, the lateral electron-injection effect is weak, and the current gain of the BJT is mainly contributed to by the vertical electron-injection path (Chung et al., ¶ [0004]).
Regarding Claim 7, KIM et al. as modified by Gupta et al. the limitations of claim 1. KIM et al. Figs. 5-8 further discloses, in an embodiment, first device isolation region 270, second device isolation region 272, third device isolation region 274, and fourth device isolation region 276 may be formed at surface portions of the substrate 210. The first device isolation region 270, second device isolation region 272, third device isolation region 274, and fourth device isolation region 276 may be used to electrically isolate emitter contacts regions 232, a collector contact region 252, a base contact region 244, and a well contact region 262 from one another. For example, a plurality of first device isolation regions 270, a second device isolation region 272 surrounding the first device isolation regions 270, a third device isolation region 274 surrounding the second device isolation region 272, and a fourth device isolation region 276 surrounding the third device isolation region 274 may be formed at the surface portions of the substrate 210. The first device isolation regions 270 may have a ring shape and may be arranged in a matrix form. (¶ [0066])
However, KIM et al., does not disclose, further comprising: a first ring-shaped isolation encircling the emitter and separating the first base from the emitter;
a second ring-shaped isolation encircling the first ring-shaped isolation and covering a portion of the first base;
a third ring-shaped isolation encircling the first ring-shaped isolation, the second ring-shaped isolation and the first collector;
a fourth ring-shaped isolation encircling the first ring-shaped isolation, the second ring-shaped isolation and the third ring-shaped isolation, and covering a portion of the second base; and
a fifth ring-shaped isolation encircling the first ring-shaped isolation, the second ring-shaped isolation, the third ring-shaped isolation, the fourth ring-shaped isolation, and the second collector.
In the similar field of endeavor of bipolar integrated circuits, Chung et al. Figs. 1A-1B discloses, a first ring-shaped isolation encircling the emitter and separating (“Shallow trench isolation (STI) regions laterally space collector C apart from base contact B, and space emitter E apart from base contact B,” ¶ [0003]) the first base from the emitter (“Each emitter unit cell includes emitter E, and an insulation region encircling emitter E” ¶ [0016);
a second ring-shaped isolation encircling the first ring-shaped isolation and covering a portion of the first base (“each base unit cell includes base contact B, and an insulation region, which may be a shallow trench isolation (STI) region, encircling base contact B” ¶ [0016]);
a third ring-shaped isolation encircling the first ring-shaped isolation, the second ring-shaped isolation and the first collector (“collector unit cells may also include insulation regions, similar to the emitter unit cells and the base unit cells.” ¶ [0016]);
a fourth ring-shaped isolation encircling the first ring-shaped isolation, the second ring-shaped isolation and the third ring-shaped isolation, and covering a portion of the second base (“each base unit cell includes base contact B, and an insulation region, which may be a shallow trench isolation (STI) region, encircling base contact B” ¶ [0016]); and
a fifth ring-shaped isolation encircling the first ring-shaped isolation, the second ring-shaped isolation, the third ring-shaped isolation, the fourth ring-shaped isolation, and the second collector (“collector unit cells may also include insulation regions, similar to the emitter unit cells and the base unit cells.” ¶ [0016]).
It would have been obvious to person having ordinary skill in the art before the effective filling date to modify the second well region of KIM et al. with the STI of Chung et al. so that the lateral electron-injection path is long. Accordingly, the lateral electron-injection effect is weak, and the current gain of the BJT is mainly contributed to by the vertical electron-injection path (Chung et al., ¶ [0004]).
Regarding Claim 12, KIM et al. as modified by Gupta et al. the limitations of claim 11. KIM et al. Fig. 1-8, further discloses, in an embodiment, first device isolation region 270, second device isolation region 272, third device isolation region 274, and fourth device isolation region 276 may be formed at surface portions of the substrate 210. The first device isolation region 270, second device isolation region 272, third device isolation region 274, and fourth device isolation region 276 may be used to electrically isolate emitter contacts regions 232, a collector contact region 252, a base contact region 244, and a well contact region 262 from one another. For example, a plurality of first device isolation regions 270, a second device isolation region 272 surrounding the first device isolation regions 270, a third device isolation region 274 surrounding the second device isolation region 272, and a fourth device isolation region 276 surrounding the third device isolation region 274 may be formed at the surface portions of the substrate 210. The first device isolation regions 270 may have a ring shape and may be arranged in a matrix form. (¶ [0066]).
However, KIM et al. does not disclose, further comprising:
a first ring-shaped isolation encircling the first doped region and the first well (“Shallow trench isolation (STI) regions laterally space collector C apart from base contact B, and space emitter E apart from base contact B,” ¶ [0003]; “Each emitter unit cell includes emitter E, and an insulation region encircling emitter E” ¶ [0016);
a second ring-shaped isolation encircling the second doped region and covering a portion of the second well (“each base unit cell includes base contact B, and an insulation region, which may be a shallow trench isolation (STI) region, encircling base contact B” ¶ [0016]);
a third ring-shaped isolation encircling the first ring-shaped isolation, the second ring-shaped isolation, the third doped region and the third well (“collector unit cells may also include insulation regions, similar to the emitter unit cells and the base unit cells.” ¶ [0016]);
a fourth ring-shaped isolation encircling the first ring-shaped isolation, the second ring-shaped isolation, and the third ring-shaped isolation, and covering the fourth well (“each base unit cell includes base contact B, and an insulation region, which may be a shallow trench isolation (STI) region, encircling base contact B” ¶ [0016]); and
a fifth ring-shaped isolation encircling the first ring-shaped isolation, the second ring-shaped isolation, the third ring-shaped isolation, the fourth ring-shaped isolation, the fifth doped region, and the fifth well (“collector unit cells may also include insulation regions, similar to the emitter unit cells and the base unit cells.” ¶ [0016]).
It would have been obvious to person having ordinary skill in the art before the effective filling date to modify the second well region of KIM et al. with the STI of Chung et al. so that the lateral electron-injection path is long. Accordingly, the lateral electron-injection effect is weak, and the current gain of the BJT is mainly contributed to by the vertical electron-injection path (Chung et al., ¶ [0004]).
Regarding Claim 21, KIM et al. discloses the semiconductor device of Claim 17. KIM et Figs. 1-8 further discloses, further comprising: in an embodiment, first device isolation region 270, second device isolation region 272, third device isolation region 274, and fourth device isolation region 276 may be formed at surface portions of the substrate 210. The first device isolation region 270, second device isolation region 272, third device isolation region 274, and fourth device isolation region 276 may be used to electrically isolate emitter contacts regions 232, a collector contact region 252, a base contact region 244, and a well contact region 262 from one another. For example, a plurality of first device isolation regions 270, a second device isolation region 272 surrounding the first device isolation regions 270, a third device isolation region 274 surrounding the second device isolation region 272, and a fourth device isolation region 276 surrounding the third device isolation region 274 may be formed at the surface portions of the substrate 210. The first device isolation regions 270 may have a ring shape and may be arranged in a matrix form. (¶ [0066]).
However, KIM et al. does not disclose, further comprising:
first isolations separating the first collector from first base and separating the second collector from the fourth base (“Shallow trench isolation (STI) regions laterally space collector C apart from base contact B, and space emitter E apart from base contact B,” ¶ [0003]; “each base unit cell includes base contact B, and an insulation region, which may be a shallow trench isolation (STI) region, encircling base contact B” ¶ [0016]);
second isolations separating the first base from the third collector and separating the fourth base from the fourth collector (“Shallow trench isolation (STI) regions laterally space collector C apart from base contact B, and space emitter E apart from base contact B,” ¶ [0003]; (“each base unit cell includes base contact B, and an insulation region, which may be a shallow trench isolation (STI) region, encircling base contact B” ¶ [0016]);
third isolations separating the third collector from the second base and separating the fourth collector from the third base (“Shallow trench isolation (STI) regions laterally space collector C apart from base contact B, and space emitter E apart from base contact B,” ¶ [0003]; (“collector unit cells may also include insulation regions, similar to the emitter unit cells and the base unit cells.” ¶ [0016]); and
fourth isolations separating the emitter from the second base and the third base (“Shallow trench isolation (STI) regions laterally space collector C apart from base contact B, and space emitter E apart from base contact B,” ¶ [0003]; “Each emitter unit cell includes emitter E, and an insulation region encircling emitter E” ¶ [0016);
It would have been obvious to person having ordinary skill in the art before the effective filling date to modify the second well region of KIM et al. with the STI of Chung et al. so that the lateral electron-injection path is long. Accordingly, the lateral electron-injection effect is weak, and the current gain of the BJT is mainly contributed to by the vertical electron-injection path (Chung et al., ¶ [0004]).
Regarding Claim 24, KIM et al. as modified by Gupta et al. discloses the semiconductor device of Claim 15. However, KIM et al. does not disclose, further comprising second wells disposed under the first collector and the second collector wherein the second wells, the first collector and the second collector comprise a same doping type.
In the similar field of endeavor of bipolar integrated circuits, Chung et al. Figs. 2A-2B discloses, further comprising second wells disposed under the first collector and the second collector (Figs. 2A-2B shows wells disposed under the collectors), wherein the second wells, the first collector and the second collector comprise a same doping type (Collectors and the wells are N-type shown in Fig. 2B).
It would have been obvious to person having ordinary skill in the art before the effective filling date to modify the second well region of KIM et al. with the wells of Chung et al. so that the lateral electron-injection path is long. Accordingly, the lateral electron-injection effect is weak, and the current gain of the BJT is mainly contributed to by the vertical electron-injection path (Chung et al., ¶ [0004]).
Regarding Claim 25, KIM et al. as modified by Gupta et al. and Chung et al. discloses the semiconductor device of Claim 24. However, KIM et al. does not disclose, wherein a doping concentration of the second well is less than a doping concentration of the first collector, and less than a doping concentration of the second collector.
In the similar field of endeavor of bipolar integrated circuits, Chung et al. Figs. 2A-2B discloses, wherein a doping concentration of the second well (“Each collector C includes an N+ region and an HVNW region underlying” ¶ [0019]) is less than a doping concentration of the first collector, and less than a doping concentration of the second collector (“heavily doped n-type (N+) region occupies an entirety of the collector unit cell” ¶ [0016]).
It would have been obvious to person having ordinary skill in the art before the effective filling date to modify the second well region of KIM et al. with the wells of Chung et al. so that the lateral electron-injection path is long. Accordingly, the lateral electron-injection effect is weak, and the current gain of the BJT is mainly contributed to by the vertical electron-injection path (Chung et al., ¶ [0004]).
Regarding Claim 26, KIM et al. as modified by Gupta et al. discloses the semiconductor device of Claim 15. However, KIM et al. does not disclose, further comprising third wells disposed under the third collector and the fourth collector, wherein the third wells, the third collector and the fourth collector comprise a same doping type.
In the similar field of endeavor of bipolar integrated circuits, Chung et al. Figs. 2A-2B discloses, further comprising third wells disposed under the third collector and the fourth collector (“Each collector C includes an N+ region and an HVNW region underlying” ¶ [0019]), wherein the third wells, the third collector and the fourth collector comprise a same doping type (Collectors and the wells are N-type shown in Fig. 2B).
It would have been obvious to person having ordinary skill in the art before the effective filling date to modify the second well region of KIM et al. with the wells of Chung et al. so that the lateral electron-injection path is long. Accordingly, the lateral electron-injection effect is weak, and the current gain of the BJT is mainly contributed to by the vertical electron-injection path (Chung et al., ¶ [0004]).
Regarding Claim 27, KIM et al. as modified by Gupta et al. and Chung et al. discloses the semiconductor device of Claim 24. However, KIM et al. does not disclose, wherein a doping concentration of the third well is less than a doping concentration of the third collector, and less than a doping concentration of the fourth collector.
In the similar field of endeavor of bipolar integrated circuits, Chung et al. Figs. 2A-2B discloses, wherein a doping concentration of the third well (“Each collector C includes an N+ region and an HVNW region underlying” ¶ [0019]) is less than a doping concentration of the third collector, and less than a doping concentration of the fourth collector (“heavily doped n-type (N+) region occupies an entirety of the collector unit cell” ¶ [0016]).
It would have been obvious to person having ordinary skill in the art before the effective filling date to modify the second well region of KIM et al. with the wells of Chung et al. so that the lateral electron-injection path is long. Accordingly, the lateral electron-injection effect is weak, and the current gain of the BJT is mainly contributed to by the vertical electron-injection path (Chung et al., ¶ [0004]).
Claims 22 are rejected under 35 U.S.C. 103 as being unpatentable over KIM, Joo Hyung (US 20170309620 A1) “KIM et al.” in view of Gupta; Sandhya (US 6747294 B1) “Gupta et al.” further in view of KIM, Jong Min (US 20230352472 A1) “KIM-472”.
Regarding Claim 22, KIM et al. as modified by Gupta et al. discloses the semiconductor device of Claim 15. KIM et al. Figs. 1-8 further discloses, a deep n-type well region functioning as the first well region 220 may be formed in a p-type substrate 210 by an ion implantation process.
However, KIM et al. does not disclose, further comprising: a first well disposed under the emitter; and a deep well disposed under the first well, wherein the emitter, the first well and the deep well comprise a same doping type.
In the similar field of endeavor of high-voltage electrostatic discharge (ESD) protection devices KIM-472, Figs. 1-3 discloses,
a first well disposed under the emitter (Figs. 1-3 shows a first N-well disposed under the emitter); and
a deep well disposed under the first well (Figs. 1-3 shows a deep N-well disposed under the first N-well),
wherein the emitter, the first well and the deep well comprise a same doping type (Fig. 1 shows emitter, first well and deep well are N-well).
It would have been obvious to person having ordinary skill in the art before the effective filling date to modify the second well region of KIM et al. with the N-wells under the emitter of KIM-472 in order to solve the problem in the related art, an unstable breakdown voltage, by providing a high-voltage region (e.g., of the bidirectional ESD protection devices) with a stable breakdown voltage (KIM-472, ¶ [0136]).
Claims 23 are rejected under 35 U.S.C. 103 as being unpatentable over KIM, Joo Hyung (US 20170309620 A1) “KIM et al.” in view of Gupta; Sandhya (US 6747294 B1) “Gupta et al.” further in view of KIM, Jong Min (US 20230352472 A1) “KIM-472” further in view of Chang, Kun-Zen (US 6274909 B1) “Chang et al.”.
Regarding Claim 23, KIM et al. as modified by Gupta et al. discloses the semiconductor device of Claim 22. However, KIM et al. does not disclose, wherein a doping concentration of the first well is less than a doping concentration of the emitter, and a doping concentration of the deep well is less than the doping concentration of the first well.
In the similar field of endeavor of high-voltage electrostatic discharge (ESD) protection devices Chang et al. Figs. 5a-5b discloses wherein a doping concentration of the first well (“The N-well 34 is formed to depth of approximately about 1 to 2 micrometers from a dopant of arsenic or phosphorus with an implant dosage of approximately about 2E12 to 1E13 ions per square centimeter” Column 3, Lines 34-38) is less than (2E12 to 1E13 ions per square centimeter is less than 1E14 to 1E16 ions per square centimeter) a doping concentration of the emitter (“N+ diffusion 32 is formed from a dopant of arsenic or phosphorus with an implant dosage of approximately about 1E14 to 1E16 ions per square centimeter” Column 3, Lines 30-33), and a doping concentration of the deep well (“The deep N-well 35 is formed to a depth of approximately about 2 to 3 micrometers at a height of approximately about 2 to 3 micrometers from a dopant of arsenic or phosphorus with an implant dosage of approximately about 1E12 to 1E14 ions per square centimeter” Column 3, Lines 41-45) is less than the doping concentration of the first well (1E12 to 1E14 ions per square is less than 1E14 to 1E16 ions per square centimeter).
It would have been obvious to person having ordinary skill in the art before the effective filling date to modify the second well region of KIM et al. with the N-wells under the emitter of KIM-472 with the doping concentrations of Chang et al. in order to create a tall fence for high current from an electrostatic discharge or a voltage overshoot, absorbing unwanted current and preventing damage from heating or circuit latch-up. (Chang et al., Column 2, Lines 1-4).
Conclusion
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/AKHEE SARKER-NAG/Examiner, Art Unit 2893
/YARA B GREEN/Supervisor Patent Examiner, Art Unit 2893
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