Prosecution Insights
Last updated: July 17, 2026
Application No. 18/396,618

CERAMIC SUBMOUNT FOR SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME

Non-Final OA §103
Filed
Dec 26, 2023
Priority
Mar 07, 2023 — provisional 63/450,405 +1 more
Examiner
MAIGA, SIDI MOHAMED
Art Unit
2847
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Tong Hsing Electronic Industries Ltd.
OA Round
3 (Non-Final)
74%
Grant Probability
Favorable
3-4
OA Rounds
1m
Est. Remaining
79%
With Interview

Examiner Intelligence

Grants 74% — above average
74%
Career Allowance Rate
31 granted / 42 resolved
+5.8% vs TC avg
Moderate +5% lift
Without
With
+5.1%
Interview Lift
resolved cases with interview
Typical timeline
2y 8m
Avg Prosecution
17 currently pending
Career history
65
Total Applications
across all art units

Statute-Specific Performance

§103
93.0%
+53.0% vs TC avg
§102
6.3%
-33.7% vs TC avg
Black line = Tech Center average estimate • Based on career data from 42 resolved cases

Office Action

§103
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Continued Examination Under 37 CFR 1.114 A request for continued examination under 37 CFR 1.114, including the fee set forth in 37 CFR 1.17(e), was filed in this application after final rejection. Since this application is eligible for continued examination under 37 CFR 1.114, and the fee set forth in 37 CFR 1.17(e) has been timely paid, the finality of the previous Office action has been withdrawn pursuant to 37 CFR 1.114. Applicant's submission filed on 05/29/2026 has been entered. Response to Arguments Applicant’s arguments with respect to claim(s) 1 have been considered but are moot because the new ground of rejection does not rely on any reference applied in the prior rejection of record for any teaching or matter specifically challenged in the argument. Claim Rejections - 35 USC § 103 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claim(s) 1 – 2, 4, 10 – 11 and 20 is/are rejected under 35 U.S.C. 103 as being unpatentable over HU (US 20140060902 A1, “HU”) in view of Amoh et al. (US 20050067636 A1, “Amoh”), Daubenspeck et al. (US 20060246703 A1 “Daubenspeck”) and Hashimoto (US 6150920 A, “Hashimoto”). Regarding claim 1, HU discloses (Figs. 10 - 13) ceramic submount for a semiconductor device, comprising: a solder unit including a buffer containing layer and a soldering layer (170), wherein a cross-section of the solder unit has an inversed-trapezoid shape (See Fig. 9), the buffer containing layer is disposed on a surface of the electrode layer (111), a receiving space is concavely formed on a top surface of the buffer containing layer, the soldering layer (170 can be any metal, hence solder) is filled in the receiving space and is configured to bond a semiconductor chip, and the buffer containing layer surrounds the soldering layer (See Fig. 9), and wherein a periphery of a top edge of the solder unit has a chamfer. HU is silent on the substrate being ceramic. However, Amoh discloses (Fig. 1) a ceramic submount (para [0053]) HU and Amoh are both considered to be analogous to the claimed invention because they are in the same field of submount. Therefore, it would have been obvious to someone of ordinary skill in the art before the effective filing date of the claimed invention to have modified HU to incorporate the teachings of Amoh and provide a ceramic submount (para [0053]). Doing so would provide thermal management, structural integrity and electrical insulation (para [0054], [0055]). HU in view of Amoh is silent on soldering layer being configure to bond a semiconductor chip. However, Daubenspeck discloses (Fig. 8 & 9) a soldering layer (100 or 610) configure to bond a semiconductor chip (930) (see para [0011] and [0027]) HU in view of Amoh and Daubenspeck are both considered to be analogous to the claimed invention because they are in the same field of submount. Therefore, it would have been obvious to someone of ordinary skill in the art before the effective filing date of the claimed invention to have modified HU in view of Amoh to incorporate the teachings of Daubenspeck and provide a soldering layer (100 or 610) configure to bond a semiconductor chip (930) (see para [0011] and [0027]). Doing so would provide electrical connection to the substrate and enables easy chip replacement (para [0004], [0034] and [0036]). HU in view of Amoh and Daubenspeck is silent on wherein a periphery of a top edge of the solder unit has a chamfer. Hashimoto discloses (Fig. 1, 5, 8, 11, 16 and 20) wherein a periphery of a top edge of the solder unit (17, 38, 58, 79, 98 and 119) has a chamfer (See Col. 5, lines: 59 – 62 and Col. 14, lines: 27 – 30). HU in view of Amoh, Daubenspeck and are both considered to be analogous to the claimed invention because they are in the same field of submount. Therefore, it would have been obvious to someone of ordinary skill in the art before the effective filing date of the claimed invention to have modified HU in view of Amoh and Daubenspeck to incorporate the teachings of Hashimoto and provide a wherein a periphery of a top edge of the solder unit (17, 38, 58, 79, 98 and 119) has a chamfer (See Col. 5, lines: 59 – 62 and Col. 14, lines: 27 – 30). Doing so would increase the bonding strength and prevents possible peeling (See Col. 13, lines: 53 – 59). Regarding claim 2, HU in view of Amoh, Daubenspeck and Hashimoto discloses the ceramic submount according to claim 1, Amoh further discloses comprising a seed layer (5b) and at least one protective layer (5a) disposed between the electrode layer and the solder unit, wherein the seed layer (5b) is formed on an upper surface of the ceramic core board (4), the at least one protective layer (5a) is formed on an upper surface of the seed layer, and the electrode layer (6, 7) is formed on the at least one protective layer (5a). Regarding claim 4, HU in view of Amoh, Daubenspeck and Hashimoto discloses the ceramic submount according to claim 2, wherein Amoh further discloses the seed layer contains titanium and tightly contacts with the ceramic core board, and the at least one protective layer includes a platinum protective layer (See para [0057]). Regarding claim 10, HU in view of Amoh, Daubenspeck and Hashimoto discloses the ceramic submount according to claim 2, wherein another seed layer, another protective layer, and another electrode layer are formed on another side of the ceramic core board, the another seed layer corresponds in position to the solder unit, the another protective layer is formed on an upper surface of the another seed layer, and the another electrode layer is formed on the another protective layer (one of ordinary skill in the art before the effective filing date of the claimed invention would be able to modified HU in view of Amoh and provide another seed layer, another protective layer, and another electrode layer are formed on another side of the ceramic core board, doing so would provide a multi-layer submount on both sides). Regarding claim 11, HU in view of Amoh, Daubenspeck and Hashimoto discloses the ceramic submount according to claim 1, wherein HU further discloses the buffer containing layer includes at least one buffer layer (160), the at least one buffer layer is bowl- shaped and contacts the electrode layer (112), and the soldering layer (170) is filled in the at least one buffer layer; wherein the at least one buffer layer contains platinum (Amoh discloses that the solder-protecting layer comprises platinum (para [0050])). Regarding claim 20, HU in view of Amoh, Daubenspeck and Hashimoto discloses the ceramic submount according to claim 1, wherein Amoh further discloses the electrode layer (5+6) includes a plurality of conductive layers respectively made of different materials (See para [0058] – [0059]). Claim(s) 3 is/are rejected under 35 U.S.C. 103 as being unpatentable over HU (US 20140060902 A1, “HU”) in view of Amoh et al. (US 20050067636 A1, “Amoh”), Daubenspeck et al. (US 20060246703 A1 “Daubenspeck”) and Hashimoto (US 6150920 A, “Hashimoto”) as applied to claim 1 above, and further in view of ARAI et al. (US 20200043841 A1, “ARAI”). Regarding claim 3, HU in view of Amoh, Daubenspeck and Hashimoto discloses the ceramic submount according to claim 2, wherein Amoh further discloses the seed layer contains titanium (para [0048]) and tightly contacts with the ceramic core board (4), the at least one protective layer includes a copper protective layer, the copper protective layer is formed on the seed layer, the electrode layer includes a nickel plating layer and a gold capping layer (para [0058] and [0059]) in an electroless nickel immersion gold process, and the gold capping layer covers an outer surface of the nickel plating layer. HU in view of Amoh and Daubenspeck is silent on the at least one protective layer includes a copper protective layer, the copper protective layer is formed on the seed layer, and the gold capping layer covers an outer surface of the nickel plating layer. However, ARAI discloses (Fig. 1) the at least one protective layer (53B) includes a copper protective layer (See para [0035]), the copper protective layer is formed on the seed layer (53A), and the gold capping layer (54B) covers an outer surface of the nickel plating layer (54A) (53 and 54 can both be multi-layer structure with different types of metal such as: copper, Nickel, gold, etc.. See para [0035], [0038], [0039]). HU in view of Amoh, Daubenspeck and ARAI are both considered to be analogous to the claimed invention because they are in the same field of Submount. Therefore, it would have been obvious to someone of ordinary skill in the art before the effective filing date of the claimed invention to have modified HU in view of Amoh and Daubenspeck to incorporate the teachings of ARAI and provide the at least one protective layer (53B) includes a copper protective layer (See para [0035]), the copper protective layer is formed on the seed layer (53A), and the gold capping layer (54B) covers an outer surface of the nickel plating layer (54A) (53 and 54 can both be multi-layer structure with different types of metal such as: copper, Nickel, gold, etc.. See para [0035], [0038], [0039]). Doing so would enhance flatness, mechanical strength and supports substrate miniaturization (para [0036], [0058], [0088] and [0095]). Claim(s) 5 – 8 is/are rejected under 35 U.S.C. 103 as being unpatentable over HU (US 20140060902 A1, “HU”) in view of Amoh et al. (US 20050067636 A1, “Amoh”), Daubenspeck et al. (US 20060246703 A1 “Daubenspeck”) and Hashimoto (US 6150920 A, “Hashimoto”) as applied to claim 1 above, and further in view of Datta et al. (US 20030059644 A1, “Datta”). Regarding claim 5, HU in view of Amoh, Daubenspeck and Hashimoto discloses the ceramic submount according to claim 1, HU in view of Amoh and Daubenspeck is silent on wherein the buffer containing layer includes a first buffer layer and a second buffer layer, the first buffer layer is bowl-shaped and contacts the electrode layer, the second buffer layer is bowl-shaped and is formed on an inner surface of the first buffer layer, and the soldering layer is filled in the second buffer layer. However, Datta discloses (Fig. 8) wherein the buffer containing layer includes a first buffer layer (26+28) and a second buffer layer (30), the first buffer layer is bowl-shaped and contacts the electrode layer (See Fig. 8), the second buffer layer is bowl-shaped and is formed on an inner surface of the first buffer layer, and the soldering layer is filled in the second buffer layer (See Fig. 8). HU in view of Amoh, Daubenspeck and Datta are both considered to be analogous to the claimed invention because they are in the same field of submount. Therefore, it would have been obvious to someone of ordinary skill in the art before the effective filing date of the claimed invention to have modified HU in view of Amoh and Daubenspeck to incorporate the teachings of Datta and provide wherein the buffer containing layer includes a first buffer layer (26+28) and a second buffer layer (30), the first buffer layer is bowl-shaped and contacts the electrode layer (See Fig. 8), the second buffer layer is bowl-shaped and is formed on an inner surface of the first buffer layer, and the soldering layer is filled in the second buffer layer (See Fig. 8). Doing so would provide a thermo-mechanical buffer layer and provide good adhesion and proper wetting of the solder layer (para [0025] and [0035]). Regarding claim 6, HU in view of Amoh, Daubenspeck, Hashimoto and Datta discloses the ceramic submount according to claim 5, wherein Datta further discloses the first buffer layer contains titanium (para [0023]), the second buffer layer contains platinum (para [0026]), and Amoh further discloses the soldering layer includes a gold-tin alloy material (para [0033]). Regarding claim 7, HU in view of Amoh, Daubenspeck, Hashimoto and Datta discloses the ceramic submount according to claim 5, wherein Datta further disclose the first buffer layer has two outer sides, the two outer sides are each planar shaped, each of the outer sides is inclined relative to the electrode layer, and an acute angle is formed between each of the outer sides and the electrode layer (See Datta Fig. 8). Regarding claim 8, HU in view of Amoh, Daubenspeck, Hashimoto and Datta discloses the ceramic submount according to claim 5, wherein the first buffer layer has two outer sides, and the two outer sides are each arc-shaped (the arc-shaped is a matter of design choice, one of ordinary skill in the art before the effective filing date of the claimed invention would be able to modified the planar shaped into arc-shaped). In re Dailey, 357 F.2d 669, 149 USPQ 47 (CCPA 1966) (The court held that the configuration of the claimed disposable plastic nursing container was a matter of choice which a person of ordinary skill in the art would have found obvious absent persuasive evidence that the particular configuration of the claimed container was significant.). Please note that in the instant application, paragraph [0043], applicant has not disclosed any criticality for the claimed limitations. Allowable Subject Matter Claim 9 objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to SIDI MOHAMED MAIGA whose telephone number is (703)756-1870. The examiner can normally be reached Monday - Friday 8 am 5 pm. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Timothy Thompson can be reached on 571-272-2342. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /SIDI M MAIGA/Examiner, Art Unit 2847 /TIMOTHY J THOMPSON/Supervisory Patent Examiner, Art Unit 2847
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Prosecution Timeline

Dec 26, 2023
Application Filed
Jan 06, 2026
Non-Final Rejection mailed — §103
Mar 20, 2026
Response Filed
Apr 08, 2026
Final Rejection mailed — §103
May 29, 2026
Request for Continued Examination
Jun 01, 2026
Response after Non-Final Action
Jun 17, 2026
Non-Final Rejection mailed — §103 (current)

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Prosecution Projections

3-4
Expected OA Rounds
74%
Grant Probability
79%
With Interview (+5.1%)
2y 8m (~1m remaining)
Median Time to Grant
High
PTA Risk
Based on 42 resolved cases by this examiner. Grant probability derived from career allowance rate.

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