Prosecution Insights
Last updated: July 17, 2026
Application No. 18/396,976

PACKAGING STRUCTURE, ELECTRONIC PACKAGE, AND METHODS FOR MANUFACTURING THE SAME

Non-Final OA §102§103
Filed
Dec 27, 2023
Priority
Jul 31, 2023 — TW 112128665
Examiner
ADROVEL, WILLIAM
Art Unit
2898
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Siliconware Precision Industries Co., Ltd.
OA Round
1 (Non-Final)
43%
Grant Probability
Moderate
1-2
OA Rounds
1y 5m
Est. Remaining
97%
With Interview

Examiner Intelligence

Grants 43% of resolved cases
43%
Career Allowance Rate
67 granted / 157 resolved
-25.3% vs TC avg
Strong +55% interview lift
Without
With
+54.6%
Interview Lift
resolved cases with interview
Typical timeline
3y 12m
Avg Prosecution
18 currently pending
Career history
184
Total Applications
across all art units

Statute-Specific Performance

§101
0.9%
-39.1% vs TC avg
§103
86.4%
+46.4% vs TC avg
§102
11.9%
-28.1% vs TC avg
§112
0.2%
-39.8% vs TC avg
Black line = Tech Center average estimate • Based on career data from 157 resolved cases

Office Action

§102 §103
DETAILED ACTION Election/Restrictions Applicant's election with traverse of Group I in the reply filed on 05/04/2026 is acknowledged. The traversal is on the ground(s) that the inventions pertain to a generic invention and are not mutually exclusive and that examination of the inventions would not be an undue burden. This is not found persuasive because the distinct inventions occupy different classifications, such as H10W74/114 for apparatus claims and H10P72/7424 for method claims, which constitutes a search burden. The requirement is still deemed proper and is therefore made FINAL. Claims 22-42 are withdrawn from further consideration pursuant to 37 CFR 1.142(b), as being drawn to a nonelected group, there being no allowable generic or linking claim. Applicant timely traversed the restriction (election) requirement in the reply filed on 05/04/2026. Priority Receipt is acknowledged of certified copies of papers required by 37 CFR 1.55. Claim Rejections - 35 USC § 102 The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. Claims 1-4, 6 and 7 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by SU (US 20250017110 A1), hereinafter “Su.” Re: Independent Claim 1, Su discloses a packaging structure (Fig. 4: package structure P1), comprising: an electronic module (Fig. 4: thermoelectric cooling chip 10 and a heat source chip 20, i.e., electronic module); an encapsulation layer having a first surface and a second surface opposing the first surface and covering the electronic module (Fig. 4: molding compound 40, i.e., encapsulation layer, has a first bottom surface, flush with bottom surface 10b, and second top surface, which are opposing), wherein the electronic module is exposed from the second surface of the encapsulation layer (Fig. 4: heat source chip 20 is exposed from the second top surface of molding 40 via the bonding pads 301 of heat source chip 20); and a protecting layer formed on the electronic module and the second surface of the encapsulation layer (Fig. 4: insulating layer DR, i.e., protecting layer, formed over chips 10/20 and molding 40). Re: Claim 2, Su discloses the packaging structure of claim 1, and wherein the protecting layer is made of silicon nitride (¶0050: insulating layer DR may include… silicon nitride). Re: Claim 3, Su discloses the packaging structure of claim 1, and further comprising a heat conduction element stacked on the electronic module and covered by the encapsulation layer (Fig. 4: thermoelectric cooling chip 10 and a heat source chip 20 are covered by molding 40), wherein the heat conduction element is exposed from the second surface of the encapsulation layer (Fig. 4: heat source chip 20 is exposed from the second top surface of molding 40 via the bonding pads 301 of heat source chip 20), and the heat conduction element and the second surface of the encapsulation layer are covered by the protecting layer (Fig. 4: insulating layer DR is formed over chips 10/20 and molding 40). Re: Claim 4, Su discloses the packaging structure of claim 1, and wherein the electronic module is a semiconductor chip or a multi-chip package (Fig. 4: chips 10/20). Re: Claim 6, Su discloses the packaging structure of claim 1, and further comprising a heat conduction layer formed on the protecting layer (Fig. 4: thermal interface material (TIM) 510 on DR). Re: Claim 7, Su discloses the packaging structure of claim 1, and wherein a thermal conductivity of the protecting layer is greater than 4 W/cm-k (¶0050: insulating layer DR may include… silicon nitride; While Su does not explicitly teach the thermal conductivity value of 4W/cm-k, applicant’s specification in [0036] stating that the protecting layer 23 has a thermal conductivity of greater than 4 W/cm-k is met by Su’s teachings since the structure disclosed by Su meets the structure in the claims; See MPEP 2112.01(II)). Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claims 5 and 8-21 are rejected under 35 U.S.C. 103 as being unpatentable over SU (US 20250017110 A1) in view of YANG (US 20240404908 A1), hereinafter “Yang.” Re: Claim 5, Su discloses the packaging structure of claim 1. However, Su does not disclose wherein the first surface of the encapsulation layer is recessed with a plurality of voids, and the protecting layer is partially filled in the plurality of voids and has a plurality of recesses corresponding to the plurality of voids. In a similar field of endeavor, Yang discloses wherein the first surface of the encapsulation layer is recessed with a plurality of voids (Fig. 1B shows encapsulant 15 with a plurality of surface variations, i.e., voids; ¶0026: surface variations in encapsulant 15 can manifest…; ¶0027: surface with variations), and the protecting layer is partially filled in the plurality of voids and has a plurality of recesses corresponding to the plurality of voids (Fig. 1B shows a dielectric structure 161, i.e., protecting layer, with recesses corresponding to the plurality of voids.). Therefore, it would have been obvious to a person having ordinary skill in the art before the effective filing date of the current application to have been aware of surface variations manifesting during the manufacturing process and thus compensate for said variations/voids using a dielectric layer (See Su, ¶¶0026-0027). Re: Independent Claim 8, Su discloses an electronic package (Fig. 4: package structure P1), comprising: … the packaging structure of claim 1 (Fig. 4: package structure P1), However, Su does not disclose a carrying structure; and the packaging structure disposed on the carrying structure. Yang further discloses a carrying structure (Fig. 2I: support carrier 18); and the packaging structure disposed on the carrying structure (Fig. 2I: support carrier 18). Therefore, it would have been obvious to a person having ordinary skill in the art before the effective filing date of the current application to have included a carrier in order to provide support during different stages of the manufacturing process (See Yang, ¶0047, ¶0051). Re: Claim 9, the combination of Su in view of Yang discloses the electronic package of claim 8. Su also discloses further comprising a heat dissipation structure bonded onto the packaging structure (Fig. 4: heat sink 50; ¶0070: thermally conductive lid, heat spreader, or a heat sink on a thermal interface material (TIM)). Re: Independent Claim 10, Su discloses an electronic package (Fig. 4: package structure P1), comprising: … the packaging structure of claim 2 (Fig. 4: package structure P1; ¶0050: insulating layer DR may include… silicon nitride), However, Su does not disclose a carrying structure; and the packaging structure disposed on the carrying structure. Yang further discloses a carrying structure (Fig. 2I: support carrier 18); and the packaging structure disposed on the carrying structure (Fig. 2I: support carrier 18). Therefore, it would have been obvious to a person having ordinary skill in the art before the effective filing date of the current application to have included a carrier in order to provide support during different stages of the manufacturing process (See Yang, ¶0047, ¶0051). Re: Claim 11, the combination of Su in view of Yang discloses the electronic package of claim 10. Su also discloses further comprising a heat dissipation structure bonded onto the packaging structure (Fig. 4: heat sink 50; ¶0070: thermally conductive lid, heat spreader, or a heat sink on a thermal interface material (TIM)). Re: Independent Claim 12, Su discloses an electronic package (Fig. 4: package structure P1), comprising: … the packaging structure of claim 3 (Fig. 4: package structure P1; See citations provided for claim 3 above.), However, Su does not disclose a carrying structure; and the packaging structure disposed on the carrying structure. Yang further discloses a carrying structure (Fig. 2I: support carrier 18); and the packaging structure disposed on the carrying structure (Fig. 2I: support carrier 18). Therefore, it would have been obvious to a person having ordinary skill in the art before the effective filing date of the current application to have included a carrier in order to provide support during different stages of the manufacturing process (See Yang, ¶0047, ¶0051). Re: Claim 13, the combination of Su in view of Yang discloses the electronic package of claim 12. Su also discloses further comprising a heat dissipation structure bonded onto the packaging structure (Fig. 4: heat sink 50; ¶0070: thermally conductive lid, heat spreader, or a heat sink on a thermal interface material (TIM)). Re: Independent Claim 14, Su discloses an electronic package (Fig. 4: package structure P1), comprising: … the packaging structure of claim 4 (Fig. 4: package structure P1; See citations provided for claim 4 above.), However, Su does not disclose a carrying structure; and the packaging structure disposed on the carrying structure. Yang further discloses a carrying structure (Fig. 2I: support carrier 18); and the packaging structure disposed on the carrying structure (Fig. 2I: support carrier 18). Therefore, it would have been obvious to a person having ordinary skill in the art before the effective filing date of the current application to have included a carrier in order to provide support during different stages of the manufacturing process (See Yang, ¶0047, ¶0051). Re: Claim 15, the combination of Su in view of Yang discloses the electronic package of claim 14. Su also discloses further comprising a heat dissipation structure bonded onto the packaging structure (Fig. 4: heat sink 50; ¶0070: thermally conductive lid, heat spreader, or a heat sink on a thermal interface material (TIM)). Re: Independent Claim 16, Su discloses an electronic package (Fig. 4: package structure P1), comprising: … the packaging structure of claim 5 (Fig. 4: package structure P1; See citations provided for claim 5 above.), However, Su does not disclose a carrying structure; and the packaging structure disposed on the carrying structure. Yang further discloses a carrying structure (Fig. 2I: support carrier 18); and the packaging structure disposed on the carrying structure (Fig. 2I: support carrier 18). Therefore, it would have been obvious to a person having ordinary skill in the art before the effective filing date of the current application to have included a carrier in order to provide support during different stages of the manufacturing process (See Yang, ¶0047, ¶0051). Re: Claim 17, the combination of Su in view of Yang discloses the electronic package of claim 16. Su also discloses further comprising a heat dissipation structure bonded onto the packaging structure (Fig. 4: heat sink 50; ¶0070: thermally conductive lid, heat spreader, or a heat sink on a thermal interface material (TIM)). Re: Independent Claim 18, Su discloses an electronic package (Fig. 4: package structure P1), comprising: … the packaging structure of claim 6 (Fig. 4: package structure P1; See citations provided for claim 6 above.), However, Su does not disclose a carrying structure; and the packaging structure disposed on the carrying structure. Yang further discloses a carrying structure (Fig. 2I: support carrier 18); and the packaging structure disposed on the carrying structure (Fig. 2I: support carrier 18). Therefore, it would have been obvious to a person having ordinary skill in the art before the effective filing date of the current application to have included a carrier in order to provide support during different stages of the manufacturing process (See Yang, ¶0047, ¶0051). Re: Claim 19, the combination of Su in view of Yang discloses the electronic package of claim 18. Su also discloses further comprising a heat dissipation structure bonded onto the packaging structure (Fig. 4: heat sink 50; ¶0070: thermally conductive lid, heat spreader, or a heat sink on a thermal interface material (TIM)). Re: Independent Claim 20, Su discloses an electronic package (Fig. 4: package structure P1), comprising: … the packaging structure of claim 7 (Fig. 4: package structure P1; See citations provided for claim 7 above.), However, Su does not disclose a carrying structure; and the packaging structure disposed on the carrying structure. Yang further discloses a carrying structure (Fig. 2I: support carrier 18); and the packaging structure disposed on the carrying structure (Fig. 2I: support carrier 18). Therefore, it would have been obvious to a person having ordinary skill in the art before the effective filing date of the current application to have included a carrier in order to provide support during different stages of the manufacturing process (See Yang, ¶0047, ¶0051). Re: Claim 21, the combination of Su in view of Yang discloses the electronic package of claim 20. Su also discloses further comprising a heat dissipation structure bonded onto the packaging structure (Fig. 4: heat sink 50; ¶0070: thermally conductive lid, heat spreader, or a heat sink on a thermal interface material (TIM)). Conclusion The prior art made of record and not relied upon is considered pertinent to applicant's disclosure: ESSIG et al. (US 20250029951 A1) – Fig. 1 shows a packaging structure relevant to the current claims. See ¶0072 for details regarding heat dissipating element 24 which includes Silicon Nitride. DRY (US 20200083136 A1) – Fig. 2 shows a packaging structure relevant to the current claims. IM et al. (US 20120119346 A1) – Fig. 1 shows a packaging structure relevant to the current claims. Any inquiry concerning this communication or earlier communications from the examiner should be directed to WILLIAM ADROVEL whose telephone number is (571)272-3048. The examiner can normally be reached 7:30 AM - 5:00 PM. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, LEONARD CHANG can be reached at (571) 270-3691. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /WILLIAM ADROVEL/Examiner, Art Unit 2898 /Leonard Chang/Supervisory Patent Examiner, Art Unit 2898
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Prosecution Timeline

Dec 27, 2023
Application Filed
Jun 25, 2026
Non-Final Rejection mailed — §102, §103 (current)

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
43%
Grant Probability
97%
With Interview (+54.6%)
3y 12m (~1y 5m remaining)
Median Time to Grant
Low
PTA Risk
Based on 157 resolved cases by this examiner. Grant probability derived from career allowance rate.

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