Prosecution Insights
Last updated: May 29, 2026
Application No. 18/397,265

CONSTRUCTING A SUBSTRATE TOPOLOGY MAP BASED ON MEASURED PROPERTIES

Final Rejection §103
Filed
Dec 27, 2023
Examiner
RIDDLE, CHRISTINA A
Art Unit
2882
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Applied Materials, Inc.
OA Round
2 (Final)
81%
Grant Probability
Favorable
3-4
OA Rounds
6m
Est. Remaining
94%
With Interview

Examiner Intelligence

Grants 81% — above average
81%
Career Allowance Rate
743 granted / 920 resolved
+12.8% vs TC avg
Moderate +14% lift
Without
With
+13.7%
Interview Lift
resolved cases with interview
Typical timeline
2y 11m
Avg Prosecution
26 currently pending
Career history
956
Total Applications
across all art units

Statute-Specific Performance

§101
1.1%
-38.9% vs TC avg
§103
81.1%
+41.1% vs TC avg
§102
4.6%
-35.4% vs TC avg
§112
9.6%
-30.4% vs TC avg
Black line = Tech Center average estimate • Based on career data from 920 resolved cases

Office Action

§103
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Status Acknowledgment is made of the amendment filed on 2/26/2026, which amended claims 1, 13, and 18. Claims 1-20 are currently pending. Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claims 1, 2, 4-7, 9, 10, 11, 13, 14, 16-19 are rejected under 35 U.S.C. 103 as being unpatentable over Shu (US PGPub 2013/0100573) in view of Wong et al. (US PGPub 2022/0384221, Wong hereinafter). Regarding claim 1, Shu discloses a system (Figs. 3-13, paras. [0029]-[0030], [0034], [0049]-[0057], [0063]-[0064], [0089], [0094]-[0110]), comprising: a first displacement sensor configured to measure one or more properties of a top surface of a substrate, wherein the one or more properties are associated with at least one of substrate bow or substrate warpage (Figs. 3-13, paras. [0029]-[0030], [0034], [0049]-[0052], [0063]-[0064], [0089], [0094]-[0096], wafer flatness measuring unit 230 measures the flatness, warpage, and profile of the wafer); a processing device communicatively coupled to the first displacement sensor (Figs. 3-13, paras. [0031], [0034], [0049]-[0057], [0063], [0067], [0088], [0092]-[0110], control unit 240 is coupled to the measuring unit 230), wherein the processing device is configured to: receive, from the first displacement sensor, sensor data indicative of the one or more properties of the top surface of the substrate (Figs. 3-13, paras. [0031], [0034], [0049]-[0057], [0063], [0064], [0089], [0094]-[0096], wafer flatness measuring unit 230 measures the substrate, and the control unit 240 receives data from the measuring unit); construct a substrate topology map based on the received sensor data, wherein the substrate topology map is indicative of at least one of the substrate bow or the substrate warpage (Figs. 3-13, paras. [0012]-[0013], [0031], [0033]-[0034], [0047], [0049]-[0057], [0063], [0064], [0074]-[0076], [0089], [0094]-[0096], the control unit 240 receives the flatness data from the wafer flatness measuring unit 230 and necessarily forms a map in order to control the zones of the power supply units 212 independently to clamp the wafer in a flattened state); and cause management of the substrate based on the substrate topology map (Figs. 3-13, paras. [0012]-[0013], [0031], [0033]-[0034], [0047], [0049]-[0057], [0063], [0064], [0071]-[0076], [0089], [0093]-[0110], the control unit 240 controls the power supply units 212 independently to control the zones of the electrostatic chuck on the basis of the wafer topology). Although Shu discloses the substrate topology map is indicative of at least one of the substrate bow or the substrate warpage (Figs. 4, 12-13, paras. [0029]-[0030], [0034], [0049]-[0052], [0063]-[0064], [0089], [0094]-[0096], the wafer flatness measuring unit 230 measures the warpage and profile of the wafer), Shu does not appear to explicitly describe wherein the substrate topology map comprises an elevation map indicating at least one of a high spot or a low spot of the top surface of the substrate. Wong discloses construct a substrate topology map based on the received sensor data, wherein the substrate topology map is indicative of at least one of the substrate bow or the substrate warpage, wherein the substrate topology map comprises an elevation map indicating at least one of a high spot or a low spot of the top surface of the substrate (Figs. 5-8, 11, paras. [0065]-[0071], [0087]-[0088], the displacement sensor measures the displacement data of a wafer, including the presence of a concave profile, a convex profile, or a combination of convex and concave portions having higher and lower points, and the displacement measurements are used to create a displacement map of the surface of the wafer). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have included wherein the substrate topology map comprises an elevation map indicating at least one of a high spot or a low spot of the top surface of the substrate as taught by Wong as the substrate topology map in the processing device in the system as taught by Shu since including wherein the substrate topology map comprises an elevation map indicating at least one of a high spot or a low spot of the top surface of the substrate is commonly used in the art to accurately characterize wafer warp or bow and to control wafer processing on the basis of regional irregularities of the wafer (Wong, paras. [0002], [0008]-[0009], [0071], [0077]). Regarding claim 2, Shu as modified by Wong discloses wherein causing management of the substrate based on the substrate topology map comprises causing the substrate to be chucked on a substrate support based on the substrate topology map, and wherein the processing device is further configured to cause a first zone of a plurality of zones of the substrate support to receive more than a threshold amount of voltage to electrically chuck the substrate to the substrate support, wherein, when the substrate is disposed on the substrate support, the first zone corresponds to a bowed region of the substrate or a warped region of the substrate reflected on the substrate topology map (Shu, Figs. 3-13, paras. [0012]-[0013], [0031], [0033]-[0034], [0047], [0049]-[0057], [0063], [0064], [0071]-[0076], [0089], [0093]-[0110], the control unit 240 controls the power supply units 212 independently to apply voltages based on the measured surface flatness to chuck the wafer in an order corresponding to the warp). Regarding claim 4, Shu as modified by Wong discloses wherein the processing device is further configured to determine whether the substrate satisfies one or more of a substrate bow criterion or a substrate warpage criterion (Shu, Figs. 3-13, paras. [0031], [0034], [0049]-[0057], [0063], [0064], [0071]-[0076], [0089], [0093]-[0110], wafer flatness measuring unit 230 measures the substrate, and the control unit 240 receives the data from the measuring unit to determine control of the zones of the electrostatic chuck based on the flatness data, and as modified by Wong, Figs. 5-8, 11, paras. [0065]-[0071], [0087]-[0088], the displacement sensor measures the displacement data of a wafer, including the presence of a concave profile, a convex profile, or a combination of convex and concave portions). Regarding claim 5, Shu does not appear to explicitly describe wherein the processing device is further configured to: detect, based on the received sensor data, an alignment notch in an edge of the substrate; and cause, responsive to detection of the alignment notch, the substrate to be aligned based on a location of the alignment notch. Wong discloses detect, based on the received sensor data, an alignment notch in an edge of the substrate (Figs. 4-5, 7, 9-16, paras. [0053]-[0059], displacement sensor 406 detects the location of the notch 416); and cause, responsive to detection of the alignment notch, the substrate to be aligned based on a location of the alignment notch (Figs. 4-5, 7, 9-16, paras. [0009], [0053]-[0060], [0074], [0078]-[0082], displacement sensor 406 detects the location of the notch 416, and the aligner aligns the wafer based on the notch location). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have included wherein the processing device is further configured to: detect, based on the received sensor data, an alignment notch in an edge of the substrate; and cause, responsive to detection of the alignment notch, the substrate to be aligned based on a location of the alignment notch as taught by Wong in the system as taught by Shu since including wherein the processing device is further configured to: detect, based on the received sensor data, an alignment notch in an edge of the substrate; and cause, responsive to detection of the alignment notch, the substrate to be aligned based on a location of the alignment notch is commonly used to accurately correct a carrier parameter based on measurement data (Wong, para. [0009]). Regarding claim 6, Shu does not appear to explicitly describe wherein the first displacement sensor comprises at least one of a linear profile laser sensor or a point laser sensor, and wherein the first displacement sensor is configured to detect a distance between the top surface of the substrate and the first displacement sensor. Wong discloses wherein the first displacement sensor comprises at least one of a linear profile laser sensor or a point laser sensor, and wherein the first displacement sensor is configured to detect a distance between the top surface of the substrate and the first displacement sensor (Figs. 4-5, 7 paras. [0056]-[0062], [0064], [0079], the displacement sensor 406 includes a laser displacement sensor that emits one or more laser beams to the surface of the wafer 404 and receives reflections to calculate the distance between the displacement sensor 406 and the wafer). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have included wherein the first displacement sensor comprises at least one of a linear profile laser sensor or a point laser sensor, and wherein the first displacement sensor is configured to detect a distance between the top surface of the substrate and the first displacement sensor as taught by Wong as the first displacement sensor in the system as taught by Shu since including wherein the first displacement sensor comprises at least one of a linear profile laser sensor or a point laser sensor, and wherein the first displacement sensor is configured to detect a distance between the top surface of the substrate and the first displacement sensor is commonly used to provide accurate distance measurements of the wafer with a well-known sensor. Regarding claim 7, Shu does not appear to explicitly describe an aligner positioned within a factory interface chamber of a manufacturing system, wherein the first displacement sensor is configured to measure the one or more properties while the substrate is disposed on the aligner. Wong discloses an aligner positioned within a factory interface chamber of a manufacturing system, wherein the first displacement sensor is configured to measure the one or more properties while the substrate is disposed on the aligner (Figs. 4-5, 7 paras. [0052]-[0062], [0064], [0072]-[0077], [0079], the system 400, 902 is an aligner in a semiconductor manufacturing system, and the aligner includes a displacement sensor to measure the distance between the surface of the wafer and the displacement sensor). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have included an aligner positioned within a factory interface chamber of a manufacturing system, wherein the first displacement sensor is configured to measure the one or more properties while the substrate is disposed on the aligner as taught by Wong in the system as taught by Shu since including an aligner positioned within a factory interface chamber of a manufacturing system, wherein the first displacement sensor is configured to measure the one or more properties while the substrate is disposed on the aligner is commonly used to control processing of a wafer based on the shape of the wafer to improve uniformity (Wong, paras. [0002], [0007]-[0008], [0051]-[0052], [0056], [0072], [0077]). Regarding claim 9, Shu does not appear to explicitly describe wherein the processing device is to cause the substrate to rotate relative to the first displacement sensor to multiple angular positions for measurement of multiple radial top surface profiles, each of the multiple radial top surface profiles corresponding to one of the multiple angular positions, and wherein the processing device is to construct the substrate topology map using the multiple measured radial top surface profiles. Wong discloses wherein the processing device is to cause the substrate to rotate relative to the first displacement sensor to multiple angular positions for measurement of multiple radial top surface profiles, each of the multiple radial top surface profiles corresponding to one of the multiple angular positions, and wherein the processing device is to construct the substrate topology map using the multiple measured radial top surface profiles (Figs. 4-5, 7, 9-16, paras. [0009], [0053]-[0060], [0062]-[0064], [0074], [0078]-[0082], the wafer is rotated relative to displacement sensors 506c, 508c, 506d, 508d at multiple radial positions, and the multiple sensors provide displacement mapping of the entire surface of the wafer). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have included wherein the processing device is to cause the substrate to rotate relative to the first displacement sensor to multiple angular positions for measurement of multiple radial top surface profiles, each of the multiple radial top surface profiles corresponding to one of the multiple angular positions, and wherein the processing device is to construct the substrate topology map using the multiple measured radial top surface profiles as taught by Wong in the system as taught by Shu since including wherein the processing device is to cause the substrate to rotate relative to the first displacement sensor to multiple angular positions for measurement of multiple radial top surface profiles, each of the multiple radial top surface profiles corresponding to one of the multiple angular positions, and wherein the processing device is to construct the substrate topology map using the multiple measured radial top surface profiles is commonly used to provide a fast, low-cost measurement system for substrate surface mapping (Wong, paras. [0062]-[0063]). Regarding claim 10, Shu does not appear to explicitly describe further comprising: a second displacement sensor configured to measure one or more properties of a bottom surface of the substrate, wherein the processing device is further configured construct the substrate topology map further based on sensor data received from the second displacement sensor. Wong discloses further comprising: a second displacement sensor configured to measure one or more properties of a bottom surface of the substrate, wherein the processing device is further configured construct the substrate topology map further based on sensor data received from the second displacement sensor (Figs. 4-5, paras. [0062]-[0065], [0074], [0078]-[0082], multiple displacement sensors are arranged on a top side of the wafer and a bottom side of the wafer to obtain the surface mapping to determine the bow or warp). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have included a second displacement sensor configured to measure one or more properties of a bottom surface of the substrate, wherein the processing device is further configured construct the substrate topology map further based on sensor data received from the second displacement sensor as taught by Wong in the system as taught by Shu since including a second displacement sensor configured to measure one or more properties of a bottom surface of the substrate, wherein the processing device is further configured construct the substrate topology map further based on sensor data received from the second displacement sensor is commonly used to provide accurate three-dimensional measurement of the substrate shape with improved throughput. Regarding claim 11, Shu does not appear to explicitly describe wherein, to construct the substrate topology map, the processing device compares the received sensor data with baseline measurements corresponding to a measured baseline substrate. Wong discloses wherein, to construct the substrate topology map, the processing device compares the received sensor data with baseline measurements corresponding to a measured baseline substrate (Figs. 6-7, abstract, paras. [0058], [0065]-[0070], the displacement data of the wafer from the displacement sensor is compared with baseline displacement data measured from a known flat reference wafer). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have included wherein, to construct the substrate topology map, the processing device compares the received sensor data with baseline measurements corresponding to a measured baseline substrate as taught by Wong in the system as taught by Shu since including wherein, to construct the substrate topology map, the processing device compares the received sensor data with baseline measurements corresponding to a measured baseline substrate is commonly used to calibrate the system (Wong, para. [0068]) and to quickly characterize measured displacement. Regarding claim 13, Shu discloses a method (Figs. 3-13, paras. [0029]-[0030], [0034], [0049]-[0057], [0063]-[0064], [0089], [0094]-[0110]), comprising: receiving, from a first displacement sensor, sensor data indicative of one or more properties of a top surface of a substrate, wherein the one or more properties are associated with at least one of substrate bow or substrate warpage (Figs. 3-13, paras. [0031], [0034], [0049]-[0057], [0063], [0064], [0089], [0094]-[0096], wafer flatness measuring unit 230 measures the substrate, and the control unit 240 receives data from the measuring unit); constructing a substrate topology map based on the received sensor data, wherein the substrate topology map is indicative of at least one of the substrate bow or the substrate warpage (Figs. 3-13, paras. [0012]-[0013], [0031], [0033]-[0034], [0047], [0049]-[0057], [0063], [0064], [0074]-[0076], [0089], [0094]-[0096], the control unit 240 receives the flatness data from the wafer flatness measuring unit 230 and necessarily forms a map in order to control the zones of the power supply units 212 independently to clamp the wafer in a flattened state); and causing management of the substrate based on the substrate topology (Figs. 3-13, paras. [0012]-[0013], [0031], [0033]-[0034], [0047], [0049]-[0057], [0063], [0064], [0071]-[0076], [0089], [0093]-[0110], the control unit 240 controls the power supply units 212 independently to control the zones of the electrostatic chuck on the basis of the wafer topology). Although Shu discloses the substrate topology map is indicative of at least one of the substrate bow or the substrate warpage (Figs. 4, 12-13, paras. [0029]-[0030], [0034], [0049]-[0052], [0063]-[0064], [0089], [0094]-[0096], the wafer flatness measuring unit 230 measures the warpage and profile of the wafer), Shu does not appear to explicitly describe wherein the substrate topology map comprises an elevation map indicating at least one of a high spot or a low spot of the top surface of the substrate. Wong discloses constructing a substrate topology map based on the received sensor data, wherein the substrate topology map is indicative of at least one of the substrate bow or the substrate warpage, wherein the substrate topology map comprises an elevation map indicating at least one of a high spot or a low spot of the top surface of the substrate (Figs. 5-8, 11, paras. [0065]-[0071], [0087]-[0088], the displacement sensor measures the displacement data of a wafer, including the presence of a concave profile, a convex profile, or a combination of convex and concave portions having higher and lower points, and the displacement measurements are used to create a displacement map of the surface of the wafer). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have included wherein the substrate topology map comprises an elevation map indicating at least one of a high spot or a low spot of the top surface of the substrate as taught by Wong as the substrate topology map in the method as taught by Shu since including wherein the substrate topology map comprises an elevation map indicating at least one of a high spot or a low spot of the top surface of the substrate is commonly used in the art to accurately characterize wafer warp or bow and to control wafer processing on the basis of regional irregularities of the wafer (Wong, paras. [0002], [0008]-[0009], [0071], [0077]). Regarding claim 14, Shu as modified by Wong discloses wherein causing management of the substrate based on the substrate topology map comprises causing the substrate to be chucked on a substrate support based on the substrate topology map, the method further comprising: causing a first zone of a plurality of zones of the substrate support to receive more than a threshold amount of voltage to electrically chuck the substrate to the substrate support, wherein, when the substrate is disposed on the substrate support, the first zone corresponds to a bowed region of the substrate or a warped region of the substrate reflected on the substrate topology map (Shu, Figs. 3-13, paras. [0012]-[0013], [0031], [0033]-[0034], [0047], [0049]-[0057], [0063], [0064], [0071]-[0076], [0089], [0093]-[0110], the control unit 240 controls the power supply units 212 independently to apply voltages based on the measured surface flatness to chuck the wafer in an order corresponding to the warp). Regarding claim 16, Shu as modified by Wong discloses further comprising: determining whether the substrate satisfies one or more of a substrate bow criterion or a substrate warpage criterion (Shu, Figs. 3-13, paras. [0031], [0034], [0049]-[0057], [0063], [0064], [0071]-[0076], [0089], [0093]-[0110], wafer flatness measuring unit 230 measures the substrate, and the control unit 240 receives the data from the measuring unit to determine control of the zones of the electrostatic chuck based on the flatness data, and as modified by Wong, Figs. 5-8, 11, paras. [0065]-[0071], [0087]-[0088], the displacement sensor measures the displacement data of a wafer, including the presence of a concave profile, a convex profile, or a combination of convex and concave portions). Regarding claim 17, Shu does not appear to explicitly describe further comprising: detecting, based on the received sensor data, an alignment notch in an edge of the substrate; and causing, responsive to detection of the alignment notch, the substrate to be aligned based on a location of the alignment notch. Wong discloses further comprising: detecting, based on the received sensor data, an alignment notch in an edge of the substrate (Figs. 4-5, 7, 9-16, paras. [0053]-[0059], displacement sensor 406 detects the location of the notch 416); and causing, responsive to detection of the alignment notch, the substrate to be aligned based on a location of the alignment notch (Figs. 4-5, 7, 9-16, paras. [0009], [0053]-[0060], [0074], [0078]-[0082], displacement sensor 406 detects the location of the notch 416, and the aligner aligns the wafer based on the notch location). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have included further comprising: detecting, based on the received sensor data, an alignment notch in an edge of the substrate; and causing, responsive to detection of the alignment notch, the substrate to be aligned based on a location of the alignment notch as taught by Wong in the method as taught by Shu since including further comprising: detecting, based on the received sensor data, an alignment notch in an edge of the substrate; and causing, responsive to detection of the alignment notch, the substrate to be aligned based on a location of the alignment notch is commonly used to accurately correct a carrier parameter based on measurement data (Wong, para. [0009]). Regarding claim 18, Shu discloses a non-transitory machine-readable storage medium comprising instructions that, when executed by a processing device (Figs. 3-13, paras. [0029]-[0030], [0034], [0049]-[0057], [0063]-[0070], [0088], [0089], [0094]-[0110], the control unit 240 includes a data reception unit and storage unit comprising a hard disk, memory, or flash memory to control the holding apparatus), cause the processing device to perform operations comprising: receiving, from a first displacement sensor, sensor data indicative of one or more properties of a top surface of a substrate, wherein the one or more properties are associated with at least one of substrate bow or substrate warpage (Figs. 3-13, paras. [0031], [0034], [0049]-[0057], [0063], [0064], [0089], [0094]-[0096], wafer flatness measuring unit 230 measures the substrate, and the control unit 240 receives data from the measuring unit); constructing a substrate topology map based on the received sensor data, wherein the substrate topology map is indicative of at least one of the substrate bow or the substrate warpage (Figs. 3-13, paras. [0012]-[0013], [0031], [0033]-[0034], [0047], [0049]-[0057], [0063], [0064], [0074]-[0076], [0089], [0094]-[0096], the control unit 240 receives the flatness data from the wafer flatness measuring unit 230 and necessarily forms a map in order to control the zones of the power supply units 212 independently to clamp the wafer in a flattened state); and causing management of the substrate based on the substrate topology (Figs. 3-13, paras. [0012]-[0013], [0031], [0033]-[0034], [0047], [0049]-[0057], [0063], [0064], [0071]-[0076], [0089], [0093]-[0110], the control unit 240 controls the power supply units 212 independently to control the zones of the electrostatic chuck on the basis of the wafer topology). Although Shu discloses the substrate topology map is indicative of at least one of the substrate bow or the substrate warpage (Figs. 4, 12-13, paras. [0029]-[0030], [0034], [0049]-[0052], [0063]-[0064], [0089], [0094]-[0096], the wafer flatness measuring unit 230 measures the warpage and profile of the wafer), Shu does not appear to explicitly describe wherein the substrate topology map comprises an elevation map indicating at least one of a high spot or a low spot of the top surface of the substrate. Wong discloses constructing a substrate topology map based on the received sensor data, wherein the substrate topology map is indicative of at least one of the substrate bow or the substrate warpage, wherein the substrate topology map comprises an elevation map indicating at least one of a high spot or a low spot of the top surface of the substrate (Figs. 5-8, 11, paras. [0065]-[0071], [0087]-[0088], the displacement sensor measures the displacement data of a wafer, including the presence of a concave profile, a convex profile, or a combination of convex and concave portions having higher and lower points, and the displacement measurements are used to create a displacement map of the surface of the wafer). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have included wherein the substrate topology map comprises an elevation map indicating at least one of a high spot or a low spot of the top surface of the substrate as taught by Wong as the substrate topology map in the non-transitory machine readable storage medium causing the processing device to perform operation as taught by Shu since including wherein the substrate topology map comprises an elevation map indicating at least one of a high spot or a low spot of the top surface of the substrate is commonly used in the art to accurately characterize wafer warp or bow and to control wafer processing on the basis of regional irregularities of the wafer (Wong, paras. [0002], [0008]-[0009], [0071], [0077]). Regarding claim 19, Shu as modified by Wong discloses wherein causing management of the substrate based on the substrate topology map comprises causing the substrate to be chucked on a substrate support based on the substrate topology map, and wherein the processing device is to perform operations further comprising: causing a first zone of a plurality of zones of the substrate support to receive more than a threshold amount of voltage to electrically chuck the substrate to the substrate support, wherein, when the substrate is disposed on the substrate support, the first zone corresponds to a bowed region of the substrate or a warped region of the substrate reflected on the substrate topology map (Shu, Figs. 3-13, paras. [0012]-[0013], [0031], [0033]-[0034], [0047], [0049]-[0057], [0063], [0064], [0071]-[0076], [0089], [0093]-[0110], the control unit 240 controls the power supply units 212 independently to apply voltages based on the measured surface flatness to chuck the wafer in an order corresponding to the warp). Claims 3, 8, 15, and 20 are rejected under 35 U.S.C. 103 as being unpatentable over Shu as modified by Wong as applied to claims 1, 13, and 18 above, and further in view of Cavins et al. (US PGPub 2018/0068881, Cavins hereinafter). Regarding claim 3, Shu as modified by Wong does not appear to explicitly describe wherein causing management of the substrate based on the substrate topology map comprises causing the substrate to be handled based on the substrate topology map, and wherein the processing device is further configured to cause an end effector of a substrate handling robot to grip the substrate at one or more edge locations satisfying one or more of a bow criterion or a warpage criterion, wherein the one or more edge locations are indicated by the substrate topology map. Cavins discloses wherein causing management of the substrate based on the substrate topology map comprises causing the substrate to be handled based on the substrate topology map (Figs. 3-14, 16-19, paras. [0030], [0044]-[0048], [0050]-[0053], [0058], [0073], the substrate bow or warp map is determined by a camera, and controller uses the map to handle the substrate), and wherein the processing device is further configured to cause an end effector of a substrate handling robot to grip the substrate at one or more edge locations satisfying one or more of a bow criterion or a warpage criterion, wherein the one or more edge locations are indicated by the substrate topology map (Figs. 3-14, 16-19, paras. [0030], [0044]-[0048], [0050]-[0053], [0058], [0073], the substrate bow or warp map is determined by a camera, and controller uses the map to determine the spacing of the tines 350T1, 3501T2 of the end effector 350 to hold the wafer based on the bow or warp to grip the wafer at extremities or peripheral edges of the substrate). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have included wherein causing management of the substrate based on the substrate topology map comprises causing the substrate to be handled based on the substrate topology map, and wherein the processing device is further configured to cause an end effector of a substrate handling robot to grip the substrate at one or more edge locations satisfying one or more of a bow criterion or a warpage criterion, wherein the one or more edge locations are indicated by the substrate topology map as taught by Cavins in the system as taught by Shu as modified by Wong since including wherein causing management of the substrate based on the substrate topology map comprises causing the substrate to be handled based on the substrate topology map, and wherein the processing device is further configured to cause an end effector of a substrate handling robot to grip the substrate at one or more edge locations satisfying one or more of a bow criterion or a warpage criterion, wherein the one or more edge locations are indicated by the substrate topology map is commonly used to provide a configurable end effector to enable support of the substrate while avoiding changing the shape of the substrate to prevent impact to substate processing (Cavins, paras. [0006], [0051]). Regarding claim 8, Shu as modified by Wong does not appear to explicitly describe a substrate handling robot comprising an end effector, wherein the first displacement sensor is configured to measure the one or more properties while the substrate is supported by the end effector. Cavins discloses a substrate handling robot comprising an end effector, wherein the first displacement sensor is configured to measure the one or more properties while the substrate is supported by the end effector (Figs. 3-14, 16-19, abstract, paras. [0030], [0044]-[0048], [0050]-[0053], [0058]-[0059], [0073], the substrate transport arm includes end effector 350, and camera 1300 or sensors simultaneously maps the substrate while the substrate is held to determine substrate bow and substrate warp). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have included a substrate handling robot comprising an end effector, wherein the first displacement sensor is configured to measure the one or more properties while the substrate is supported by the end effector as taught by Cavins in the system as taught by Shu as modified by Wong since including a substrate handling robot comprising an end effector, wherein the first displacement sensor is configured to measure the one or more properties while the substrate is supported by the end effector is commonly used to increase throughput for substrate mapping (Cavins, para. [0048]). Regarding claim 15, Shu as modified by Wong does not appear to explicitly describe wherein causing management of the substrate based on the substrate topology map comprises causing the substrate to be handled based on the substrate topology map, the method further comprising: causing an end effector of a substrate handling robot to grip the substrate at one or more edge locations satisfying one or more of a bow criterion or a warpage criterion, wherein the one or more edge locations are indicated by the substrate topology map. Cavins discloses wherein causing management of the substrate based on the substrate topology map comprises causing the substrate to be handled based on the substrate topology map (Figs. 3-14, 16-19, paras. [0030], [0044]-[0048], [0050]-[0053], [0058], [0073], the substrate bow or warp map is determined by a camera, and controller uses the map to handle the substrate), the method further comprising: causing an end effector of a substrate handling robot to grip the substrate at one or more edge locations satisfying one or more of a bow criterion or a warpage criterion, wherein the one or more edge locations are indicated by the substrate topology map (Figs. 3-14, 16-19, paras. [0030], [0044]-[0048], [0050]-[0053], [0058], [0073], the substrate bow or warp map is determined by a camera, and controller uses the map to determine the spacing of the tines 350T1, 3501T2 of the end effector 350 to hold the wafer based on the bow or warp to grip the wafer at extremities or peripheral edges of the substrate). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have included wherein causing management of the substrate based on the substrate topology map comprises causing the substrate to be handled based on the substrate topology map, the method further comprising: causing an end effector of a substrate handling robot to grip the substrate at one or more edge locations satisfying one or more of a bow criterion or a warpage criterion, wherein the one or more edge locations are indicated by the substrate topology map as taught by Cavins in the method as taught by Shu as modified by Wong since including wherein causing management of the substrate based on the substrate topology map comprises causing the substrate to be handled based on the substrate topology map, the method further comprising: causing an end effector of a substrate handling robot to grip the substrate at one or more edge locations satisfying one or more of a bow criterion or a warpage criterion, wherein the one or more edge locations are indicated by the substrate topology map is commonly used to provide a configurable end effector to enable support of the substrate while avoiding changing the shape of the substrate to prevent impact to substate processing (Cavins, paras. [0006], [0051]). Regarding claim 20, Shu as modified by Wong does not appear to explicitly describe wherein causing management of the substrate based on the substrate topology map comprises causing the substrate to be handled based on the substrate topology map, and wherein the processing device is to perform operations further comprising: causing an end effector of a substrate handling robot to grip the substrate at one or more edge locations satisfying one or more of a bow criterion or a warpage criterion, wherein the one or more edge locations are indicated by the substrate topology map. Cavins discloses wherein causing management of the substrate based on the substrate topology map comprises causing the substrate to be handled based on the substrate topology map (Figs. 3-14, 16-19, paras. [0030], [0044]-[0048], [0050]-[0053], [0058], [0073], the substrate bow or warp map is determined by a camera, and controller uses the map to handle the substrate), and wherein the processing device is to perform operations further comprising: causing an end effector of a substrate handling robot to grip the substrate at one or more edge locations satisfying one or more of a bow criterion or a warpage criterion, wherein the one or more edge locations are indicated by the substrate topology map (Figs. 3-14, 16-19, paras. [0030], [0044]-[0048], [0050]-[0053], [0058], [0073], the substrate bow or warp map is determined by a camera, and controller uses the map to determine the spacing of the tines 350T1, 3501T2 of the end effector 350 to hold the wafer based on the bow or warp to grip the wafer at extremities or peripheral edges of the substrate). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have included wherein causing management of the substrate based on the substrate topology map comprises causing the substrate to be handled based on the substrate topology map, and wherein the processing device is to perform operations further comprising: causing an end effector of a substrate handling robot to grip the substrate at one or more edge locations satisfying one or more of a bow criterion or a warpage criterion, wherein the one or more edge locations are indicated by the substrate topology map as taught by Cavins in the non-transitory machine readable storage medium causing the processing device to perform operation as taught by Shu as modified by Wong since including wherein causing management of the substrate based on the substrate topology map comprises causing the substrate to be handled based on the substrate topology map, and wherein the processing device is to perform operations further comprising: causing an end effector of a substrate handling robot to grip the substrate at one or more edge locations satisfying one or more of a bow criterion or a warpage criterion, wherein the one or more edge locations are indicated by the substrate topology map is commonly used to provide a configurable end effector to enable support of the substrate while avoiding changing the shape of the substrate to prevent impact to substate processing (Cavins, paras. [0006], [0051]). Claim 12 is rejected under 35 U.S.C. 103 as being unpatentable over Shu as modified by Wong as applied to claim 1 above, and further in view of Fujisawa et al. (US PGPub 2004/0185662, Fujisawa hereinafter). Regarding claim 12, Shu as modified by Wong does not appear to explicitly describe wherein the processing device is further configured to: determine, based on the substrate topology map, an edge exclusion zone; and cause the substrate to be handled further based on the edge exclusion zone. Fujisawa discloses wherein the processing device is further configured to: determine, based on the substrate topology map, an edge exclusion zone (Figs. 1-6, 10, 12, 13, 15, 24, 25, 30, paras. [0010]-[0011], [0074]-[0080], [0086], [0100], [0107], [0117]-[0127], [0201], the surface shape of the wafer is determined, and the edge exclusion area is evaluated); and cause the substrate to be handled further based on the edge exclusion zone (Figs. 1-6, 10, 12, 13, 15, 24, 25, 30, paras. [0010]-[0011], [0074]-[0080], [0086], [0100], [0107], [0117]-[0127], [0201], the wafer disposition is decided based on the evaluation of the edge exclusion area, including the decision to ship or rework). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have included wherein the processing device is further configured to: determine, based on the substrate topology map, an edge exclusion zone; and cause the substrate to be handled further based on the edge exclusion zone as taught by Fujisawa in the system as taught by Shu as modified by Wong since including wherein the processing device is further configured to: determine, based on the substrate topology map, an edge exclusion zone; and cause the substrate to be handled further based on the edge exclusion zone is commonly used to obtain substrates with the required flatness to reduce CD variation (Fujisawa, paras. [0022]-[0025], [0093], [0120], [0122]). Response to Arguments Applicant’s arguments, see pages 7-8, filed 2/26/2026, with respect to the 35 U.S.C. 112(f) interpretations of “a first displacement sensor configured to measure one or more properties of a top surface of a substrate” in claim 1; “a second displacement sensor configured to measure one or more properties of a bottom surface of the substrate” in claim 10; “a first displacement sensor” in claim 13; and “a first displacement sensor” in claim 18 have been fully considered and are persuasive. The 35 U.S.C. 112(f) interpretations of “a first displacement sensor” and “a second displacement sensor” have been withdrawn. Applicant's arguments filed 2/26/2026 have been fully considered but they are not persuasive. Applicant argues on pages 8-11 that the combination of Shu in view of Wong fails to disclose, teach, or suggest “wherein the substrate topology map comprises an elevation map indicating at least one of a high spot or a low spot of the top surface of the substrate” as recited in claims 1, 13, and 18. The Examiner respectfully disagrees. Shu discloses a processing device communicatively coupled to the first displacement sensor (Figs. 3-13, paras. [0031], [0034], [0049]-[0057], [0063], [0067], [0088], [0092]-[0110], control unit 240 is coupled to the measuring unit 230), wherein the processing device is configured to: receive, from the first displacement sensor, sensor data indicative of the one or more properties of the top surface of the substrate (Figs. 3-13, paras. [0031], [0034], [0049]-[0057], [0063], [0064], [0089], [0094]-[0096], wafer flatness measuring unit 230 measures the substrate, and the control unit 240 receives data from the measuring unit); construct a substrate topology map based on the received sensor data, wherein the substrate topology map is indicative of at least one of the substrate bow or the substrate warpage (Figs. 3-13, paras. [0012]-[0013], [0031], [0033]-[0034], [0047], [0049]-[0057], [0063], [0064], [0074]-[0076], [0089], [0094]-[0096], the control unit 240 receives the flatness data from the wafer flatness measuring unit 230 and necessarily forms a map in order to control the zones of the power supply units 212 independently to clamp the wafer in a flattened state). That is, the measured flatness data in Shu includes the warpage and profile of a wafer (see at least para. [0049], and the example of Fig. 4 indicates the wafer having a bowed shape). The flatness data is transmitted to a control unit to direct each supply unit of the plurality of supply units to appropriately time the application of voltages to zones (see at least paras. [0033]-[0032], [0052], [0074]-[0076]). Although Shu discloses the substrate topology map is indicative of at least one of the substrate bow or the substrate warpage (Figs. 4, 12-13, paras. [0029]-[0030], [0034], [0049]-[0052], [0063]-[0064], [0089], [0094]-[0096], the wafer flatness measuring unit 230 measures the warpage and profile of the wafer), Shu does not appear to explicitly describe wherein the substrate topology map comprises an elevation map indicating at least one of a high spot or a low spot of the top surface of the substrate. Instead, Wong is relied upon as disclosing constructing a substrate topology map based on the received sensor data, wherein the substrate topology map is indicative of at least one of the substrate bow or the substrate warpage, wherein the substrate topology map comprises an elevation map indicating at least one of a high spot or a low spot of the top surface of the substrate (Figs. 5-8, 11, paras. [0065]-[0071], [0087]-[0088], the displacement sensor measures the displacement data of a wafer, including the presence of a concave profile, a convex profile, or a combination of convex and concave portions having higher and lower points, and the displacement measurements are used to create a displacement map of the surface of the wafer). It therefore would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have included wherein the substrate topology map comprises an elevation map indicating at least one of a high spot or a low spot of the top surface of the substrate as taught by Wong as the substrate topology map in the processing device in the system as taught by Shu since, as shown by Wong, including wherein the substrate topology map comprises an elevation map indicating at least one of a high spot or a low spot of the top surface of the substrate is commonly used in the art to accurately characterize wafer warp or bow and to control wafer processing on the basis of regional irregularities of the wafer (paras. [0002], [0008]-[0009], [0071], [0077]). The Applicant’s arguments on this point have been fully considered, but they are not persuasive. Conclusion The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. Yang (US PGPub 2005/0227587) discloses monitoring a topographical data of a wafer. Wang et al. (CN111477562) discloses measuring sampling points on a wafer to form a topographic map. Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a). A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action. Any inquiry concerning this communication or earlier communications from the examiner should be directed to CHRISTINA A. RIDDLE whose telephone number is (571)270-7538. The examiner can normally be reached M-Th 6:30AM-5PM. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Minh-Toan Ton can be reached at (571)272-2303. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /CHRISTINA A RIDDLE/Primary Examiner, Art Unit 2882
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Prosecution Timeline

Dec 27, 2023
Application Filed
Oct 28, 2025
Non-Final Rejection mailed — §103
Feb 26, 2026
Response Filed
Apr 22, 2026
Final Rejection mailed — §103
May 26, 2026
Examiner Interview Summary
May 26, 2026
Applicant Interview (Telephonic)

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3-4
Expected OA Rounds
81%
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94%
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2y 11m (~6m remaining)
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