DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
This OA is in response to the claims filled on 12/29/2023 that has been entered, wherein claims 1-20 are pending.
Information Disclosure Statement
The information disclosure statement filed 3/10/2025 and 8/28/2025 fails to comply with 37 CFR 1.98(a)(3)(i) because it does not include a concise explanation of the relevance, as it is presently understood by the individual designated in 37 CFR 1.56(c) most knowledgeable about the content of the information, of each reference listed that is not in the English language. It has been placed in the application file, but the information referred to therein has not been considered.
Specification
The title of the invention is not descriptive. A new title is required that is clearly indicative of the invention to which the claims are directed.
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claims 11-20 rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
Where applicant acts as his or her own lexicographer to specifically define a term of a claim contrary to its ordinary meaning, the written description must clearly redefine the claim term and set forth the uncommon definition so as to put one reasonably skilled in the art on notice that the applicant intended to so redefine that claim term. Process Control Corp. v. HydReclaim Corp., 190 F.3d 1350, 1357, 52 USPQ2d 1029, 1033 (Fed. Cir. 1999). The term “surrounding” in claim 11, line 5 and line 6 is used by the claim to mean “inside of,” while the accepted meaning is “to extend around the margin or edge of : encircle.” The term is indefinite because the specification does not clearly redefine the term. It is noted the term “surrounding” in claim 1, line 4 is used with the accepted meaning. For the purpose of exanimation, the limitation of “a first word line dielectric layer surrounding the first word line” will be interpreted as “ a first word line dielectric layer inside of the first word line”, Further the limitation of “a first conductive liner surrounding the first word line” will be interpreted as “a first conductive liner inside of the first word line”.
Claims 12-20 depend on claim 11 and inherit it’s deficiencies.
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
Claims 1-6 are rejected under 35 U.S.C. 102(a)(2) as being anticipated by Nishikawa et al. (US 2024/0098981 A1).
Regarding claim 1. Nishikawa teaches a semiconductor device(Figs. 1-2), comprising:
a first vertical transistor(Fig. 1), comprising:
a first channel region(10, ¶0017);
a first word line(30b, ¶0023) wrapping the first channel region(10, ¶0017);
a first word line dielectric layer(20, ¶0023) between the first channel region(10, ¶0017) and the first word line(30b, ¶0023); and
a first conductive liner(30a, ¶0023) between the first word line dielectric layer(20, ¶0023) and the first word line(30b, ¶0023).
Regarding claim 2, Nishikawa teaches the semiconductor device of Claim 1, wherein the first conductive liner(30a, ¶0023) surrounds the first word line dielectric layer(20, ¶0023).
Regarding claim 3, Nishikawa teaches the semiconductor device of Claim 2, wherein the first conductive liner(30a, ¶0023) directly contacts the first word line dielectric layer(20, ¶0023) and the first word line(30b, ¶0023).
Regarding claim 4, Nishikawa teaches the semiconductor device of Claim 1, wherein the first word line(30b, ¶0023) surrounds the first conductive liner(30a, ¶0023).
Regarding claim 5, Nishikawa teaches the semiconductor device of Claim 1, wherein a resistance(resistance of MoN, ¶0024) of the first conductive liner(30a, ¶0023) is lower than a resistance(resistance of Mo, ¶0024) of the first word line(30b, ¶0023).
Regarding claim 6, Nishikawa teaches the semiconductor device of Claim 1, wherein a width of the first conductive liner(30a, ¶0023) is greater(Fig. 1) than a width of the first word line dielectric layer(20, ¶0023).
Claims 11 and 20 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Sung et al. (KR 20090067594 A).
Regarding claim 11, Sung teaches a semiconductor device(Fig. 2), comprising:
a first vertical transistor(upper transistor), comprising:
a first channel region(101, page 2);
a first word line(46, page 2) surrounding the first channel region(101, page 2);
a first word line dielectric layer(37, page 2) surrounding the first word line(46, page 2); and
a first conductive liner(38, page 2) surrounding the first word line(46, page 2); and
a first barrier layer(not illustrated, barrier metal, page 2) on sidewalls of the first word line(46, page 2) and directly contacting the first conductive liner(38, page 2).
Regarding claim 20, Sung teaches the semiconductor device of Claim 11, further comprising a second vertical transistor(lower transistor) adjacent to the first vertical transistor(upper transistor), the second vertical transistor(lower transistor) comprising:
a second channel region(101, page 2);
a second word line surrounding(46, page 2) the first channel region(101, page 2);
a second word line dielectric layer(37, page 2) surrounding the first word line(46, page 2); and
a second conductive liner(38, page 2) surrounding the first word line(46, page 2); and
a second barrier layer(not illustrated, barrier metal, page 2) on sidewalls of the second word line(46, page 2) and directly contacting the second conductive liner(38, page 2).
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 7- 10 are rejected under 35 U.S.C. 103 as being unpatentable over Nishikawa et al. (US 2024/0098981 A1) in view of Chung et al. (US 2009/0273088 A1).
Regarding claim 7, Nishikawa teaches the semiconductor device of Claim 1, but is not relied on to teach the first conductive liner(30a, ¶0023) is partially protruded from an edge of the first word line(30b, ¶0023).
Chuang teaches a semiconductor device(Fig. 5) wherein the first conductive liner(120, ¶0030) is partially protruded from an edge of the first word line(155, ¶0030). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the device of Nishikawa, so that the first conductive liner is partially protruded from an edge of the first word line, as taught by Chaung, so that each surrounding gate can receive the gate voltage simultaneously regardless of the distance or the time from the peripheral circuit region(¶0028).
Regarding claim 8, Nishikawa teaches the semiconductor device of Claim 1, but is not relied on to teach a dielectric layer encapsulating the first vertical transistor, wherein a distance between the dielectric layer and the first conductive liner(30a, ¶0023) is less than a distance between the dielectric layer and the first word line(30b, ¶0023).
Chuang teaches a semiconductor device(Fig. 5) wherein a dielectric layer(140, ¶0035) encapsulating the first vertical transistor, wherein a distance between the dielectric layer(140, ¶0035) and the first conductive liner(120, ¶0030) is less than a distance between the dielectric layer(140, ¶0035) and the first word line(155, ¶0030). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the device of Nishikawa, to include a dielectric layer encapsulating the first vertical transistor, wherein a distance between the dielectric layer and the first conductive liner is less than a distance between the dielectric layer and the first word line, as taught by Chaung, so that each surrounding gate can receive the gate voltage simultaneously regardless of the distance or the time from the peripheral circuit region(¶0028) and to separating the buried bit line from the vertical transistor(¶0035).
Regarding claim 9, Nishikawa teaches the semiconductor device of Claim 1.
Nishikawa does not explicitly state a second vertical transistor adjacent to the first vertical transistor, the second vertical transistor comprising: a second channel region; a second word line wrapping the second channel region; a second word line dielectric layer between the second channel region and the second word line; and a second conductive liner between the second word line dielectric layer and the second word line.
However Nishikawa does state the first vertical transistor(Fig. 1) is to be used in a DRAM device(¶0022). Chaung teaches DRAM require many vertical transistors(¶0002). Duplicating the vertical transistor(Fig. 1) of Nishikawa would result in a second channel region(10, ¶0017); a second word line(30b, ¶0023) wrapping the second channel region(10, ¶0017); a second word line dielectric layer(20, ¶0023) between the second channel region(10, ¶0017) and the second word line(30b, ¶0023); and a second conductive liner(30a, ¶0023) between the second word line dielectric layer(20, ¶0023) and the second word line(30b, ¶0023). Accordingly, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to duplicate the first vertical transistor of Nishikawa, resulting in a second vertical transistor adjacent to the first vertical transistor, the second vertical transistor comprising: a second channel region; a second word line wrapping the second channel region; a second word line dielectric layer between the second channel region and the second word line; and a second conductive liner between the second word line dielectric layer and the second word line, in order to product a DRAM including many transistors in a limited region so as to improve integration(Chaung, ¶0002).
Regarding claim 10, Nishikawa teaches the semiconductor device of Claim 9, but is not relied on to teach a distance between the first conductive liner(30a, ¶0023) and the second conductive liner is less than a distance between the first word line(30b, ¶0023) and the second word line.
Chuang teaches a semiconductor device(Fig. 5) wherein a distance between the first conductive liner(120 in first row, ¶0030) and the second conductive liner(120 in second row, ¶0030) is less than a distance between the first word line(155 in first row, ¶0030) and the second word line(155 in second row, ¶0030). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the device of Nishikawa, so that a distance between the first conductive liner and the second conductive liner is less than a distance between the first word line and the second word line, as taught by Chaung, so that each surrounding gate can receive the gate voltage simultaneously regardless of the distance or the time from the peripheral circuit region(¶0028).
Allowable Subject Matter
Claims 12-19 would be allowable if rewritten to overcome the rejection(s) under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), 2nd paragraph, set forth in this Office action and to include all of the limitations of the base claim and any intervening claims.
The following is a statement of reasons for the indication of allowable subject matter:
Regarding dependent claim 12, the prior art of record neither anticipates nor renders obvious the claimed subject matter of the instant application as a whole either taken alone or in combination, in particular, prior art of record does not teach “the first barrier layer has a non-uniform width”.
Claims 13-14 depend on claim 12 and inherit it’s allowable subject matter.
Regarding dependent claim 15, the prior art of record neither anticipates nor renders obvious the claimed subject matter of the instant application as a whole either taken alone or in combination, in particular, prior art of record does not teach “the first conductive liner is partially protruded into the first barrier layer”.
Claims 16-19 depend on claim 15 and inherit it’s allowable subject matter.
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure:
Masuoka et al. (US 2010/142257 A1) Discloses a semiconductor device.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to LAURA DYKES whose telephone number is (571)270-3161. The examiner can normally be reached M-F 9:30 am-5 pm.
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/LAURA M DYKES/Examiner, Art Unit 2892
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