Notice of Pre-AIA or AIA Status
1. The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Information Disclosure Statement
2. The information disclosure statement (IDS) submitted on 12/11/24 is in compliance with the provisions of 37 CFR 1.97. Accordingly, the information disclosure statement has been considered by the examiner.
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
3. The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
4. Claims 1-6, 11-12, 14 and 17 are rejected under 35 U.S.C. 102(a)(1) as being unpatentable by Crippa et al. (US 2019/0377005). (“Crippa”).
5. Regarding claim 1, Crippa teaches A probe card for a circuit probe test system [Figures 1-5, a probe card for a circuit probe test system is shown], comprising: a probe head, the probe head comprising: a guide plate comprising a plurality of openings through the guide plate and a conductive trace extending between a pair of the openings [Figures 1-5, a probe head 10 is shown comprising a guide plate 13/14 comprising openings through the guide plate and a conductive trace 22/23 extending between a pair of the openings]; and a plurality of probe pins extending through the openings through the guide plate, wherein a pair of probe pins are electrically connected by the conductive trace to form a loopback signal path [Figures 1-5, probe pins 20 (20A, 20B) extending through the openings is shown, probe pins 20 are electrically connected by the conductive trace 22/23 which forms a loopback signal path].
6. Regarding claim 2, Crippa teaches further comprising: a substrate portion, wherein the guide plate is located below the substrate portion, and the plurality of probe pins comprises at least one first probe pin that forms a continuous conductive pathway along a length of the first probe pin between a tip end of the first probe pin and the substrate portion of the probe card [Figures 1-5, a substrate portion 15 is shown, the guide plate 13/14 is located below the substrate portion 15, probe pins 20 comprises a continuous path as shown].
7. Regarding claim 3, Crippa teaches wherein the plurality of probe pins comprises at least one second probe pin that electrically contacts the conductive trace of the guide plate [Figures 1-5, second probe pin 20B shown electrically contacting the conductive trace 22/23].
8. Regarding claim 4, Crippa teaches wherein the at least one second probe pin comprises a lower conductive portion extending from a tip end of the second probe pin to the conductive trace of the guide plate, and an insulating portion located above the lower conductive portion [Figures 1-5, see insulating portion 21].
9. Regarding claim 5, Crippa teaches wherein the at least one second probe pin comprises an upper conductive portion above the insulating portion [Figures 1-5, see upper conductive portion above the insulating portion 21].
10. Regarding claim 6, Crippa teaches wherein a length of the at least one second probe pin is equal to the length of the at least one first probe pin [Figures 1-2, a length of the first probe pin and the second probe pin being equal is shown].
11. Regarding claim 11, Crippa teaches wherein the guide plate comprises a lower guide plate, and the probe head further comprises an upper guide plate located between the substrate portion and the lower guide plate, wherein at least a portion of the probe pins extend through openings in the upper guide plate [Figures 1-5, see guide plates 13, 14].
12. Regarding claim 12, Crippa teaches wherein the conductive trace comprises a coating of a conductive material over a surface of the lower guide plate [Figures 1-5, see conductive trace 22/23].
13. Regarding claim 14, Crippa teaches wherein the substrate portion comprises a printed circuit board that is configured to transmit test signals to, and receive response signals from, a device-under-test via the plurality of probe pins to perform a circuit probe test [Figures 1-5, the substrate portion comprises a PCB].
14. Regarding claim 17, Crippa teaches A method of fabricating a probe card for a circuit probe test system [Figures 1-5, a method of fabricating a probe card for a circuit probe test system is taught], the method comprising: forming a conductive trace on and/or within a guide plate including a plurality of openings configured to receive a plurality of probe pins [Figures 1-5, a conductive trace 22/23 is formed on and/or within a guide plate 13/14, openings are shown to receive probe pins 20 (20A, 20B)]; and assembling the guide plate into a probe card comprising a substrate portion, and a probe head comprising the guide plate disposed below the substrate portion, and a plurality of probe pins extending through the openings in the guide plate such that a pair of probe pins are electrically connected by the conductive trace to form a loopback signal path [Figures 1-5, the guide plate 13/14 is assembled into a probe card comprising a substrate portion 15 (space transformer comprises substrate), a probe head 10 comprising the guide plate 13/14 is disposed below the substrate portion 15, probe pins 20 (20A, 20B) are electrically connected by the conductive trace 22/23 which forms a loopback signal path].
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
15. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
16. Claim(s) 7 is/are rejected under 35 U.S.C. 103 as being unpatentable over Crippa (US 2019/0377005).
17. Regarding claim 7, Crippa teaches the probe card.
Crippa does not explicitly teach wherein the length of the at least one first probe pin and the length of the at least one second probe pin are at least 4 mm, and a distance between the tip end of the second probe pin to the conductive trace of the guide plate is 3 mm or less.
However, it would have been obvious to one skilled in the art before the effective filing date of the invention to modify Crippa to optimize the value of length and distance because it has been held that “[W]here the general conditions of a claim are disclosed in the prior art, it is not inventive to discover the optimum or workable ranges by routine experimentation.” In re Aller, 220 F.2d 454, 456, 105 USPQ 233, 235 (CCPA 1955). (MPEP 2144.05).
18. Claims 8-10 is/are rejected under 35 U.S.C. 103 as being unpatentable over Crippa (US 2019/0377005) in view Kim Il (KR 101421051). (“Kim”).
19. Regarding claim 8, Crippa teaches wherein the plurality of probe pins comprises at least one third probe pin that electrically contacts the conductive trace of the guide plate [Figures 1-5, a third probe pin 20 is shown].
Crippa does not explicitly teach wherein a length of the at least one third probe pin is less than the length of the at least one first probe pin.
However, Kim teaches wherein a length of the at least one third probe pin is less than the length of the at least one first probe pin [Figures 1-5, probe pins 20 comprises a second pin having a second shorter length is shown, see arrow 12b’ pointing to a shorter probe pin].
It would have been obvious to one skilled in the art before the effective filing date of the invention to modify Crippa with Kim. Doing so would allow Crippa to comprise a shorter probe pin which would help obtain electrical contact with the trace and help improve testing.
20. Regarding claim 9, Crippa teaches wherein the at least one third probe pin comprises a conductive material over the length of the at least one third probe pin [Figures 1-5, see conductive third probe pin 20].
21. Regarding claim 10, Crippa teaches the probe card.
Crippa and Kim does not explicitly teach wherein the length of the at least one first probe pin is at least 4 mm, and a distance between the tip end of the third probe pin to the conductive trace of the guide plate is 3 mm or less.
However, it would have been obvious to one skilled in the art before the effective filing date of the invention to modify Crippa and Kim to optimize the value of length and distance because it has been held that “[W]here the general conditions of a claim are disclosed in the prior art, it is not inventive to discover the optimum or workable ranges by routine experimentation.” In re Aller, 220 F.2d 454, 456, 105 USPQ 233, 235 (CCPA 1955). (MPEP 2144.05).
22. Claim 15 is/are rejected under 35 U.S.C. 102(a)(1) as being unpatentable by Kim (KR 101421051).
23. Regarding claim 15, Kim teaches A probe card for a circuit probe test system [Figures 1-5, a probe card for a circuit probe test system is shown], comprising: a substrate portion [Figures 1-5, a substrate 120/130 is shown]; and a probe head comprising: a guide plate located below the substrate portion, the guide plate comprising a plurality of openings through the guide plate and at least one conductive trace extending between openings of the plurality of openings [Figures 1-5, a guide plate 110 is shown located below the substrate portion 120/130, the guide plate comprising openings through the guide plate and at least one conductive trace is 40 is shown]; and a plurality of probe pins extending through the openings through the guide plate [Figures 1-5, probe pins 20 extending through the openings through the guide plate 11/10 (110) is shown], wherein the plurality of probe pins comprises at least one first probe pin having a first length dimension that provides a continuous conductive pathway between a tip end of the first probe pin and the substrate portion of the probe card, and at least one second probe pin having a second length dimension that is less than the first length dimension that electrically contacts a conductive trace of the guide plate [Figures 1-5, probe pins 20 comprises first pin having a first continuous length is shown and second pin having a second shorter length is shown, see arrow 12b’ pointing to a shorter probe pin].
24. Claim(s) 16 is/are rejected under 35 U.S.C. 103 as being unpatentable over Kim (KR 101421051).
25. Regarding claim 16, Kim teaches the probe card.
Kim does not explicitly teach wherein the first length dimension is greater than 4 mm and the second length dimension is less than 4 mm.
However, it would have been obvious to one skilled in the art before the effective filing date of the invention to modify Kim to optimize the value of length because it has been held that “[W]here the general conditions of a claim are disclosed in the prior art, it is not inventive to discover the optimum or workable ranges by routine experimentation.” In re Aller, 220 F.2d 454, 456, 105 USPQ 233, 235 (CCPA 1955). (MPEP 2144.05).
26. Claim 19 is/are rejected under 35 U.S.C. 103 as being unpatentable over Crippa (US 2019/0377005) in view Wang et al. (US 2018/0372939). (“Wang”).
27. Regarding claim 19, Crippa teaches the probe card.
Crippa does not explicitly teach wherein forming the conductive trace on and/or within the guide plate comprises coating at least a portion of a surface of the guide plate with an electrically conductive material via at least one of physical vapor deposition, electrochemical deposition, and/or a printing process.
However, Wang teaches wherein forming the conductive trace on and/or within the guide plate comprises coating at least a portion of a surface of the guide plate with an electrically conductive material via at least one of physical vapor deposition, electrochemical deposition, and/or a printing process [Figure 12, Abstract teaches using physical vapor deposition for metal/conductive trace].
It would have been obvious to one skilled in the art before the effective filing date of the invention to modify Crippa with Wang. Doing so would allow Crippa to use PVD method for coating which would obtain strong structure.
Allowable Subject Matter
28. Claims 13 and 20 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
13. The probe card of claim 11, further comprising a membrane comprising a dielectric material having the conductive trace embedded therein that is adhered to a surface of the lower guide plate.
20. The method of claim 17, wherein forming the conductive trace on and/or within the guide plate comprises attaching a membrane comprising a dielectric material having the conductive trace embedded therein to a surface of the guide plate using an adhesive.
Pertinent Prior Art
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure.
Hsu et al. (US 9,423,424), Figures 1-7 shows a probe card arrangement comprising probe pins, guide plate, trace and openings within guide plate.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to NEEL D SHAH whose telephone number is (571)270-3766. The examiner can normally be reached M-F: 9AM-5:30PM.
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/NEEL D SHAH/Primary Examiner, Art Unit 2858
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