DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Election/Restrictions
Applicant’s election without traverse of invention I in the reply filed on 6/22/2026 is acknowledged. Claims 1-13 are examined on the merits and claims 14-20 are withdrawn.
Specification
The title of the invention is not descriptive. A new title is required that is clearly indicative of the invention to which the claims are directed. It is suggested that the title include the phrase “including shielding portions.”
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention.
Claims 1-3, 5, 8, 10, 11, and 13 are rejected under 35 U.S.C. 103 as being unpatentable over U.S. Pat. Pub. No. US 20140367160 A1 to Yu et al. (hereinafter “Yu”) in view of U.S. Pat. Pub. No. US 20230187397 A1 to Or Bach (hereinafter “Or Bach”).
Regarding claim 1, Yu teaches a package structure (fig. 15), comprising:
a device structure (as annotated below, hereinafter “device structure”; fig. 15), comprising;
a device die (layer defined by molding material 64; fig. 15);
a first redistribution layer (layer including redistribution lines 56 and 60 with dielectric layer 58 being disposed between; fig. 15) [0028], disposed on (supported by) the device die (layer of 64);
a plurality of first bonds (bonding between 56 and 28, hereinafter “upper bonding”; fig. 15), electrically connected to the first redistribution layer (layer of 56 and 60); and
a plurality of first shield portions (portions of 56 and 28 which are not in direct contact or are not participating in the bonding, hereinafter “shield 1”), peripherally (laterally) covering the plurality of first hybrid bonds (upper bonding) for shielding the plurality of first hybrid bonds (upper bonding) from electromagnetic interference (EMI) [0069],
wherein the plurality of the first shield portions (shield 1) is electrically connected (having a conductive pathway) to the device die (64) through the first redistribution layer (layer of 56 and 58); and
a wafer structure (as annotated below, hereinafter “wafer structure”), bonded (in direct contact) to the device structure (layer of 64), comprising:
a wafer substrate (package component 74, indicated in fig. 16 but present in fig. 15; fig. 15) [0032];
a second redistribution layer (layer of redistribution lines 42; fig. 15) [0019], disposed on the wafer substrate (74);
a plurality of second bonds (bonding between 28 and 42, hereinafter “lower bonding”), respectively connected (having a conductive pathway) to the second redistribution layer (42) and the plurality of first hybrid bonds (upper bonds); and
a plurality of second shield portions (portions of 42 and 28 which are not in direct contact or are not participating in the bonding, hereinafter “shield 2”), respectively connected (electrically) to the plurality of first shield portions (shield 1) and the second redistribution layer (layer of 42), peripherally (laterally) covering the plurality of second hybrid bonds (lower bonding) for shielding the plurality of second hybrid bonds (lower bonding) from EMI [0069],
wherein the plurality of second shield portions (shield 2) is electrically connected (having a conductive pathway) to the wafer substrate (74) through the second redistribution layer (layer of 42).
Yu does not teach, in the embodiment of fig. 15, that the first and second shield portions are electrically ground to the device die and wafer substrate, respectively, through their respective redistribution layers.
Yu, however, teaches, in the embodiment of fig. 31, that when the elements 28 are respectively grounded, they form a metal shield [0062]-[0065] & [0069].
I would have been obvious to a person of ordinary skill in the art before the effective filing date of the invention to modify the shield portions to be respectively grounded to allow for improved EMI protection as taught by Yu [0062]-[0065] & [0069].
Yu further does not explicitly teach that the bonds are hybrid bonds. It is noted that the as-filed specification is not clear on what hybrid bonds are.
Or Bach, however, teaches a package structure (figs. 3A-3D) wherein hybrid bonds (bonds used to adhere portions of bonded structure 390; fig. 3C) comprise metal-to-metal bonding [0082].
It would have been obvious to a person of ordinary skill in the art before the effective filing date of the invention to modify the bonding of Yu to comprise metal-to-metal bonding i.e., hybrid bonding to improve adhesion as taught by Or Bach [0082].
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Annotated fig. 15 from Yu
Regarding claim 2, Yu in view of Or Bach teaches the package structure of claim 1, wherein the plurality of first hybrid bonds (upper bonds) respectively comprises first bump pads (inner portion of 56 comprising a wide contact area) and first bonding vias (skinnier portion of 60 in physical contact with 56) connected to each other.
Regarding claim 3, Yu in view of Or Bach teaches the package structure of claim 2, wherein the plurality of first shield portions (shield 1) respectively comprises first pad shield portions (portions of 56 with a wide contact area which are outside the first hybrid bonds) and first via portions (portions of 60 peripherally connected to 56) connected to each other, wherein the first pad shield portions (portions of 56) peripherally cover the first bump pads (inner portion of 56), and the first via portions (periphery of 60) peripherally cover the first bonding vias (vias 60).
Yu in view of Or Bach, as presently modified, does not teach that the first via portions are shielding portions.
Yu, however, teaches, in the embodiment of fig. 31, the formation of a metal shield surrounding the structure [0062]-[0065] & [0069].
I would have been obvious to a person of ordinary skill in the art before the effective filing date of the invention to modify the first via portions to shield the structure to allow for improved EMI protection as taught by Yu [0062]-[0065] & [0069].
Regarding claim 5, Yu in view of Or Bach teach the package structure of claim 1, wherein the plurality of second hybrid bonds (lower bonds) respectively comprises second bump pads (portion of 42 comprising a wide contact area) and second bonding vias (skinnier portion of 42) connected to each other.
Regarding claim 8, Yu in view of Or Bach teaches the package structure of claim 1, wherein the plurality of first shield portions (shield 1) and the second shield portions (shield 2) are respectively in a circular shape (see fig. 10B) or an eclipse shape from a top view of the package structure.
Regarding claim 10, Yu teaches a package structure, comprising:
a first wafer structure (as annotated below, hereinafter “wafer structure 1”; fig. 15), comprising;
a first semiconductor substrate (die 62; fig. 15) [0029];
a first redistribution layer (layer including redistribution lines 56 and 60 with dielectric layer 58 being disposed between; fig. 15) [0028], disposed on (supported by) the first semiconductor substrate (62)
a plurality of first bonds (bonding between 56 and 28, hereinafter “upper bonding”; fig. 15), electrically connected to the first redistribution layer (layer of 56 and 60); and
a plurality of first shield portions (portions of 56 and 28 which are not in direct contact or are not participating in the bonding, hereinafter “shield 1”), peripherally (laterally) covering the plurality of first hybrid bonds (upper bonding), wherein the plurality of first shield portions (shield 1) is electrically connected (having a conductive pathway) to the first semiconductor substrate (62) through the first redistribution layer (layer of 56 and 60) for shielding [0069] the plurality of first bonds (bonds of 56 and 28) from EMI [0069]; and
a second wafer structure (as annotated below, hereinafter “wafer structure”), bonded (in direct contact) to the first wafer structure (62), comprising:
a second semiconductor substrate (package component 74, indicated in fig. 16 but present in fig. 15; fig. 15) [0032];
a second redistribution layer (layer of redistribution lines 42; fig. 15) [0019], disposed on the second semiconductor substrate (74);
a plurality of second bonds (bonding between 28 and 42, hereinafter “lower bonding”), electrically connected (having a conductive pathway) to the second redistribution layer (42) and the plurality of first hybrid bonds (upper bonds); and
a plurality of second shield portions (portions of 42 and 28 which are not in direct contact or are not participating in the bonding, hereinafter “shield 2”), peripherally (laterally) covering the plurality of second hybrid bonds (lower bonds), wherein the plurality of second shield portions (shield 2) is connected (having a conductive pathway) to the plurality of first shield portions (shield 1) and connected (having a conductive pathway) to the second semiconductor substrate (74) for shielding [0069] the plurality of second hybrid bonds (lower bonds) from EMI [0069].
Yu does not teach, in the embodiment of fig. 15, that the first and second shield portions are electrically ground to the first wafer substrate and second wafer substrate, respectively, through their respective redistribution layers.
Yu, however, teaches, in the embodiment of fig. 31, that when the elements 28 are respectively grounded, they form a metal shield [0062]-[0065] & [0069].
It would have been obvious to a person of ordinary skill in the art before the effective filing date of the invention to modify the shield portions to be receptively grounded to allow for improved EMI protection as taught by Yu [0062]-[0065] & [0069].
Yu further does not explicitly teach that the bonds are hybrid bonds. It is noted that the as-filed specification is not clear on what hybrid bonds are.
Or Bach, however, teaches a package structure (figs. 3A-3D) wherein hybrid bonds (bonds used to adhere portions of bonded structure 390; fig. 3C) comprise metal-to-metal bonding [0082].
It would have been obvious to a person of ordinary skill in the art before the effective filing date of the invention to modify the bonding of Yu to comprise metal-to-metal bonding i.e., hybrid bonding, to improve adhesion as taught by Or Bach [0082].
Regarding claim 11, Yu in view of Or Bach teaches the package structure of claim 10, wherein the plurality of the first hybrid bonds (upper bonds) comprises first bump pads (inner portion of 56 comprising a wide contact area) and the first bonding vias (skinnier portion of 60 in physical contact with 56) connected to each other, and the plurality of the second hybrid bonds (lower bonds) respectively comprise second bump pads (portion of 42 comprising a wide contact area) and the second bonding vias (skinnier portion of 42) connected (electrically) to each other, wherein the first bump pads (wide part of 56) are respectively connected (electrically) to the second bump pads (wide part of 42).
Regarding claim 13, Yu in view of Or Bach, as presently modified, does not teach the package structure of claim 10, further comprising external connection elements, wherein the first wafer structure further comprises through-vias electrically connected to the external connection elements for external electrical connection.
Yu, however, in the embodiment of fig. 17, teaches a package structure (400; fig. 17) [0035] further comprising external connection elements (206; fig. 17) [0060], wherein the first wafer structure (portion of the structure above devices 24; fig. 17) [0015] further comprises through-vias (vias of package substrate 202; fig. 17) [0040] electrically connected to the external connection elements (206) for external electrical connection [0060].
It would have been obvious to a person of ordinary skill in the art, to modify Yu, in the embodiment of fig. 15, to comprise external connection elements meeting the limitations of claim 13 to allow for devices to be stacked in a vertical direction, to increase die density, as taught by Yu [0035].
Claims 4 and 12 are rejected under 35 U.S.C. 103 as being unpatentable over Yu in view of Or Bach as applied to claims 2 and 10, respectively, above, and further in view of U.S. Pat. Pub. No. US 20220223565 A1 to Chen et al. (hereinafter “Chen”).
Regarding claim 4, Yu in view of Or Bach does not teach the package structure of claim 2, further comprising a plurality of first dummy pads respectively aligned with the first bump pads at the same vertical level in the device structure.
Chen, however, teaches a package structure (fig. 1C) [0012] comprising a plurality of first dummy pads (125; fig. 1C) [0021] respectively aligned with the first bump pads (bond pads 123; fig. 1A) [0021] at the same vertical level in the device structure (dies 104; fig. 1C) [0013].
It would have been obvious to a person of ordinary skill in the art before the effective filing date of the invention, to modify the structure of Yu in view of Or Bach to comprise dummy pads vertically aligned with bump pads to allow for metal-to-metal bonding (in the case of the dummy pads) and dielectric-to dielectric bonding (in the case of layers 119 and 219; see fig. 1A) as taught by Chen [0029].
Regarding claim 12, Yu in view of Or Bach does not teach the package structure of claim 10, wherein the first wafer structure comprises a plurality of first dummy pads, and the second wafer structure comprises a plurality of second dummy pads, wherein the plurality of first dummy pads is aligned with the second dummy pads along a thickness direction of the package structure for bonding alignment between the first wafer structure and the second wafer structure.
Chen, however, teaches a package structure (fig. 1C) [0012] wherein the first wafer structure (die 104; fig. 1C) [0013] comprises a plurality of first dummy pads (125; fig. 1C) [0021], and the second wafer structure (die 204; fig. 1C) [0024] comprises a plurality of second dummy pads (225; fig. 1C) [0026], wherein the plurality of first dummy pads (125) is aligned with the second dummy pads (225) along a thickness direction (vertical in fig. 1C) of the package structure (structure of fig. 1C) for bonding alignment [0029] between the first wafer structure (104) and the second wafer structure (204).
It would have been obvious to a person of ordinary skill in the art before the effective filing date of the invention, to modify the structure of Yu in view of Or Bach to comprise first and second dummy pads vertically aligned to allow for metal-to-metal bonding as taught by Chen [0029].
Allowable Subject Matter
Claims 6-7 and 9 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
Regarding claim 6, a reference is not found which reasonably reads on “the plurality of second shield portions respectively comprises second pad shield portions and second via shield portions connected to each other, wherein the second pad shield portions peripherally cover the second bump pads, and the second via shield portions peripherally cover the second bonding vias. The closest references found are US 20170287852 A1 to Jeon et al. and US 20160141249 A1 to Kang et al. Claim 7 comprises allowable subject matter by virtue of its dependence on claim 6.
Claim 9 comprises allowable subject matter because there is not found a reference which could read on the limitations thereof.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to ETHAN EDWARD CUTLER whose telephone number is (703)756-5415. The examiner can normally be reached Monday-Friday 7:30 am - 5:00 pm Eastern Time.
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/ETHAN EDWARD CUTLER/Examiner, Art Unit 2892
/NORMAN D RICHARDS/ Supervisory Patent Examiner, Art Unit 2892
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