DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Election/Restrictions
Applicant's election without traverse of “Group I, Species A-1, and Species B-1 (Claims 1-12 and 16)” and new Claims 21-27 in the reply filed on 04/30/2026, is acknowledged.
Claims 13-15 and 17-20 are withdrawn from further consideration pursuant to 37 CFR 1.142(b) as being drawn to a nonelected species, there being no allowable generic or linking claim.
Drawings
The drawings are objected to as failing to comply with 37 CFR 1.84(p)(4) because reference character “204C” in at least Figs. 3A and 3B has been used to designate the channel regions of fin-shaped structures “204C and 204B”. Corrected drawing sheets in compliance with 37 CFR 1.121(d) are required in reply to the Office action to avoid abandonment of the application. Any amended replacement drawing sheet should include all of the figures appearing on the immediate prior version of the sheet, even if only one figure is being amended. Each drawing sheet submitted after the filing date of an application must be labeled in the top margin as either “Replacement Sheet” or “New Sheet” pursuant to 37 CFR 1.121(d). If the changes are not accepted by the examiner, the applicant will be notified and informed of any required corrective action in the next Office action. The objection to the drawings will not be held in abeyance.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1 and 24 are rejected under 35 U.S.C. 103 as being obvious over US 2024/0332302 A1; D’silva et al.; 10/2024; (“302”) in view of US 2024/0304626 A1; Kang et al.; 09/2024; (“626”).
Regarding Claim 1. 302 teaches in Figs. 2A-2F about a method, comprising:
receiving a workpiece comprising:
a fin-shaped structure (Fig. 2A, item 204) protruding from a substrate (Fig. 2A, item 202) and comprising a channel region (Fig. 2A, regions above sub-fin items 203) and a source/drain region (Fig. 2A, regions comprised by trench items 222), and
a dummy gate stack (Fig. 2A, stack of sacrificial items 208) over the channel region (Fig. 2A, each stack of items 208 is over a channel region item 203);
recessing the source/drain region to form a source/drain trench exposing the substrate (Fig. 2B, recessing the right-side trench item 222 to form a source/drain trench item 226B exposing substrate item 202A);
forming a dielectric layer over the substrate and in the source/drain trench (Fig. 2C, dielectric item 230C is formed over the substrate and in the source/drain trench);
epitaxially forming a source/drain feature in the source/drain trench (Fig. 2D, item 234B, “epitaxial source or drain structures … 234B”, [0053], Ln. 1-2) and in direct contact with a top surface of the dielectric layer (Fig. 2D, item 234B is in direct contact with a top surface of item 230C);
replacing the dummy gate stack with a gate structure (Fig. 2E, sacrificial material items 208 are replaced with at least permanent gate structure items 254);
removing the dielectric layer and a portion of the substrate disposed directly under the dielectric layer to form a first contact opening (Fig. 2F, dielectric item 230C and a portion of substate item 252 has been removed when compared to Fig. 2D, to form contact opening item 266).
302 does not teach about a method, comprising:
forming a silicide layer in the first contact opening and under the source/drain feature; and
forming a conductive layer under the silicide layer to fill a remaining portion of the first contact opening.
626 teaches in Fig. 84 about a method, comprising:
forming a silicide layer in the first contact opening and under the source/drain feature (“in some embodiments, a metal silicide is formed at the surface of the bottom source drain regions 144 prior to filling them with the conductive material”, [0144], Ln. 6-8); and
forming a conductive layer (Fig. 84, item 172) under the silicide layer to fill a remaining portion of the first contact opening (“in general, the backside contacts 172 provide electrical connectivity to the bottom source drain regions 144”, [0144], Ln. 12-14).
Thus, it would have been obvious to try by one of ordinary skill in the art, at the time the invention was made, to consider utilizing the backside silicide layer and the conductive layer under the silicide layer of 626 to reduce contact resistance between the source/drain feature and the conductive layer in 302 as taught by 626 in Fig. 84 and [0144], Ln. 12-14).
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Fig. 2A, annotated by Examiner from D’silva et al., “302”
Regarding Claim 24. 302 teaches in Figs. 2A-2F about a method, comprising:
forming an active region (Fig. 2A, item 204) over a substrate (Fig. 2A, region item 204 is over a substrate item 202), the active region extending lengthwise along a first direction (Fig. 2A, region item 204 extent horizontally) and comprising a channel region (Fig. 2A, regions above sub-fin items 203) and a source/drain region (Fig. 2A, regions comprised by trench items 222), wherein the channel region comprises a plurality of nanostructures (Fig. 2A, region item 204 comprises a plurality of nanowire items 206);
forming a gate structure (Fig. 2E, gate structure items 254 and 256) wrapping around the plurality of nanostructures and extending lengthwise along a second direction different from the first direction (Fig. 2E, stacked structure items 254 and 256 wrap around nanostructures 206 in a vertical direction different from the horizontal direction), wherein the gate structure comprises a gate dielectric layer (Fig. 2E, item 256) and a gate electrode (Fig. 2E, item 254) over the gate dielectric layer, the gate electrode comprises a titanium-containing material (“gate electrode is composed of a metal layer such as … titanium”, [0069], Ln. 1-4);
recessing the source/drain region to form a source/drain trench (Fig. 2B, recessing the right-side region item 222 to form a source/drain trench item 226B;
forming a dielectric layer in the source/drain trench (Fig. 2C, dielectric item 230C is formed in the source/drain trench);
after the forming of the dielectric layer, epitaxially growing a semiconductor feature in the source/drain trench (Fig. 2D, item 234B, “epitaxial source or drain structures … 234B”, [0053], Ln. 1-2) and over the dielectric layer (Fig. 2D, item 234B is in direct contact with a top surface of item 230C);
removing a portion of the substrate directly under the dielectric layer to form a trench (Fig. 2F, a portion of substate item 252 has been removed when compared to Fig. 2D, to form contact opening item 256);
selectively removing the dielectric layer to enlarge the trench (Fig. 2F, dielectric item 230C has been selectively removed to enlarge opening item 266 when compared to opening item 228 of Fig. 2B “spacer portion 230C in the cavity 228 is removed selectively to form cavity 266”, [0056], Ln. 1-3).
302 does not teach about a method, comprising:
forming a silicide layer and a backside via in the trench.
626 teaches in Fig. 84 about a method, comprising:
forming a silicide layer (“in some embodiments, a metal silicide is formed at the surface of the bottom source drain regions 144 prior to filling them with the conductive material”, [0144], Ln. 6-8) and a backside via in the trench (“in general, the backside contacts 172 provide electrical connectivity to the bottom source drain regions 144”, [0144], Ln. 12-14).
Thus, it would have been obvious to try by one of ordinary skill in the art, at the time the invention was made, to consider utilizing the backside silicide layer and the backside via under the silicide layer of 626 to reduce contact resistance between the source/drain feature and the conductive layer in 302 as taught by 626 in Fig. 84 and [0144], Ln. 12-14).
Allowable Subject Matter
The following is a statement of reasons for the indication of allowable subject matter:
After completing a thorough search of independent claim 11, the prior art of record taken either singularly or in combination fails to anticipate or fairly suggest the limitations of the independent claim listed above in such a manner that a rejection under 35 U.S.C. 102 or 103 would be proper.
Regarding independent claim 11, Lee (US 2025/0062161 A1) teaches about a method, comprising:
forming a source/drain opening extending into a substrate
forming a semiconductor layer in a bottom portion of the source/drain opening;
forming a dielectric feature in the source/drain opening and on the semiconductor layer;
epitaxially growing a source/drain feature in the source/drain opening, wherein the source/drain feature is in direct contact with the dielectric feature;
removing the semiconductor layer and a portion of the substrate disposed directly under the semiconductor layer to form a trench;
selectively removing the dielectric feature to enlarge the trench;
after the selectively removing of the dielectric feature, forming a silicide layer in the enlarged trench; and
depositing a conductive layer in the enlarged trench and in direct contact with the silicide layer.
The closest prior arts on record are D’silva et al. (US 2024/0332302 A1) and Kang et al. (US 2024/0304626 A1). However, none of the existing prior arts on record teach nor would it be obvious to add a semiconductor layer in a bottom portion of the source/drain opening and then remove the semiconductor layer and a portion of the substrate disposed directly under the semiconductor layer to form a trench, with and obvious motivation or breaking the functionality of the devices or methods taught by D’silva et al. or by Kang et al.
Claims 12,16 and 21-23 are also allowed being dependent on allowable independent claim 11.
Regarding dependent claims 2-10 and 25-27 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims, since the prior art does not teach or suggest the claimed limitations.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to JORGE ANDRES LOPEZ whose telephone number is (571)272-5763. The examiner can normally be reached M-F (8:30am to 5:00pm).
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/FERNANDO L TOLEDO/Supervisory Patent Examiner, Art Unit 2897
/JORGE ANDRES LOPEZ/Examiner, Art Unit 2897
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