Prosecution Insights
Last updated: July 17, 2026
Application No. 18/405,484

Semiconductor Device and Method of Stacking and Interconnecting Semiconductor Assemblies Using Conductive Layer with Graphene Core Shells

Non-Final OA §103
Filed
Jan 05, 2024
Examiner
LEE, WOO KYUNG
Art Unit
2815
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
STATS ChipPAC Pte. Ltd.
OA Round
2 (Non-Final)
82%
Grant Probability
Favorable
2-3
OA Rounds
8m
Est. Remaining
96%
With Interview

Examiner Intelligence

Grants 82% — above average
82%
Career Allowance Rate
155 granted / 189 resolved
+14.0% vs TC avg
Moderate +14% lift
Without
With
+14.3%
Interview Lift
resolved cases with interview
Typical timeline
3y 2m
Avg Prosecution
35 currently pending
Career history
217
Total Applications
across all art units

Statute-Specific Performance

§103
84.8%
+44.8% vs TC avg
§102
8.2%
-31.8% vs TC avg
§112
7.1%
-32.9% vs TC avg
Black line = Tech Center average estimate • Based on career data from 189 resolved cases

Office Action

§103
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . This Office Action is in response to Amendment filed on April 29, 2026. Claim Objections Claim 10 is objected to because of the following informalities: On line 2, “a plurality of cores” should be amended with “a plurality of conductive cores”, in order to avoid indefiniteness due to a lack of antecedent basis. Appropriate correction is required. Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claims 1-4, 6-10 and 12 are rejected under 35 U.S.C. 103 as being unpatentable over by Pagaila et al. (US 2012/0056329, hereinafter Pagaila) in view of Suh et al. (US 2015/0287491, hereinafter Suh). Regarding claim 1, Pagaila discloses for a semiconductor device, comprising that a first electrical component (left semiconductor die or component 124, Fig. 5h); an electrical connector (left conductive pillars 164, Fig. 5h) disposed adjacent to the first electrical component (left 124, Fig. 5h); and a conductive layer (conductive layer 160, see attached Fig. 5h below) formed between the first electrical component (left 124, Fig. 5h) and electrical connector (left 164, Fig. 5h), because as shown in the attached Fig. 5h of Pagaila below, the seventh conductive layer 160 from a left side of Fig. 5h is formed between the left component 124 and the conductive pillar 218, therefore, the conductive layer 160 corresponds to the conductive layer in the claimed invention. PNG media_image1.png 636 1430 media_image1.png Greyscale Pagaila differs from the claimed invention by not showing that a conductive layer including a graphene core shell, wherein the graphene core shell includes a conductive core and a graphene coating formed over and around an outer surface of the conductive core. However, Suh discloses that a graphene-coated composite powder having excellent electric conductivity ([0053]) includes a metal core 610 and a carbon-coated layer 620 (Fig. 6). Suh further discloses that “the metal core 610 may be composed of copper, nickel, aluminum, iron, gold silver, stainless steel, tin, zinc, titanium, tantalum, an alloy thereof, or a mixture thereof, for example” and “a carbon-coated layer 620 including a multilayer graphene film” ([0060]), therefore, the electrically conductive, graphene-coated composite powder by Suh corresponds to the graphene core-shell including a conductive core and a graphene coating formed over and around an outer surface of the conductive core in the claimed invention; Suh further discloses that “such multilayer graphene-coated composite powders may be applied as a material for various applied diodes. For example, the composite powder may be applied in various fields such as an electric/electronic electrode material, a material for storing energy, a composite powder additive, a catalyst, an ink, and a paste” (emphasis added, [0066]), in view of these teachings, one of ordinary skill in the semiconductor packaging art would have recognized that the conductive electrodes/vias/layers by Pagaila could be formed using the electrically conductive composite powder by Suh. Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the conductive layer or electrode of Pagaila to comprise the electrically conductive, graphene-coated composite powder of Suh, in order to achieve high electrical conductivity, while reducing manufacturing cost. Regarding claim 2, Pagaila further discloses that a second electrical component (right semiconductor die or component 124, Fig. 5h) disposed adjacent to a side of the electrical connector (adjacent to right side of left 164, see Fig. 5h above) opposite the first electrical component (left 124, Fig. 5h); and an encapsulant (encapsulant or molding compound 172, Fig. 5h) deposited around the first electrical component (left 124, Fig. 5h), second electrical component (right 124, Fig. 5h), and electrical connector (164, Fig. 5h), wherein the conductive layer (right 160, Fig. 5h) is formed between the second electrical component (right 124, Fig. 5h) and electrical connector (right 164, Fig. 5h) over the encapsulant (over 172, Fig. 5h), because as shown in the attached Fig. 5h of Pagaila above, the seventh conductive layer 160 from a right side of Fig. 5h is formed between the right component 124 and the conductive pillar 218, therefore, the conductive layer 160 corresponds to the conductive layer in the claimed invention. Pagaila differs from the claimed invention by not showing that a conductive layer including a graphene core shell. However, Suh discloses that a graphene-coated composite powder having excellent electric conductivity ([0053]) includes a metal core 610 and a carbon-coated layer 620 (Fig. 6). Suh further discloses that “the metal core 610 may be composed of copper, nickel, aluminum, iron, gold, silver, stainless steel, tin, zinc, titanium, tantalum, an alloy thereof, or a mixture thereof, for example” ([0060]) and “a carbon-coated layer 620 including a multilayer graphene film” ([0060]), therefore, the electrically conductive, graphene-coated composite powder by Suh corresponds to the graphene core-shell in the claimed invention; Suh further discloses that “such multilayer graphene-coated composite powders may be applied as a material for various applied diodes. For example, the composite powder may be applied in various fields such as an electric/electronic electrode material, a material for storing energy, a composite powder additive, a catalyst, an ink, and a paste” (emphasis added, [0066]), in view of these teachings, one of ordinary skill in the semiconductor packaging art would have recognized that the conductive electrodes/vias/layers of Pagaila could be formed using the electrically conductive, graphene-coated composite powder by Suh. Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the conductive layer or electrode of Pagaila to comprise the electrically conductive, graphene-coated composite powder of Suh, in order to achieve high electrical conductivity, while reducing manufacturing cost. Regarding claim 3, Suh further discloses that the conductive core (610, Fig. 6) includes copper or silver, because “the metal core 610 may be composed of copper, nickel, aluminum, iron, gold, silver, stainless steel, tin, zinc, titanium, tantalum, an alloy thereof, or a mixture thereof, for example” (emphasis added, [0060]). Regarding claim 4, Suh further discloses that the conductive layer (multilayer graphene-coated layer, [0068]) includes a plurality of conductive cores (610, Fig. 6) covered by graphene (620, Fig. 6), because a plurality of the multilayer graphene-coated composite powders by Suh are dispersed in solution (Fig. 5A-B) and formed the electrically conductive layer ([0068]) and the graphene is interconnected within the conductive layer (multilayer graphene-coated layer, [0068]) to form an electrical conduction path, because “a multilayer graphene film is uniformly coated on almost all surface of the metal particle cores to prevent oxidation of internal metal particle cores, and since a multilayer graphene film-coated layer has conductivity, the composite powder also exhibits electric conductivity” ([0064]), therefore, it is obvious to one of ordinary skill in the art that the electrically conductive multilayer graphene-coated layer by Suh would be electrically conductive when the multilayer graphene is interconnected to form an electrical conduction path. Regarding claim 6, Pagaila further discloses that an insulating layer (insulating layer 148, Fig. 5h) formed over the first electrical component (left 124, Fig. 5h) and conductive layer (160, Fig. 5h); and an interconnect structure (conductive vias 146, Fig. 5h) formed over the conductive layer (160, Fig. 5h). Regarding claim 7, Pagaila further discloses for a semiconductor device, comprising that a plurality of stacked semiconductor assemblies (Fig. 3a), each semiconductor assembly (Fig. 5h) including: a first electrical component (left semiconductor die or component 124, Fig. 5h); an electrical connector (left 164, Fig. 5h) disposed adjacent to the first electrical component (left 124, Fig. 5h); and a conductive layer (conductive layer 160, Fig. 5h) including formed between the first electrical component (left 124, Fig. 5h) and electrical connector (left 164, see attached Fig. 5h above). Pagaila differs from the claimed invention by not showing that a conductive layer including a graphene core shell, wherein the graphene core shell includes a conductive core and a graphene coating formed over and around an outer surface of the conductive core. However, Suh discloses that a graphene-coated composite powder having excellent electric conductivity ([0053]) includes a metal core 610 and a carbon-coated layer 620 (Fig. 6). Suh further discloses that “the metal core 610 may be composed of copper, nickel, aluminum, iron, gold silver, stainless steel, tin, zinc, titanium, tantalum, an alloy thereof, or a mixture thereof, for example” and “a carbon-coated layer 620 including a multilayer graphene film” ([0060]), therefore, the electrically conductive, graphene-coated composite powder by Suh corresponds to the graphene core-shell including a conductive core and a graphene coating formed over and around an outer surface of the conductive core in the claimed invention; Suh further discloses that “such multilayer graphene-coated composite powders may be applied as a material for various applied diodes. For example, the composite powder may be applied in various fields such as an electric/electronic electrode material, a material for storing energy, a composite powder additive, a catalyst, an ink, and a paste” (emphasis added, [0066]), in view of these teachings, one of ordinary skill in the semiconductor packaging art would have recognized that the conductive electrodes/vias/layers of Pagaila could be formed using the electrically conductive, graphene-coated composite powder by Suh. Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the conductive layer or electrode of Pagaila to comprise the electrically conductive, graphene-coated composite powder of Suh, in order to achieve high electrical conductivity, while reducing manufacturing cost. Regarding claim 8, Pagaila further discloses that a second electrical component (right 124, Fig. 5h) disposed adjacent to a side of the electrical connector (adjacent to a side of left 164, Fig. 5h) opposite the first electrical component (left 124, Fig. 5h); and an encapsulant (encapsulant or molding compound 172, Fig. 5h) deposited around the first electrical component (left 124, Fig. 5h), second electrical component (right 124, Fig. 5h), and electrical connector (164, Fig. 5h), wherein the conductive layer (160, Fig. 5h) is formed between the second electrical component (right 124, Fig. 5h) and electrical connector (right 164, Fig. 5h) over the encapsulant (over 172, Fig. 5h). Pagaila differs from the claimed invention by not showing that a conductive layer including a graphene core shell. However, Suh discloses that a graphene-coated composite powder having excellent electric conductivity ([0053]) includes a metal core 610 and a carbon-coated layer 620 (Fig. 6). Suh further discloses that “the metal core 610 may be composed of copper, nickel, aluminum, iron, gold, silver, stainless steel, tin, zinc, titanium, tantalum, an alloy thereof, or a mixture thereof, for example” ([0060]) and “a carbon-coated layer 620 including a multilayer graphene film” ([0060]), therefore, the electrically conductive, graphene-coated composite powder by Suh corresponds to the graphene core-shell in the claimed invention; Suh further discloses that “such multilayer graphene-coated composite powders may be applied as a material for various applied diodes. For example, the composite powder may be applied in various fields such as an electric/electronic electrode material, a material for storing energy, a composite powder additive, a catalyst, an ink, and a paste” (emphasis added, [0066]), in view of these teachings, one of ordinary skill in the semiconductor packaging art would have recognized that the conductive electrodes/vias/layers of Pagaila could be formed using the electrically conductive, graphene-coated composite powder by Suh. Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the conductive layer or electrode of Pagaila to comprise the electrically conductive, graphene-coated composite powder of Suh, in order to achieve high electrical conductivity, while reducing manufacturing cost. Regarding claim 9, Suh further discloses that the conductive core (610, Fig. 6) includes copper or silver, because “the metal core 610 may be composed of copper, nickel, aluminum, iron, gold, silver, stainless steel, tin, zinc, titanium, tantalum, an alloy thereof, or a mixture thereof, for example” (emphasis added, [0060]). Regarding claim 10, Suh further discloses that the conductive layer (multilayer graphene-coated layer, [0068]) includes a plurality of cores (610, Fig. 6) covered by graphene (620, Fig. 6), because a plurality of the multilayer graphene-coated composite powders by Suh are dispersed in solution (Fig. 5A-B) and formed the electrically conductive layer ([0068]) and the graphene is interconnected within the conductive layer (multilayer graphene-coated layer, [0068]) to form an electrical conduction path, because “a multilayer graphene film is uniformly coated on almost all surface of the metal particle cores to prevent oxidation of internal metal particle cores, and since a multilayer graphene film-coated layer has conductivity, the composite powder also exhibits electric conductivity” ([0064]), therefore, it is obvious to one of ordinary skill in the art that the electrically conductive multilayer graphene-coated layer by Suh would be electrically conductive when the multilayer graphene is interconnected to form an electrical conduction path. Regarding claim 12, Pagaila further discloses that an insulating layer (insulating layer 148, Fig. 5h) formed over the first electrical component (left 124, Fig. 5h) and conductive layer (160, Fig. 5h); and an interconnect structure (conductive vias 146, Fig. 5h) formed over the conductive layer (160, Fig. 5h). Claims 5 and 11 are rejected under 35 U.S.C. 103 as being unpatentable over Pagaila et al. (US 2012/0056329, hereinafter Pagaila) in view of Suh et al. (US 2015/0287491, hereinafter Suh) as applied to claims 1 and 7 above, and further in view of Yoshida al. (WO 2022/113729, hereinafter Yoshida). The teachings of Pagaila in view of Suh are discussed above. Regarding claim 5, Pagaila in view of Suh does not explicitly disclose that the conductive layer includes thermoset material or polymer or composite epoxy type matrix and the graphene core shell is embedded within the thermoset material or polymer or composite epoxy type matrix. However, Yoshida discloses an electrically conductive resin comprising a conductive gel dispersed in the resin (see page 2 of attached machine-translated copy), the conductive gel includes a carbon-based material such as carbon black (CB), graphite (GF), carbon nanotube (CNT), carbon nanofiber (CNF), carbon nanowire (CNW), carbon fiber, and graphite (see page 3, “Gel formation” section, machine-translated copy), and the resin includes a silicone-based resin such as polydimethylsiloxane (PDMS), polyphenylmethylsilosane (PMPS), and polydiphenylsiloxane (PDPS) (see page 4, “Resin insoluble in deep eutectic liquid” section, machine-translated copy); Yoshida further discloses that “the resin insoluble in these deep eutectic liquids may be cured by any method, for example, a thermosetting resin that is cured by heat…” (emphasis added, page 4, “Resin insoluble in deep eutectic liquid” section, machine-translated copy), therefore, one of ordinary skill in the art would have recognized that the conductive vias/layers by Pagaila in view of Suh can be modified with the electrically conductive resin including thermoset material or polymer taught by Yoshida, in order to reduce manufacturing cost. Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the conductive vias/layers of Pagaila in view of Suh with the electrically conductive resin having a thermosetting material or polymer taught by Yoshida, in order to reduce manufacturing cost and achieve desired electrical conductivity. Regarding claim 11, claim 11 is rejected by the same reasons discussed in claim 5 above. Claim 13 is rejected under 35 U.S.C. 103 as being unpatentable over by Pagaila et al. (US 2012/0056329, hereinafter Pagaila) in view of Suh et al. (US 2015/0287491, hereinafter Suh) as applied to claim 7, and further in view of Gaines et al. (US 2018/0190593, hereinafter Gaines). The teachings of Pagaila in view of Suh are discussed above. Regarding claim 13, Pagaila in view of Suh does not explicitly disclose that a pulsed light transmitted onto the conductive layer. However, Gaines discloses a conductive adhesive layer for semiconductor devices and packages including metal particles and an epoxy matrix, and further discloses “the conductive sinterable metal (for example, silver, copper) nanoparticles adhesive can be cured using a photonic curing method. Photonic curing can refer to the high-temperature thermal processing of the conductive adhesive using pulsed light, for example, pulsed light from a flashlamp. Photonic curing may allow the conductive adhesive to be cured much more rapidly than with an oven” (emphasis added, [0022]). Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the electrically conductive graphene-coated composite powder by Suh to be curable using the pulsed light photonic curing technique, as disclosed by Gaines, in order to reduce processing time and manufacturing cost. Response to Arguments Applicant’s arguments with respect to claim(s) 1 and 7 have been considered but are moot because the new ground of rejection does not rely on any reference applied in the prior rejection of record for any teaching or matter specifically challenged in the argument. Conclusion Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a). A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action. Any inquiry concerning this communication or earlier communications from the examiner should be directed to WOO K LEE whose telephone number is (571)270-5816. The examiner can normally be reached Monday - Friday, 8:30 am - 5:00 pm. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, JOSHUA BENITEZ can be reached at 571-270-1435. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /JAY C KIM/Primary Examiner, Art Unit 2815 /WOO K LEE/Examiner, Art Unit 2815
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Prosecution Timeline

Jan 05, 2024
Application Filed
Apr 10, 2026
Non-Final Rejection mailed — §103
Apr 29, 2026
Response Filed
May 15, 2026
Final Rejection mailed — §103
May 19, 2026
Request for Continued Examination
May 21, 2026
Response after Non-Final Action

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Prosecution Projections

2-3
Expected OA Rounds
82%
Grant Probability
96%
With Interview (+14.3%)
3y 2m (~8m remaining)
Median Time to Grant
Moderate
PTA Risk
Based on 189 resolved cases by this examiner. Grant probability derived from career allowance rate.

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