DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Election/Restrictions
Applicant’s election of group I, claims 1-5, in the reply filed on April 8, 2026 is acknowledged. Because applicant did not distinctly and specifically point out the supposed errors in the restriction requirement, the election has been treated as an election without traverse (MPEP § 818.01(a)).
Claim 6 has been withdrawn from further consideration pursuant to 37 CFR 1.142(b) as being drawn to a nonelected invention, there being no allowable generic or linking claim. Election was made without traverse in the reply filed on April 8, 2026.
Priority
Receipt is acknowledged of certified copies of papers required by 37 CFR 1.55.
Information Disclosure Statement
The information disclosure statements (IDS) submitted on January 8, 2024 and March 10, 2026 are in compliance with the provisions of 37 CFR 1.97. Accordingly, the information disclosure statements are being considered by the examiner.
Claim Rejections - 35 USC § 112
The following is a quotation of the first paragraph of 35 U.S.C. 112(a):
(a) IN GENERAL.—The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor or joint inventor of carrying out the invention.
The following is a quotation of the first paragraph of pre-AIA 35 U.S.C. 112:
The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor of carrying out his invention.
Claim 5 is rejected under 35 U.S.C. 112(a) or 35 U.S.C. 112 (pre-AIA ), first paragraph, as failing to comply with the written description requirement. The claim(s) contains subject matter which was not described in the specification in such a way as to reasonably convey to one skilled in the relevant art that the inventor or a joint inventor, or for applications subject to pre-AIA 35 U.S.C. 112, the inventor(s), at the time the application was filed, had possession of the claimed invention. There appears to be no adequate description in the specification for the claim limitation of "the first dielectric layer is a gate dielectric layer; the poly-silicon layer is a gate electrode layer, the second dielectric layer is an interlayer dielectric layer; and the conductive layer is a metal wire layer", as recited in claim 5 (which implies that the anti-fuse structure is a part of a transistor; however, Fig. 2G shows that the first dielectric layer, the poly-silicon layer, the second dielectric layer, and the conductive layer are separated from a gate dielectric layer, a gate electrode layer, an interlayer dielectric layer; and a metal wire layer, respectively).
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claims 3-5 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
The term "substantially" in claims 3 and 4 is a relative term which renders the claim indefinite. The term "substantially" is not defined by the claim, the specification does not provide a standard for ascertaining the requisite degree, and one of ordinary skill in the art would not be reasonably apprised of the scope of the invention.
The claimed limitations of “the first dielectric layer is a gate dielectric layer; the poly-silicon layer is a gate electrode layer, the second dielectric layer is an interlayer dielectric layer; and the conductive layer is a metal wire layer”, as recited in claim 5, which indefinite and renders the claim uncertain because said limitation is inconsistent with the specification disclosure: i.e. Fig. 2G shows that the first dielectric layer, the poly-silicon layer, the second dielectric layer, and the conductive layer are separated from a gate dielectric layer, a gate electrode layer, an interlayer dielectric layer; and a metal wire layer, respectively. See MPEP §2173.03.
The following is a quotation of 35 U.S.C. 112(d):
(d) REFERENCE IN DEPENDENT FORMS.—Subject to subsection (e), a claim in dependent form shall contain a reference to a claim previously set forth and then specify a further limitation of the subject matter claimed. A claim in dependent form shall be construed to incorporate by reference all the limitations of the claim to which it refers.
The following is a quotation of pre-AIA 35 U.S.C. 112, fourth paragraph:
Subject to the following paragraph [i.e., the fifth paragraph of pre-AIA 35 U.S.C. 112], a claim in dependent form shall contain a reference to a claim previously set forth and then specify a further limitation of the subject matter claimed. A claim in dependent form shall be construed to incorporate by reference all the limitations of the claim to which it refers.
Claim 5 is rejected under 35 U.S.C. 112(d) or pre-AIA 35 U.S.C. 112, 4th paragraph, as being of improper dependent form for failing to further limit the subject matter of the claim upon which it depends, or for failing to include all the limitations of the claim upon which it depends. The claimed limitations of “a gate dielectric layer”, “a gate electrode layer”, “an interlayer dielectric layer”; and “a metal wire layer”, as recited in claim 5, fails to further limit the subject matter (i.e. "an anti-fuse structure") of the claim upon which it depends (claim 1). Applicant may cancel the claim(s), amend the claim(s) to place the claim(s) in proper dependent form, rewrite the claim(s) in independent form, or present a sufficient showing that the dependent claim(s) complies with the statutory requirements.
Claim Rejections - 35 USC § 102/103
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention.
Claim(s) 1-5, as best understood, is/are rejected under 35 U.S.C. 102(a)(1) as anticipated by or, in the alternative, under 35 U.S.C. 103 as obvious over Min et al. (2010/0213570) in view of Nishimura et al. (2009/0230448).
As for claim 1, Min et al. show in Figs. 1, 3, 4, 8, 9 and related text an anti-fuse structure 40, comprising:
a substrate 21’ having a substrate surface;
a shallow trench isolation (STI) area 42, passing through the substrate surface 29’ and extending downward into the substrate, wherein the STI area has a top surface and recess 46 extending downward from the top surface;
a first dielectric layer 44 (Fig. 8: 440), disposed above the STI area and covering the top surface and a corner that is formed by a vertical sidewall of the recess and the top surface;
a poly-silicon layer 26’ (Fig. 9: 260), disposed above the first dielectric layer and covering the corner;
a second dielectric layer (blank region between the top surface of 26’ and a horizontal wire line connected to 34’; not shown), disposed above the poly-silicon layer and covering the corner; and
a conductive layer (the horizontal wire line connected from 23 to 34’; [0025]), disposed above the second dielectric layer and covering the corner.
Alternative, Nishimura et al. teach in Fig. 19 and related text a second dielectric layer 141, disposed above the poly-silicon layer 128 and covering the (corner) STI area 125; and
a conductive layer 143, disposed above the second dielectric layer and covering the (corner) STI area.
Min et al. and Nishimura et al. are analogous art because they are directed to an anti-fuse structure and one of ordinary skill in the art would have had a reasonable expectation of success to modify Nishimura et al. with the specified feature(s) of Min et al. because they are from the same field of endeavor.
It would have been obvious to one of ordinary skill in the art, before the effective filing date of the claimed invention to include a second dielectric layer, disposed above the poly-silicon layer and covering the (corner) STI area; and a conductive layer, disposed above the second dielectric layer and covering the (corner) STI area, as taught by Nishimura et al., in Min et al. 's device, in order to distribute power and signals and improve device performance and power efficiency.
As for claim 2, the combined device shows a first distance between a portion of the poly-silicon layer corresponding to the corner and the conductive layer is lower than a second distance between another portion of the poly-silicon layer away from the corner and the conductive layer (Min: Fig. 3).
As for claim 3, the combined device shows the portion of the poly-silicon layer corresponding to the corner has an initial resistance; after applying a programming voltage to the conductive layer, the portion of the poly-silicon layer corresponding to the corner has a programming resistance, and the programming resistance is substantially less than the initial resistance (Min: [0002]).
Regarding the limitations ("after applying a programming voltage to the conductive layer, the portion of the poly-silicon layer corresponding to the corner has a programming resistance, and the programming resistance is substantially less than the initial resistance") these would not carry patentable weight in this claim drawn to a structure, because distinct structure is not necessarily produced. A claim containing a "recitation with respect to the manner in which a claimed apparatus is intended to be employed does not differentiate the claimed apparatus from a prior art apparatus" if the prior art apparatus teaches all the structural limitations of the claim. Ex parte Masham, 2 USPQ2d 1647 (Bd. Pat. App. & Inter. 1987). Furthermore, claims directed to apparatus must be distinguished from the prior art in terms of structure rather than function. In re Danley, 120 USPQ 528, 531 (CCPA 1959). "Apparatus claims cover what a device is, not what a device does." Hewlett -Packard Co. v. Bausch & Lomb Inc., 15 USPQ2d 1525, 1528 (Fed. Cir. 1990).
As for claim 2, the combined device shows the programming voltage substantially ranges between -3.3V and 7.5V (Min: Fig. 4).
Regarding the limitations ("the programming voltage substantially ranges between -3.3V and 7.5V") these would not carry patentable weight in this claim drawn to a structure, because distinct structure is not necessarily produced. A claim containing a "recitation with respect to the manner in which a claimed apparatus is intended to be employed does not differentiate the claimed apparatus from a prior art apparatus" if the prior art apparatus teaches all the structural limitations of the claim. Ex parte Masham, 2 USPQ2d 1647 (Bd. Pat. App. & Inter. 1987). Furthermore, claims directed to apparatus must be distinguished from the prior art in terms of structure rather than function. In re Danley, 120 USPQ 528, 531 (CCPA 1959). "Apparatus claims cover what a device is, not what a device does." Hewlett -Packard Co. v. Bausch & Lomb Inc., 15 USPQ2d 1525, 1528 (Fed. Cir. 1990).
As for claim 5, the combined device shows the first dielectric layer is a gate dielectric layer;
the poly-silicon layer is a gate electrode layer;
the second dielectric layer is an interlayer dielectric layer (ILD); and
the conductive layer is a metal wire layer (Min: Fig. 3; Nishimura: Fig. 19).
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to MEIYA LI whose telephone number is (571)270-1572. The examiner can normally be reached Monday-Friday 7AM-3PM.
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/MEIYA LI/Primary Examiner, Art Unit 2811
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