DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
This office action is in response to the amendment filed on 05/28/26. Claims 1-25 are pending. Claims 1-13 are withdrawn.
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claim(s) 14-25 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Tang et al. (US PGPub 2020/0118971, hereinafter referred to as “Tang”).
Tang discloses the semiconductor device as claimed. See figures 1-24 and corresponding text, where Tang teaches, in claim 14, a semiconductor device, comprising: (figures 1-2; [0027-0033])
an integrated passive device (IPD) die (128) including an IPD formed on the IPD die; a semiconductor die (102) mounted on the IPD die; an interconnect structure (108) mounted on the IPD die;
an encapsulant (104) deposited over the IPD die (128) with the interconnect structure (108) exposed from the encapsulant; and
a shielding layer (110) (functions as a shielding portion antenna) formed over the encapsulant.
Tang teaches, in claim 15, further including a second interconnect structure disposed adjacent to the IPD die, wherein the encapsulant is deposited over the IPD die and second interconnect structure (figures 1-2; [0027-0033]).
Tang teaches, in claim 16, further including a build-up interconnect structure formed over the IPD die and encapsulant (figures 1-2; [0027-0033]).
Tang teaches, in claim 17, wherein the IPD die includes a conductive via formed through the IPD die (figures 1-2; [0027-0033]).
Tang teaches, in claim 18, wherein the shielding layer includes an embedded backside RDL plane (figures 1-2; [0027-0033]).
Tang teaches, in claim 19, further including a solder or solder paste deposited over the interconnect structure (figures 1-2; [0027-0033]).
Tang teaches, in claim 20, a semiconductor device, comprising:
(figures 1-2; [0027-0033])
an integrated passive device (IPD) die; a semiconductor die mounted on the IPD die; an encapsulant deposited over the IPD die; and a shielding layer formed over the encapsulant.
Tang teaches, in claim 21, further including an interconnect structure disposed adjacent to the IPD die, wherein the encapsulant is deposited over the IPD die and interconnect structure (figures 1-2; [0027-0033]).
Tang teaches, in claim 22, further including a build-up interconnect structure formed over the IPD die and encapsulant.
Tang teaches, in claim 23, wherein the IPD die includes a conductive via formed through the IPD die (figures 1-2; [0027-0033]).
Tang teaches, in claim 24, further including: an interconnect structure disposed over the IPD die; Anda solder or solder paste disposed over the interconnect structure (figures 1-2; [0027-0033]).
Tang teaches, in claim 25, wherein the shielding layer includes a backside RDL plane (figures 1-2; [0027-0033]).
Response to Arguments
Applicant's arguments filed on 5/28/26 have been fully considered but they are not persuasive. In the remarks the applicant raises the clear issue as to whether Tang suggests or render obvious an integrated passive device (IPD) die including an IPD formed on the IPD die; a shielding layer formed over a side surface of the encapsulant and directly on a second surface of the IPD die opposite the first surface.
The examiner views that Tang does suggest the above limitation and/or statements. Specifically, Tang teaches a passive device (128) formed on an IC die (102) (figures 3A-3C; [0034-0037]). In addition, the shielding layer (110a) is formed above and directly contacting the molding material (figures 3A-3C; [0034-0037]). The examiner would like to point out that Tang teaches, in paragraph ([0034]), that the mounted devices are adapted to communicate with and/or control functions of the antenna and takes official notice that a integrate passive device (IPD) is included.
Conclusion
THIS ACTION IS MADE FINAL. Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to STANETTA D ISAAC whose telephone number is (571)272-1671. The examiner can normally be reached M-F 10-6.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Leonard Chang can be reached at 571-270-3691. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/STANETTA D ISAAC/Examiner, Art Unit 2898 August 12, 2026
/Leonard Chang/Supervisory Patent Examiner, Art Unit 2898
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