Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Election/Restrictions
Applicant’s election without traverse of Claims 1-16 and 21-24 in the reply filed on 5/4/2026 is acknowledged.
Claims 17-20 have withdrawn from further consideration pursuant to 37 CFR 1.142(b) as being drawn to a nonelected process claims, there being no allowable generic or linking claim. Election was made without traverse in the reply filed on 5/4/2024.
Information Disclosure Statement
The information disclosure statement (IDS) submitted on 1/9/2024 and 2/12/2025 were filed after the mailing date of the Non-final rejection on 7/10/2026. The submission is in compliance with the provisions of 37 CFR 1.97. Accordingly, the information disclosure statement is being considered by the examiner.
Drawings
The formal drawings filed on 1/9/2024 have been approved by the examiner.
Specification
The title of the invention is not descriptive. A new title is required that is clearly indicative of the invention to which the claims are directed.
The following title is suggested: “ METHOD OF FABRICATING A SEMICONDUCTOR DEVICE WITH HYBRID SUBSTRATE ”.
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claims 13 and 21-24 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
With respect to Claims 13 and 21, the phrase “thickening the second semiconductor substrate in the first region ” is vague and indefinite since it is not clear from the claim how or what process step makes the second semiconductor substrate thicker.
Allowable Subject Matter
9. Claims 1-12 and 14-16 are allowed.
10. Claims 17-20 would be allowable if rewritten or amended to overcome the
rejection(s) under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), 2nd paragraph, set forth
in this Office action.
The following is a statement of reasons for the indication of allowance subject
matter: none of the prior art of record teaches or suggest the combination of forming a plurality of inner spacer features in the plurality of inner spacer recesses. The epitaxial feature being in contact with the plurality of channel layers, the epitaxial feature having (110) orientation. After the forming of the epitaxial feature, removing the dummy gate stack; releasing the plurality of channel layers in the channel region as a plurality of channel members. Forming a gate structure wrapping around each of the plurality of channel members in claim 1.
Depositing an epitaxial feature over the dielectric film. The epitaxial feature being in contact with the plurality of channel members. The epitaxial feature having a top surface in a (110) crystal plane. Forming a gate structure wrapping around each of the plurality of channel members in claim 10.
Patterning the stack and the first semiconductor substrate to form a first fin-shape structure in the first region. The second semiconductor substrate and the first semiconductor substrate to form a second fin-shape structure in the second region. Recessing a source/drain region of the first fin-shape structure to form a first source/drain trench in the first region and a source/drain region of the second fin-shape structure to form a second source/drain trench in the second region. The first epitaxial feature having (100) orientation, the second epitaxial feature having (110) orientation; removing the first and second dummy gate stacks; removing the sacrificial layers from the first and second regions to release the channel layers as channel members; and forming a first gate structure and a second gate structure wrapping around the channel members in the first and second regions, respectively in claim 21.
Conclusion
11. Any inquiry concerning the communication or earlier communications from the
examiner should be directed to Alonzo Chambliss whose telephone number is (571)
272-1927.
If attempts to reach the examiner by telephone are unsuccessful, the examiner's
supervisor, Jacob Y. Choi can be reached on (469) 295-9060. The fax phone number
for the organization where this application or proceeding is assigned is (571) 273-8300.
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AC/July 10, 2026 /Alonzo Chambliss/
Primary Examiner, Art Unit 2897
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