DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claim(s) 1, 3, 6, 8-15, 18-20 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Baek et al US 2018/0053732.
Pertaining to claim 1, Baek teaches a semiconductor package, comprising:
a redistribution structure see Figure 9 marked up below comprising:
a first conductive pad comprising a first side and a second side opposite to the first side see Figure 9 marked up below;
a first conductive via landing on the first side of the first conductive pad, the first conductive via tapering in a direction from the first side toward the second side of the first conductive pad see Figure 9 marked up below;
a second conductive via landing on the second side of the first conductive pad, the second conductive via tapering in a direction from the second side toward the first side of the first conductive pad see Figure 9 marked up below; and
a first dielectric layer laterally covering the first conductive pad and the first conductive via, the first dielectric layer comprising a first surface and a second surface opposite to the first surface; and
an encapsulated die 121 electrically connected to the redistribution structure and disposed below the first side of the first conductive via of the redistribution structure see Figure 9 marked up below.
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Pertaining to claim 3, Baek teaches the semiconductor package of claim 1, wherein the redistribution structure further comprises:
a second conductive pad (demarked by element 112b in Figure 9) connected to the first conductive via 113a, a first contacting area of the first conductive via connected to the second conductive pad is greater (the top of 113a is wider than the bottom) than a second contacting area of the first conductive via connected to the first conductive pad. See Figure 9 marked up above
Pertaining to claim 6, Baek teaches the semiconductor package of claim 1, wherein the redistribution structure further comprises:
a third conductive pad connected to the second conductive via, a first contacting area of the second conductive via connected to the third conductive pad is greater than a second contacting area of the first conductive via connected to the first conductive pad. See Figure 9 marked up below that illustrates the first second and third pads and the via taper for the first and second vias.
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Pertaining to claim 8, Baek teaches the semiconductor package of claim 1, wherein the encapsulated die 121 comprises:
a semiconductor die 121; and
an encapsulant 130 laterally encapsulating the semiconductor die, an outer sidewall of the encapsulant being substantially aligned with an outer sidewall of the redistribution structure Note that 130 extends to the lateral side of 100A and that it aligns with the sidewall of the redistribution structure.
Pertaining to claim 9, Baek teaches the semiconductor package of claim 8, further comprising:
a conductive connector 170 covered by the encapsulant 130 (note “covered” is overly broad and element 130 is placed ‘above’ element 170 and thus is considered to “cover” the element) and electrically connected to the redistribution structure.
Pertaining to claim 10, Baek teaches the semiconductor package of claim 9, wherein the conductive connector 170 comprises a solder material [0102].
Pertaining to claim 11, Baek teaches a semiconductor package, comprising:
a redistribution structure comprising:
a lower portion comprising:
a first conductive pad and a first conductive via connected to the first conductive pad, the first conductive via comprising a first lateral dimension decreasing in a direction from the lower portion toward the upper portion;
a lower dielectric layer wrapping around the first conductive pad and the first conductive via; and
an upper portion disposed on and electrically connected to the lower portion, the upper portion comprising:
a second conductive via comprising a second lateral dimension decreasing in a direction from the upper portion toward the lower portion; and
an encapsulated die disposed below the lower portion of the redistribution structure and electrically connected to the redistribution structure. All elements are illustrated in marked up Figures 9 below (note this is a different interpretation than independent claim 1).
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Pertaining to claim 12, Baek teaches the semiconductor package of claim 11, wherein the lower dielectric layer 141 is substantially coplanar with the first conductive pad 112a see Figure 9
Pertaining to claim 13, Baek teaches the semiconductor package of claim 12, wherein the upper portion of the redistribution structure further comprises:
an upper dielectric layer 111 disposed on the lower dielectric layer 141 and laterally covering the second conductive via See Figure 9 marked up in the rejection of claim 11 above.
Pertaining to claim 14, Baek teaches the semiconductor package of claim 13, wherein the upper portion of the redistribution structure further comprises:
a second conductive pad disposed on and connected to the second conductive via, the second conductive pad extending on (on is broad) the upper dielectric layer. See Figure 9 marked up below
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Pertaining to claim 15, Baek teaches the semiconductor package of claim 11, wherein the encapsulated die comprises:
a semiconductor die 121; and
an encapsulant laterally 130 encapsulating the semiconductor die, an outer sidewall of the encapsulant being substantially aligned with an outer sidewall of the redistribution structure. See Figure 9 marked up below
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Pertaining to claim 18, Baek teaches a semiconductor package, comprising:
a semiconductor die 121 comprising an active side, a rear side opposite to the active side, and a sidewall connected to the active and rear sides See Figure 9 marked up below;
a redistribution structure 110a/b connected to the active side of the semiconductor die 121, the redistribution structure comprising:
a first conductive pad 112a;
a first conductive via and a second conductive via landing on two opposing sides of the first conductive pad, the first conductive via tapering in a first direction from the rear side toward the active side of the semiconductor die, the second conductive via tapering in a second direction opposite to the first direction see Figure 9 marked up below; and
a first dielectric layer 141 laterally covering the second conductive via see Figure 9 marked up below, the first conductive pad extending on the first dielectric layer pad 112a extends along 141 see Figure 9; and
an encapsulant 130 disposed below the redistribution structure (130 is below the redistribution structure as shown in Figure 9) and extending along the sidewall of the semiconductor die See Figure 9 130 extends along die 121, the encapsulant comprising an outer sidewall substantially aligned with an outer sidewall of the redistribution structure see Figure 9 marked up below.
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Pertaining to claim 19, Baek teaches the semiconductor package of claim 18, wherein the redistribution structure further comprises:
a second dielectric layer 11a disposed below the first dielectric layer 141 and laterally covering the first conductive pad and the first conductive via see Figure 9 marked up above in the rejection of claim 18.
Pertaining to claim 20, Baek teaches the semiconductor package of claim 18, wherein the redistribution structure further comprises:
a second conductive pad disposed on and connected to the second conductive via, the second conductive pad extending on the first dielectric layer. The second pad is demarcated on Figure 9 above in the rejection of claim 18.
Allowable Subject Matter
Claims 2, 4, 5, 7, 16 and 17 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
The prior art does not teach or suggest either alone or in combination:
Pertaining to claim 2, wherein the second surface of the first dielectric layer is substantially coplanar with the second side of the first conductive pad.
Pertaining to claim 4, wherein the second conductive pad extends on the first surface of the first dielectric layer.
Pertaining to claim 5, a second dielectric layer disposed below the first dielectric layer and laterally covering the second conductive pad
Pertaining to claim 7, wherein the redistribution structure further comprises: a third dielectric layer disposed on the first dielectric layer and laterally covering the second conductive via, the third dielectric layer being below the third conductive pad.
Pertaining to claim 16, further comprising: a conductive connector electrically connected to the redistribution structure, the conductive connector comprising a curved sidewall covered by the encapsulant.
Pertaining to claim 17, a conductive connector comprising a pillar portion laterally encapsulated by the encapsulant and a cap portion connected to the pillar portion and protruded from the encapsulant.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to NICHOLAS J TOBERGTE whose telephone number is (571)272-6458. The examiner can normally be reached M-F 7:30-4:30.
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/NICHOLAS J TOBERGTE/Primary Examiner, Art Unit 2817
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