Prosecution Insights
Last updated: July 17, 2026
Application No. 18/409,801

MICRO-ELECTRO-MECHANICAL SYSTEM PACKAGE AND FABRICATION METHOD THEREOF

Non-Final OA §102§112
Filed
Jan 11, 2024
Examiner
MALSAWMA, LALRINFAMKIM HMAR
Art Unit
2892
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Vanguard International Semiconductor Corporation
OA Round
1 (Non-Final)
90%
Grant Probability
Favorable
1-2
OA Rounds
0m
Est. Remaining
99%
With Interview

Examiner Intelligence

Grants 90% — above average
90%
Career Allowance Rate
991 granted / 1096 resolved
+22.4% vs TC avg
Moderate +9% lift
Without
With
+8.9%
Interview Lift
resolved cases with interview
Fast prosecutor
2y 1m
Avg Prosecution
29 currently pending
Career history
1129
Total Applications
across all art units

Statute-Specific Performance

§101
1.4%
-38.6% vs TC avg
§103
61.6%
+21.6% vs TC avg
§102
18.7%
-21.3% vs TC avg
§112
3.8%
-36.2% vs TC avg
Black line = Tech Center average estimate • Based on career data from 1096 resolved cases

Office Action

§102 §112
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Election/Restrictions Applicant’s election without traverse of Group I (claims 1-10) in the reply filed on 04/14/2016 is acknowledged. Claims 11-20 are withdrawn from further consideration pursuant to 37 CFR 1.142(b) as being drawn to a nonelected invention, there being no allowable generic or linking claim. Election was made without traverse in the reply filed on 04/14/2026. Claim Rejections - 35 USC § 112 The following is a quotation of 35 U.S.C. 112(b): (b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention. The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph: The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention. Claims 7-9 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention. Claim 7 recites the limitation "the second MEMS layer" in line 2. There is insufficient antecedent basis for this limitation in the claim. Claims 8-9 are indefinite because they depend from indefinite claim 7. For the purpose of examination, “the second MEMS layer” will be interpreted to be any layer of the MEMS package. Specification The title of the invention is not descriptive. A new title is required that is clearly indicative of the invention to which the claims are directed. For example, a more descriptive title could be, “Micro-Electromechanical System Package With Device Layers Having Different Thicknesses”. PNG media_image1.png 396 693 media_image1.png Greyscale Claim Rejections - 35 USC § 102 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. Claim(s) 1-10 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Cheng et al. (US 2015/0166331 A1; hereinafter, “Cheng”). Regarding claims 1-10: re claim 1, Cheng discloses (in Fig. 3) a micro-electro-mechanical system (MEMS) package, comprising: a wafer 203 [0016] with an interconnect layer (see “interconnect layer” in Exhibit A); a first device layer (see “first device layer” in Exhibit A) comprising a first MEMS device 105 (e.g., a gyroscope [0015]) having a first thickness (e.g., note the first thickness is greater than the “vertical thickness reference line” in Exhibit A), disposed on the wafer and bonded to the interconnect layer; a second device layer (see “second device layer” in Exhibit A) comprising a second MEMS device 103 [0015] having a second thickness thinner than the first thickness (e.g., note the second thickness is exactly at the “vertical thickness reference line” in Exhibit A), laterally spaced apart from the first device layer, disposed on the wafer and bonded to the interconnect layer; a first cap substrate 127b (Fig. 3 and [0013]) with a first cavity 111b (Fig. 3 and [0011]), bonded to the first device layer (see Exhibit A and [0013], wherein capping portions 127a-127c are eutectic bonded), wherein the first MEMS device 105 corresponds to the first cavity 111b; and a second cap substrate 127a (Fig. 3 and [0013]) with a second cavity 111a, laterally spaced apart from the first cap substrate 127b (e.g.., laterally spaced apart by element 123b, Fig. 3 and [0012]), and bonded to the second device layer, wherein the second MEMS device 103 corresponds to the second cavity 111a (see Exhibit A); re claim 2, the MEMS package of claim 1, wherein the second device layer comprises a second device portion (see “second device portion” in Exhibit A) and a second peripheral portion (see “second peripheral portion” in Exhibit A), the second device portion is located directly below the second cavity 111a and has the second thickness, and the second peripheral portion is bonded to the second cap substrate 127a and has the first thickness (note the three boxed regions of equal “first thickness” in Exhibit A, e.g., any thickness could be chosen in Fig. 3 to read on the current claim, i.e., “a thickness” would not specifically require a maximum thickness, a minimum thickness, a partial thickness, etc.); re claim 3, the MEMS package of claim 1, wherein the first device layer comprises a first device portion (see “first device portion” in Exhibit A) and a first peripheral portion (see “first peripheral portion” in Exhibit A), the first device portion is located directly below the first cavity 111b, the first peripheral portion is bonded to the first cap substrate 127b, and both the first device portion and the first peripheral portion have the first thickness; re claim 4, the MEMS package of claim 1, wherein the second device layer (see “second device layer” in Exhibit A) comprises a recessed portion connected to the second cavity 111a (i.e., there a recesses/spaces/gaps between portion of the “second device layer”, Exhibit A); PNG media_image2.png 400 693 media_image2.png Greyscale re claim 5, Initially, with respect to this claim, the limitations in claim 1 are reinterpreted to map the first MEMS device to the accelerometer 103 (Figs. 1, 3, Exhibit B and [0015]) and the second MEMS device to gyroscope 105 (Figs. 1, 3, Exhibit B and [0015]), wherein a “first thickness” and “a second thickness” is chosen as shown in Exhibit B. Therefore, Cheng discloses the MEMS package of claim 1, wherein the first MEMS device 103 comprises an accelerometer [0015], the second MEMS device 105 comprises a gyroscope [0015], the first cavity 111a has a first pressure (for an accelerometer), and the second cavity 111b has a second pressure (for a gyroscope) lower than the first pressure (i.e., a MEMS gyroscope require very low pressure, whereas a MEMS accelerometer requires pressure in order to function properly, e.g., in order to prevent mechanical ringing); re claim 6, the MEMS package of claim 1, further comprising: a first bond seal ring (e.g., the hashed elements between wafer 203 and the first and second device layers shown in Exhibits A, B, and Fig. 3), disposed between the first device layer and the wafer, and bonded to the interconnect layer (i.e., the interconnect layer is considered to be a lower half to the hashed elements); and a second bond seal ring (e.g.., upper half of the hashed elements), disposed between the second device layer and the wafer, and bonded to the interconnect layer (e.g., lower half of the hashed elements); re claim 7(as interpreted), the MEMS package of claim 1, wherein the second cap substrate 127a (Fig. 3) comprises a first stopper (see “first stopper” in Exhibit C) disposed in the second cavity 111a, and the second MEMS layer comprises a second stopper (see “second stopper” in Exhibit C) corresponding to the first stopper; re claim 8(as interpreted), the MEMS package of claim 7, wherein the first stopper is connected with a bottom surface of the second cavity 111a, the second stopper is connected with a top surface (see “a top surface” in Exhibit C) of the second MEMS device and bonded to the first stopper (i.e., the package is rigidly bonded; accordingly, the second stopper is bonded to the first stopper at very least through the second device layer); re claim 9(as interpreted), the MEMS package of claim 7, wherein the wafer comprises a third stopper (see “third stopper” in Exhibit C) disposed on the interconnect layer (see “interconnect layer” in Exhibit C), the third stopper corresponds to the second stopper and is in contact with a bottom surface (see “a bottom surface” in Exhibit C) of the second MEMS device; and PNG media_image3.png 864 764 media_image3.png Greyscale re claim 10, the MEMS package of claim 1, further comprising: a third device layer comprising a third MEMS device 107 (see Exhibit B and [0015]) having a third thickness (see “a third thickness” in Exhibit B) different from the first thickness and the second thickness, laterally spaced apart from the first device layer and the second device layer, disposed on the wafer and bonded to the interconnect layer; and a third cap substrate 127c with a third cavity 111c, laterally spaced apart (e.g., by element 123d) from the first cap substrate 127a and the second cap substrate 127b, and bonded to the third device layer, wherein the third MEMS device corresponds to the third cavity, wherein the first cavity 111a has a first pressure (for an accelerometer, see Fig. 1), the second cavity has a second pressure (for a gyroscope) lower than the first pressure, and the third cavity has a third pressure (for a pressure sensor exposed to atmosphere by two openings in Fig. 1) different from the first pressure and the second pressure (i.e., a MEMS gyroscope require very low pressure, whereas a MEMS accelerometer requires pressure in order to function properly, e.g., in order to prevent mechanical ringing; and the third MEMS device is a pressure sensor that is opened to atmosphere; accordingly, the third pressure will be different at some time when measuring higher pressure, e.g., when measuring pressure above atmospheric pressure). Therefore, claims 1-10 are anticipated by Cheng. Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to LEX H MALSAWMA whose telephone number is (571)272-1903. The examiner can normally be reached M-F (4-12 Hours, between 5:30AM-10PM). Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, N. Drew Richards can be reached at 571-272-1736. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /LEX H MALSAWMA/Primary Examiner, Art Unit 2892
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Prosecution Timeline

Jan 11, 2024
Application Filed
Jul 01, 2026
Non-Final Rejection mailed — §102, §112 (current)

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
90%
Grant Probability
99%
With Interview (+8.9%)
2y 1m (~0m remaining)
Median Time to Grant
Low
PTA Risk
Based on 1096 resolved cases by this examiner. Grant probability derived from career allowance rate.

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