DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
Response to Amendment
Applicant's amendment to the claims, filed on May 29th, 2026, is acknowledged. Entry of amendment is accepted and made of record.
Election/Restrictions
Applicant's election without traverse of Invention I and Species A directed to Fig. 2A-2H (Claims 1-16 and 17) in the reply filed on May 29th, 2026 is acknowledged.
Claim Objections
Claims 1 and 9 are objected to because of the following informalities:
Claim 1 recites “the nanosheets” in lines 3, 9 and 10-11 which referring back to “a plurality of nanosheets” in line 2 and should be amended to “the plurality of nanosheets” for avoiding confusion. Appropriate correction is required.
Claim 1 recites “S/D” in line 7 which contains abbreviation and should be amended to “source/drain (S/D)” to avoiding confusion and addressing related issues with claims 2 and 6-8. Appropriate correction is required.
Claim 9 recites “the first nanosheets” in lines 3 and 9 which referring back to “a plurality of first nanosheets” in line 3 and should be amended to “the plurality of first nanosheets” for avoiding confusion. Appropriate correction is required.
Claim 9 recites “the second nanosheets” in lines 15 and 17-18 which referring back to “a plurality of second nanosheets” in line 12 and should be amended to “the plurality of second nanosheets” for avoiding confusion. Appropriate correction is required.
Claim 9 recites “S/D” in line 8 which contains abbreviation and should be amended to “source/drain (S/D)” to avoiding confusion and addressing related issues with claims 10 and 16. Appropriate correction is required.
Claim 9 recites “S/D” in line 8 which contains abbreviation and should be amended to “source/drain (S/D)” to avoiding confusion and addressing related issues with claims 10 and 16. Appropriate correction is required.
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
Claim 5 is rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor, or for pre-AIA the applicant regards as the invention.
Claim 5 recites “the stepped structure contacts the first epitaxial portion and the second epitaxial portion” which contradicts claim 2 because claim 2 recites the stepped structure includes the first epitaxial portion and the second epitaxial portion. It is unclear to the examiner how can the stepped structure contacts the first epitaxial portion and the second epitaxial portion if they are parts of the stepped structure.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale or otherwise available to the public before the effective filing date of the claimed invention.
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
Claims 9 and 16 are rejected under 35 U.S.C. 102(a)(2) as being anticipated by NARASIMHA et al. (Pub. No.: US 2024/0421209 A1), hereinafter as NARASIMHA
Regarding claim 9, NARASIMHA discloses a semiconductor structure in Fig. 4A, comprising: a first transistor (GAA device 410), comprising: a plurality of first nanosheets (channels 134), disposed over a substrate (substrate 150), wherein the substrate extends along a horizontal direction (horizontal direction in Fig. 4A), and the first nanosheets are arranged along a vertical direction (vertical direction in Fig. 4A) substantially perpendicular to the horizontal direction (see Fig. 4A and [0038-0039]); a first gate structure (gate structure 130), disposed over the substrate, wherein the first gate structure is disposed between and surrounds the first nanosheets (see Fig. 4A and [0039]); and a first S/D structure (first S/D structure 430), disposed over the substrate and adjacent to the first gate structure, wherein the first S/D structure overlaps a first number of the first nanosheets (4 channels 134) along the horizontal direction (see Fig. 4A and [0038]); and a second transistor (GAA device 420), comprising: a plurality of second nanosheets (channels 144), disposed over the substrate and arranged along the vertical direction (see [0038-0039]); a second gate structure (gate structure 140), disposed over the substrate, wherein the second gate structure is disposed between and surrounds the second nanosheets (see Fig. 4A and [0039]); and a second S/D structure (second S/D structure 440), disposed over the substrate and adjacent to the second gate structure, wherein the second S/D structure overlaps a second number of the second nanosheets (2 channels 144) along the horizontal direction, and the second number is different from the first number (2 channels Vs 4 channels) (see Fig. 4A and [0027-0028], [0038-0039]).
Regarding claim 16, NARASIMHA discloses the semiconductor structure of claim 9, wherein the first S/D structure includes a first source structure (first source 430a) and a first drain structure (first drain 430b), disposed on two opposite sides of the first nanosheets, the second S/D structure includes a second source structure (second source 440a) and a second drain structure (second drain 440b), disposed on two opposite sides of the second nanosheets, and a first distance (defined by gate structure 130) between the first source structure and the first drain structure is substantially equal to a second distance (defined by gate structure 140) between the second source structure and the second drain structure (both gates structures 130 and 140 have the same width) (see Fig. 1, 4A and [0038-0039]).
Claims 21-22 are rejected under 35 U.S.C. 102(a)(2) as being anticipated by LEE et al. (Pub. No.: US 2023/0006040 A1), hereinafter as LEE.
Regarding claim 21, LEE discloses a semiconductor structure in Figs. 1-2D, comprising: a substrate (substrate 102), including a first fin structure (left fin FA) and a second fin structure (right fin FA), disposed adjacent to and substantially parallel with the first fin structure, wherein each of the first and second fin structures extends along a first horizontal direction (X-direction), and the first and second fin structures are arranged along a second horizontal direction (Y-direction) substantially perpendicular to the first horizontal direction (see Figs. 1, 2C and [0023-0024]); a first S/D structure (left source/drain region 130), disposed on the first fin structure, wherein the first S/D structure has a first height (a height measured from the neck of the left S/D region 130 to the top surface of substrate 102), which is measured along a vertical direction (Z-direction) (see Fig. 2C and [0034-0035], [0062]); a second S/D structure (right source/drain region 130), disposed on the second fin structure (see Fig. 2C and [0062]); wherein the second S/D structure has a second height (a height measured from the topmost surface of the right S/D region 130 to the top surface of substrate 102), which is measured along the vertical direction, and the second height is different from the first height (see Fig. 2C).
Regarding claim 22, LEE discloses the semiconductor structure of claim 21, further comprising: a first epitaxial portion (combination of a topmost first sub-layer S1 and a topmost second sub-layer S2 of superlattice barrier SL), disposed between the first fin structure (left fin FA) and the first S/D structure (left S/D region 130) (see Fig. 2B-2C and [0028], [0041-0042]); and a second epitaxial portion (only the topmost first sub-layer S1), disposed between the second fin structure (right fin FA) and the second S/D structure (right S/D region 130), wherein a first distance (defined by thicknesses of first sub-layer S1 and second sub-layer S2) between the first epitaxial portion and the first S/D structure is greater than a second distance (defined by thickness of only the topmost first sub-layer S1) between the second epitaxial portion and the second S/D structure (see Fig. 2B-2C and [0041-0042]).
Allowable Subject Matter
Claims 10-15 and 23-24 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
The following is an examiner's statement of reasons for the indication of allowable subject matter: The cited art, whether taken singularly or in combination, especially when all limitations are considered within the claimed specific combination, fails to disclose or suggest the claimed invention having:
Wherein the first transistor further comprises: a stepped structure, disposed below the first S/D structure; and a sidewall spacer, disposed between the stepped structure and at least one of the first nanosheets below the first S/D structure as recited in claim 10. Claims 11-14 depend on claim 10, and therefore also include said claimed limitation.
Wherein a total number of the first nanosheets is same as a total number of the second nanosheets as recited in claim 15.
Wherein the first transistor further comprises: a stepped structure, disposed below the first S/D structure; and a sidewall spacer, disposed between the stepped structure and at least one of the first nanosheets below the first S/D structure as recited in claim 23.
Further comprising: a first spacer layer, disposed on two lateral sides of the first fin structure, wherein a bottom surface of the first S/D structure is above or aligned with a top surface of the first spacer layer, and a second spacer layer, disposed on two lateral sides of the second fin structure, wherein the second spacer layer laterally surrounds a lower portion of the second S/D structure as recited in claim 24.
Claims 1-4 and 6-8 will be allowed over prior art of record if rewritten to overcome the objections and claim 5 will be allowed if rewritten or amend to overcome 112 rejection as set forth in the office action above.
The following is an examiner' s statement of reason for allowance: the prior art made of record does not teach or fairly suggest the following:
Regarding claim 1, LEE et al. (Pub. No.: US 2023/0006040 A1) discloses a semiconductor structure in Figs. 1-2D, comprising: a plurality of nanosheets (a nanosheet stacks NSS), disposed over a substrate (substrate 102), wherein the substrate extends along a first direction (X-direction), and the nanosheets are arranged along a second direction (Z-direction) substantially perpendicular to the first direction (see Figs. 1, 2A-2B and [0023-0024]); a gate structure (a gate line 160), disposed over the substrate, wherein the gate structure is disposed between and surrounding the nanosheets (see Figs. 2A-2B and [0027]); an S/D structure (a source/drain region 130), disposed adjacent to the gate structure and the plurality of nanosheets (see Figs. 2A, 2C, 2D and [0034]); a stepped structure (combination of the topmost first sub-layer S1 and the topmost second sub-layer S2), disposed below the S/D structure (S1 has oxygen doping and S2 as no oxygen doping for forming the stepped structure in the oxygen concentration between 2 layers) (see Fig. 2D and [0028], [0041]).
LEE et al. fails to disclose wherein the stepped structure overlaps at least one of the nanosheets along the first direction and a sidewall spacer, disposed between the stepped structure and the at least one of the nanosheets.
Claims 2-8 depend on claim 1, and therefore also include said claimed limitation.
Any comments considered necessary by applicant must be submitted no later than the payment of the issue fee and, to avoid processing delays, should preferably accompany the issue fee. Such submissions should be clearly labeled “Comments on Statement of Reasons for Allowance.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to CUONG B NGUYEN whose telephone number is (571)270-1509 (Email: CuongB.Nguyen@uspto.gov). The examiner can normally be reached Monday-Friday, 8:30 AM-5:00 PM Eastern Standard Time.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Steven H. Loke can be reached on (571) 272-1657. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/CUONG B NGUYEN/Primary Examiner, Art Unit 2818
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