Prosecution Insights
Last updated: July 17, 2026
Application No. 18/409,839

SEMICONDUCTOR STRUCTURE INCLUDING MEMORY UNIT AND MANUFACTURING METHOD THEREOF

Non-Final OA §103
Filed
Jan 11, 2024
Examiner
SHAMSUZZAMAN, MOHAMMED
Art Unit
2897
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Taiwan Semiconductor Manufacturing Company, Ltd.
OA Round
1 (Non-Final)
81%
Grant Probability
Favorable
1-2
OA Rounds
0m
Est. Remaining
99%
With Interview

Examiner Intelligence

Grants 81% — above average
81%
Career Allowance Rate
738 granted / 911 resolved
+13.0% vs TC avg
Strong +55% interview lift
Without
With
+55.3%
Interview Lift
resolved cases with interview
Typical timeline
2y 5m
Avg Prosecution
37 currently pending
Career history
935
Total Applications
across all art units

Statute-Specific Performance

§103
93.0%
+53.0% vs TC avg
§102
2.4%
-37.6% vs TC avg
§112
2.0%
-38.0% vs TC avg
Black line = Tech Center average estimate • Based on career data from 911 resolved cases

Office Action

§103
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Election/Restrictions Applicant’s election without traverse of Group I, Species III (Fig. 4), (claims 1-16, 21-24) in the reply filed on 06/11/2026 is acknowledged. Claim Rejections - 35 USC § 103 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102 of this title, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claims 1, 6-7 are rejected under 35 U.S.C. 103 as being obvious over Lee et al (CN 100397644) in view of Jung et al. (US PGPUB 2021/0134804 A1) Regarding claim 1: Lee teaches in Fig. 5 about a semiconductor structure, comprising: PNG media_image1.png 308 510 media_image1.png Greyscale a first electrode 40/50; a second electrode 50/40, disposed over the first electrode; and a dielectric layer 44 or 42+44, disposed between the first electrode and the second electrode, and configured to store information, wherein a bandgap at a first surface of the dielectric layer facing the first electrode is greater than a bandgap at a second surface of the dielectric layer facing the second electrode. Lee does not explicitly talk about wherein a bandgap at a first surface of the dielectric layer facing the first electrode is greater than a bandgap at a second surface of the dielectric layer facing the second electrode. Jung teaches in Fig. 1A and [0041] about having insertion layer 20 between high-k dielectric 30 and lower electrode 10 to have an energy bandgap greater than that of dielectric titanium oxide layer 30. PNG media_image2.png 384 558 media_image2.png Greyscale Therefore It would have been obvious to one of ordinary skill in the art at the time of the application was filed to have the bandgap feature as claimed by having an insertion layer between lower electrode and the dielectric layer according to the teachings of Jung to reduce potentially, dramatically, a difference between maximum and minimum values of capacitance (Jung, [0041]). Regarding claim 6: Lee teaches in Fig. 5 a capping layer 46, disposed between the dielectric layer 44 and the second electrode 50. Regarding claim 7: Lee teaches wherein the capping layer includes silicon oxide aluminum, titanium, tantalum, hafnium, zirconium, titanium oxide, zirconium oxide, germanium oxide, cerium oxide, or a combination thereof. Claims 1-16, 21-24 are rejected under 35 U.S.C. 103 as being obvious over Huang et al (US Patent 9,966,425 B1) in view of Jung et al. (US PGPUB 2021/0134804 A1) Regarding claim 1: Huang teaches in Fig. 4 about a semiconductor structure, comprising: PNG media_image3.png 438 584 media_image3.png Greyscale a first electrode 20; a second electrode 34, disposed over the first electrode; and a dielectric layer 24+32, disposed between the first electrode and the second electrode, and configured to store information, wherein a bandgap at a first surface of the dielectric layer facing the first electrode is greater than a bandgap at a second surface of the dielectric layer facing the second electrode. Huang does not explicitly talk about wherein a bandgap at a first surface of the dielectric layer facing the first electrode is greater than a bandgap at a second surface of the dielectric layer facing the second electrode. However Huang teaches silicon dioxide layer 32 is formed between the lower electrode 20 and high-k dielectric layer 26 for improving leakage level and Jung also teaches in Fig. 1A and [0041] about having insertion layer 20 between high-k dielectric 30 and lower electrode 10 to have an energy bandgap greater than that of titanium oxide of layer 30. PNG media_image2.png 384 558 media_image2.png Greyscale Therefore It would have been obvious to one of ordinary skill in the art at the time of the application was filed to have silicon oxide or other materials to have the bandgap feature as claimed, since it has been held to be within the general skill of a worker in the art to select a known material on the basis of its suitability for the intended use like for improving leakage level (Huang) and reduce potentially, dramatically, a difference between maximum and minimum values of capacitance (Jung, [0041]) as a matter of obvious design choice. In re Leshin, 125 USPQ 416. Regarding claims 2, 10: Huang teaches in Fig. 4 wherein the dielectric layer is a multi-layer structure and includes a first sub-layer 32 proximal to the first electrode 20 and a second sub-layer 30 proximal to the second electrode 34, and a bandgap of the first sub-layer is greater than a bandgap of the second sub-layer (as explained in claim 1). Regarding claim 3: Huang in view of Jung teaches wherein the dielectric layer further includes a third sub-layer 28 (Aluminum Oxide) disposed between the first sub-layer 32 and the second sub- layer 30 (hafnium oxide), wherein a bandgap of the third sub-layer is greater than the bandgap of the second sub-layer and less than the bandgap of the first sub-layer 32 (silicon dioxide). Regarding claim 4: As explained in claims 1-3, Huang in view of Jung teaches the bandgap of the dielectric layer discretely decreases at positions from the first electrode toward the second electrode (It is well known in the art silicon dioxide layer 32 has more bandgap than aluminum oxide 28 and hafnium oxide 30 has less bandgap than aluminum oxide 28). Regarding claim 5: Huang teaches in Fig. 4 wherein the bandgap of the dielectric layer includes multiple sub-layers, and the sub-layers have different thicknesses from one another. Regarding claim 6: Huang teaches in Fig. 4 a capping layer 36, disposed between the dielectric layer and the second electrode. Regarding claim 7: Huang teaches wherein the capping layer includes silicon oxide except aluminum, titanium, tantalum, hafnium, zirconium, titanium oxide, zirconium oxide, germanium oxide, cerium oxide, or a combination thereof. Jung teaches in Fig. 1B and [ 0039] about a capping layer 40 comprising hafnium, zirconium. It would have been obvious to one of ordinary skill in the art at the time of the application was filed to havethe material as claimed, since it has been held to be within the general skill of a worker in the art to select a known material on the basis of its suitability for the intended use as a matter of obvious design choice. In re Leshin, 125 USPQ 416. Regarding claim 8: As explained in claim 1, Huang in view of Jung teaches all the limitations. Hunag further teaches about a substrate 12 and an interconnect structure 14, disposed over the substrate, a memory unit (comprising the MIM capacitor), disposed in the interconnect structure Regarding claim 9: Jung teaches in Fig. 2C wherein the memory unit CAP is disposed over a metal line layer or a metal via layer BL of the interconnect structure over the substrate. Regarding claim 11: As explained in claim 1, Huang in view of Jung teaches wherein the second sub-layer includes titanium oxide (TiO₂), hafnium oxide (HfO₂), hafnium aluminum oxide (HfₓAl₁- xO2), tantalum oxide (Ta₂O₅), hafnium tantalum oxide (HfₓTa₁-ₓO₂), tungsten oxide (WO₂), zirconium oxide (ZrO₂), aluminum oxide (A1₂O₃), or strontium titanium oxide (SrTiO₃ or STO). Regarding claim 12: As explained in claim 1, Huang in view of Jung teaches wherein the first sub-layer includes silicon oxide (SiO₂), hafnium silicon oxide (HfₓSi₁-ₓO₂), tantalum silicon oxide (TaxSi₁-xO₂), aluminum oxide (Al₂O₃), hafnium aluminum oxide (HfₓAl₁-xO₂), tantalum aluminum oxide (TaₓAl₁-ₓO₂), or hafnium tantalum oxide (HfₓTa₁-ₓO₂). Regarding claim 13: Huang teaches in Fig. 4 wherein the memory unit further comprises: a capping layer 36, disposed between the high-k dielectric layer 30 and the upper electrode 34, wherein the capping layer includes an oxide affinity material. Regarding claim 14: Jung teaches in Fig. 2C wherein the memory unit is surrounded by a low-k dielectric material DL. Regarding claim 15: Jung teaches in Fig. 2C wherein the bottom electrode of the memory unit is electrically connected to a metal line feature of the interconnect structure through a metal via feature BC. Regarding claim 16: Jung teaches in Fig. 2C and [0068] wherein the memory unit is disposed over a metal line feature of the interconnect structure, and the interconnect structure further comprises an etch stop layer 370 between the memory unit and the metal line feature. Regarding claim 21: As explained in claim 1, Huang in view of Jung teaches all the limitations. Jung further teaches in Fig. 2C about a controller device (comprising the transistor having the WL, ACT etc.) and a memory unit CAP, disposed over and electrically connected to the controller device. Regarding claim 22: Jung teaches wherein the memory unit is electrically connected to a source/drain structure 312a/312b [0052] of the controller device through an interconnect structure. Regarding claim 23: As explained in claim 1, Huang in view of Jung teaches wherein the memory unit further comprises: a bottom electrode and an upper electrode, disposed on two opposite sides of the multi-layer dielectric structure, wherein the bottom electrode is proximal to the controller device, and the bottom electrode is electrically connected to the source/drain structure of the controller device [0052]. Regarding claim 24: As explained in claims 1, 11-12, Huang in view of Jung teaches all the limitations and the materials types except wherein an electronegativity the multi-layer dielectric structure at the first surface is greater than an electronegativity of the multi-layer dielectric structure at the second surface. The recitation of “an electronegativity the multi-layer dielectric structure at the first surface is greater than an electronegativity of the multi-layer dielectric structure at the second surface” does not distinguish the present invention over the prior art of Huang in view of Jung who teaches the structure as claimed. The Examiner notes that a recitation of the intended use of the claimed invention must result in a structural difference between the claimed invention and the prior art in order to patentably distinguish the claimed invention from the prior art. If the prior art structure is capable of performing the intended use, then it meets the claim. See, e.g., In re Pearson, 181 USPQ 641 (CCPA); In re Minks, 169 USPQ 120 (Bd Appeals); In re Casey, 152 USPQ 235 (CCPA 1967); In re Otto, 136 USPQ 458, 459 (CCPA 1963). See MPEP §2114. Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to MOHAMMED SHAMSUZZAMAN whose telephone number is (571)270-1839. The examiner can normally be reached Monday-Friday 7 am -4 pm EST. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Fernando Toledo can be reached at 571-272-1867. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /Mohammed Shamsuzzaman/Primary Examiner, Art Unit 2897
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Prosecution Timeline

Jan 11, 2024
Application Filed
Jun 26, 2026
Non-Final Rejection mailed — §103 (current)

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
81%
Grant Probability
99%
With Interview (+55.3%)
2y 5m (~0m remaining)
Median Time to Grant
Low
PTA Risk
Based on 911 resolved cases by this examiner. Grant probability derived from career allowance rate.

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