DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Continued Examination Under 37 CFR 1.114
A request for continued examination under 37 CFR 1.114, including the fee set forth in 37 CFR 1.17(e), was filed in this application after final rejection. Since this application is eligible for continued examination under 37 CFR 1.114, and the fee set forth in 37 CFR 1.17(e) has been timely paid, the finality of the previous Office action has been withdrawn pursuant to 37 CFR 1.114. Applicant's submission filed on July 6, 2026 has been entered.
By that submission, claims 1, 8-11, 15, and 17 have been amended, claims 2-3 and 16 have been canceled, and claims 21-23 have been added. Accordingly, claims 1, 4-15, and 17-23 are pending in the present application in which claims 1, 8, and 15 are in independent form.
Response to Applicant’s Amendments and Arguments
Applicant’s arguments with respect to claims 1-9, 11-15, and 19-20 have been considered but are moot because the new ground of rejection does not rely on any reference applied in the prior rejection of record for any teaching or matter specifically challenged in the argument.
New Grounds of Rejection
Claim Rejections - 35 USC § 112
The following is a quotation of the first paragraph of 35 U.S.C. 112(a):
(a) IN GENERAL.—The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor or joint inventor of carrying out the invention.
The following is a quotation of the first paragraph of pre-AIA 35 U.S.C. 112:
The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor of carrying out his invention.
Claim 19 is rejected under 35 U.S.C. 112(a) or 35 U.S.C. 112 (pre-AIA ), first paragraph, as failing to comply with the written description requirement. The claim(s) contains subject matter which was not described in the specification in such a way as to reasonably convey to one skilled in the relevant art that the inventor or a joint inventor, or for applications subject to pre-AIA 35 U.S.C. 112, the inventor(s), at the time the application was filed, had possession of the claimed invention.
Claim 19 depends from the amended claim 15 with the additional limitation “wherein the first top surface of the first heat spreader is coplanar with the second top surface of the first heat spreader.” In the previous version of the claims, claim 19 as written could be easily understood to at least describe or be described by, for example, FIG. 6 and is supported by, for example, paragraph [0081] of the originally filed specification.
However, in the current listing of the claims, the amended claim 15, from which claim 19 depends, has the limitation of “a second top surface of the first heat spreader is higher than a bottom surface of the second heat spreader.” This presents issues with the written description requirement. One could not conceivably describe, for example, any of the drawings with claim 19, nor would claim 19 as written be conceivably understood as represented by any of the drawings. At best, claim 19 would be understood as a description of, or described by, an amalgamation of, for example, FIGs. 5 and 6, but there is no clear mention of such a modification in the originally filed specification.
Therefore, in the current listing of claims where claim 19 depends from the amended claim 15, claim 19 recites, in long-form, “…a second heat spreader partially overlapping a first top surface of the first heat spreader and exposing a second top surface of the first heat spreader, wherein the second top surface of the first heat spreader is higher than a bottom surface of the second heat spreader, wherein the first top surface of the first heat spreader is coplanar with the second top surface of the first heat spreader.” The examiner can only interpret this to mean that second heat spreader must have a bottom surface which extends below the first and second top surfaces of the first heat spreader, while the first and second top surfaces of the first heat spreader are coplanar. This combination of structural features, where the first and second top surfaces are coplanar and higher than a bottom surface of the second heat spreader is not accurately described or shown in the originally filed specification nor drawings. One of ordinary skill in the art would conceivably understand claim 19 as a combination of FIGs. 5 and 6, but there is no description of such a possible modification present and thus, claim 19, as written, describes new matter and so, is rejected under 112(a) for failing to comply with the written description requirement.
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
Claims 1 and 22-23 are rejected under 35 U.S.C. 102(a)(2) as being anticipated by Ryu, US PGPub 2022/0059420 A1.
Regarding Claim 1, Ryu discloses a semiconductor package structure, comprising (FIG. 2A, semiconductor package 100, [0015]):
an interposer substrate formed over a package substrate (FIG. 2A, interposer 132 over substrate 100, [0015, 0019]);
a die disposed over the interposer substrate (FIG. 2A, first semiconductor chips 134 over interposer 132, [0019]);
a first heat spreader disposed over the package substrate (FIG. 2A, stiffener 140 over substrate 110, [0027]),
wherein a topmost surface of the first heat spreader is higher than a top surface of the die (FIG. 2A, topmost surface of stiffener 140 is higher than top surface of first semiconductor chips 134);
and a second heat spreader disposed over the die and connected to the first heat spreader (FIG. 2A, heat dissipation plate 150 over first semiconductor chips 134 and connected to stiffener 140, [0030]),
wherein a coefficient of thermal expansion (CTE) of the first heat spreader and a coefficient of thermal expansion of the second heat spreader are different (FIG. 2A, stiffener 140 and heat dissipation plate 150 can be of different materials, i.e., have different CTEs (e.g., stiffener 140 can be of “at least one of copper and stainless steel” and heat dissipation plate 150 “may include at least one of Ag, Cu, ni, and Au”, [0027, 0030]).
Regarding Claim 22, Ryu discloses the semiconductor package structure as claimed in claim 1, as discussed above.
Ryu further discloses wherein a distance between an outmost sidewall of the first heat spreader and an edge of the package substrate is greater than 0 µm (FIG. 2A, where a distance between an outer-most sidewall of stiffener 140 is greater than 0 µm from the edge of substrate 110).
Regarding Claim 23, Ryu discloses the semiconductor package structure as claimed in claim 1, wherein the first heat spreader has a sloped sidewall (FIG. 1, stiffener 140 has an angled sidewall in outer side a3 of second frame 144 at angle θ1, [0024, 0027]).
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
Claims 4-7 are rejected under 35 U.S.C. 103 as being unpatentable over Ryu as applied to claim 1 above, and further in view of Shen, US PGPub 2014/0167243 A1.
Regarding Claim 4, Ryu discloses the semiconductor package structure as claimed in claim 1, as discussed above.
Ryu does not explicitly teach that stiffener 140 have an “inner” and “outer” portion, such as wherein the first heat spreader comprises an inner portion and an outer portion, wherein the second heat spreader covers the inner portion of the first heat spreader, although one could see that there are certainly inner and outer parts of stiffener 140 and heat dissipation plate 150 covers at least the inner part.
However, Shen, which is directed to a chip package with chip constraint rings and a lid to help reduce package stress (thermal and mechanical), shows chip constraint rings of various size and shape, including an L-shaped ring for accommodating a chip constraint lid inside of the step of the L-shaped ring (i.e., to cover the “inner” portion and secure the lid inside the ring), which one of ordinary skill would recognize as beneficial for providing security of lid placement (e.g., ease of placement, alignment of placement, secure placement between outer portions of the ring, etc.) while minimizing device size and, indeed, would be a simple substitution of one chip constraint ring shape for another, where the L-shaped chip constraint ring would still achieve the known and predictable result of providing stability for and connection to and between the chip constraint lid and package substrate (Shen FIGs. 6A-6B, chip constraint ring 260, chip constraint lid 340 inside the “step” or over the “inner” portion of 260, [0029-0030]).
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the stiffener of Ryu with the chip constraint ring shape teachings of Shen such that
wherein the first heat spreader comprises an inner portion and an outer portion, wherein the second heat spreader covers the inner portion of the first heat spreader (Shen FIGs. 6A-6B, chip constraint ring 260, chip constraint lid 340 covering “inner” portion of chip constraint ring 260)
for the benefits of secure, aligned, and eased manufacturability of the package while also maintaining a small package size and as a simple substitution between a pillar shaped constraint ring, as seen in both Ryu and in Shen’s FIG. 6A, and an L-shaped chip constraint ring 260 as shown in Shen’s FIG. 6B, which would provide the known and predictable result of still providing connection to and between the chip constraint lid 340 (i.e., the heat dissipation plate 150 of Ryu) and the substrate 120 (i.e., the substrate 110 of Ryu).
Regarding Claim 5, Ryu in view of Shen (Ryu/Shen) discloses the semiconductor package structure as claimed in claim 4, as discussed above.
Ryu/Shen further discloses wherein a top surface of the outer portion of the first heat spreader is higher than a top surface of the inner portion of the first heat spreader (Shen FIG. 6B, chip constraint ring 260 has a “step” or L-shape in cross-section, wherein chip constraint lid 340 is placed in the “step”, i.e., over the “inner” portion of 260, [0029]).
Regarding Claim 6, Ryu/Shen discloses the semiconductor package structure as claimed in claim 4, as discussed above.
Ryu/Shen further discloses wherein a sidewall of the outer portion of the first heat spreader is separated from a sidewall of the second heat spreader (Shen FIG. 6B, sidewall of outer portion (e.g., uncovered portion) of chip constraint ring 260 separated from a sidewall of chip constraint lid 340 (see also, e.g., FIG. 2A of Ryu, where a sidewall of an “outer” portion of stiffener 140, i.e., a sidewall of the portion of 140 facing away from semiconductor chip stack 130, is separated from a sidewall of heat dissipation plate 150)).
Regarding Claim 7, Ryu/Shen discloses the semiconductor package structure as claimed in claim 4, as discussed above.
Ryu/Shen further discloses wherein a bottom surface of the outer portion of the first heat spreader is wider than a top surface of the outer portion of the first heat spreader (Shen FIG. 6B, chip constraint ring 260 has a “step” or L-shape in cross-section, wherein chip constraint lid 340 is placed in the “step”, i.e., over the “inner” portion of 260 and “outer portion” of 260 exposed by chip constraint lid 340, where by the L-shape, a bottom surface of the “outer portion” of chip constraint ring 260 is wider than a top surface of the “outer portion” of chip constraint ring 260, [0029]).
Regarding Claim 21, Ryu/Shen discloses the semiconductor package structure as claimed in claim 1, as discussed above.
Ryu does not explicitly disclose wherein the first heat spreader has a L-shape in a cross-sectional view.
However, Shen, which is directed to a chip package with chip constraint rings and a lid to help reduce package stress (thermal and mechanical), shows chip constraint rings of various size and shape, including an L-shaped ring for accommodating a chip constraint lid inside of the step of the L-shaped ring (i.e., to cover the “inner” portion and secure the lid inside the ring), which one of ordinary skill would recognize as beneficial for providing security of lid placement (e.g., ease of placement, alignment of placement, secure placement between outer portions of the ring, etc.) while minimizing device size and, indeed, would be a simple substitution of one chip constraint ring shape for another, where the L-shaped chip constraint ring would still achieve the known and predictable result of providing stability for and connection to and between the chip constraint lid and package substrate (Shen FIG. 6B, chip constraint ring 260, chip constraint lid 340 inside the “step” or over the “inner” portion of 260, [0029]).
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the stiffener of Ryu with the chip constraint ring shape teachings of Shen such that
wherein the first heat spreader has a L-shape in a cross-sectional view (Shen FIGs. 6A-6B, chip constraint ring 260, chip constraint lid 340 covering “inner” portion of chip constraint ring 260)
for the benefits of secure, aligned, and eased manufacturability of the package while also maintaining a small package size and as a simple substitution between a pillar shaped constraint ring, as seen in both Ryu and in Shen’s FIG. 6A, and an L-shaped chip constraint ring 260 as shown in Shen’s FIG. 6B, which would provide the known and predictable result of still providing connection to and between the chip constraint lid 340 (i.e., the heat dissipation plate 150 of Ryu) and the substrate 120 (i.e., the substrate 110 of Ryu).
Claims 8-11, 13-14 and 15 are rejected under 35 U.S.C. 103 as being unpatentable over Ryu in view of Shen.
Regarding Claim 8, Ryu discloses a semiconductor package structure, comprising (FIG. 2A, semiconductor package 100, [0015]):
an interposer substrate disposed over a package substrate (FIG. 2A, interposer 132 over substrate 100, [0015, 0019]);
a first heat spreader attached to the package substrate (FIG. 2A, stiffener 140 attached to substrate 110, [0027]);
a die disposed over the interposer substrate (FIG. 2A, first semiconductor chips 134 over interposer 132, [0019]);
and a second heat spreader attached to the die (FIG. 2A, heat dissipation plate 150 attached to first semiconductor chips 134);
wherein the first heat spreader and the second heat spreader are made of different materials (FIG. 2A, stiffener 140 can be “at least one of copper and stainless steel” while heat dissipation plate “may be one of Ag, Cu, Ni, and Au”, [0027, 0030]),
Ryu does not explicitly disclose bonding pad structures formed over the first heat spreader and that the second heat spreader be attached to the die and the bonding pad structures. Rather, Ryu discloses the stiffener 140 uses second thermal transfer material 148 contacting an upper surface of stiffener 140 and a lower surface of heat dissipation plate 150, i.e., acting as an attaching and heat transferring structure (Ryu [0030]).
However, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention that a well-known alternative to thermal interface/transfer material bonding would be pad-to-pad bonding and using such an alternative would achieve the similar and predictable results of providing heat transfer and mechanical strength of bonding similar to that of the bonding type described in Ryu, and would indeed be preferable in situations where maximum conductivity and mechanical strength are a primary concern.
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to substitute the thermal interface/transfer material bonding of Ryu with the known and predictable alternative of pad-to-pad bonding such that bonding pad structures formed over the first heat spreader; and a second heat spreader attached to the die and the bonding pad structures (FIG. 2A, heat dissipation plate 150 attached to first semiconductor chips 134 and attached to stiffener 140 through second thermal transfer material 148, or pad-to-pad bonding pads on “an upper surface of stiffener 140” and a “lower surface of heat dissipation plate 150”, [0030]).
Further, Ryu does not explicitly disclose wherein a distance from a top surface of the first heat spreader to a top surface of the package substrate is greater than a distance from a bottom surface of the second heat spreader to the top surface of the package substrate.
However, Shen, which is directed to a chip package with chip constraint rings and a chip constraint lid to help reduce package stress (thermal and mechanical), shows chip constraint rings of various sizes and shapes, including an L-shaped ring in cross-sectional view, to accommodate the lid inside of the step of the L of the chip constraint ring (i.e., where a distance from the top surface of chip constraint ring 260 to the substrate 120 is greater than a distance from a bottom surface of chip constraint lid 340 to the substrate 120).
One of ordinary skill would recognize such a configuration as advantageous for providing a secure connection between the rings, lid, and chip while minimizing chip size and, indeed, would be a simple substitution of one chip constraint ring shape for another. The L-shaped chip constraint ring would still achieve the known and predictable result of providing stability for, and connection to and between, the chip constraint lid and package substrate (Shen FIGs. 6A-6B, chip constraint ring 260, chip constraint lid 340 inside the “step” or over the “inner” portion of 260, [0029-0030]).
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the stiffener of Ryu with the L-shaped chip constraint ring teachings of Shen such that
wherein a distance from a top surface of the first heat spreader to a top surface of the package substrate is greater than a distance from a bottom surface of the second heat spreader to the top surface of the package substrate (Shen FIGs. 6A-6B, chip constraint ring 260, chip constraint lid 340 inside the “step” or over the “inner” portion of 260, [0029-0030])
for the benefits of minimizing device size while maintaining structural integrity and as a simple substitution between a pillar shaped constraint ring, as seen in both Ryu and in Shen’s FIG. 6A, and an L-shaped chip constraint ring 260 as shown in Shen’s FIG. 6B, which would provide the known and predictable result of still providing connection to and between the chip constraint lid 340 (i.e., the heat dissipation plate 150 of Ryu) and the substrate 120 (i.e., the substrate 110 of Ryu).
Regarding Claim 9, Ryu in view of Shen (Ryu/Shen) discloses the semiconductor package structure as claimed in claim 8, as discussed above.
Ryu/Shen further discloses wherein the bonding pad structures are in direct contact with the first heat spreader and the second heat spreader (Ryu FIG. 2A, second thermal transfer material 148 is in direct contact with both stiffener 140 and heat dissipation plate 150, [0030]).
Regarding Claim 10, Ryu/Shen discloses the semiconductor package structure as claimed in claim 8, as discussed above.
Ryu/Shen further disclose wherein the bonding pad structures comprises: first pad structures formed over the first heat spreader; second pad structures formed under the second heat spreader, wherein the first pad structures and the second pad structures are bonded to each other (As discussed above, while Ryu does not explicitly disclose bonding pad structure for pad-to-pad bonding between stiffener 140 and heat dissipation plate 150, rather describing thermal interface/transfer material bonding, using a well-known and similar bonding scheme such as pad-to-pad bonding in substitution to thermal interface/transfer bonding would be well within the purview of one of ordinary skill in the art and as in FIG. 2A, where second thermal transfer material 148 contacts both an upper surface of stiffener 140 and a lower surface of heat dissipation plate 150, so too would one of ordinary skill substitute the described bonding technique with the well-known pad-to-pad bonding technique for the expected and predictable result of providing high conductivity and mechanical strength bonding between the respective pads and parts).
Regarding Claim 11, Ryu/Shen discloses the semiconductor package structure
as claimed in claim 8, as discussed above.
Ryu/Shen further disclose further comprising: an encapsulating layer surrounding
the die (See annotated Ryu FIG. 2A below, semiconductor stack 130 which encapsulation not explicitly described but observed by, e.g., solid arrows (see also Shen FIG. 6B with underfill material 400/440 surrounding chip 100)),
a thermal interface material (TIM) covering the die and the encapsulating layer (Ryu FIG. 2A, third thermal transfer material 152 covering first semiconductor chips 134 and encapsulation, [0030]),
wherein a top surface of the thermal interface material is substantially level with a top surface of the bonding pad structures (Ryu FIG. 2A, third thermal transfer material 152 level with second thermal transfer material 148 (e.g., would be level with the pad-to-pad bonding substitution discussed above), see also Shen FIG. 6B, where the top of adhesive material 445 is also level with the bonding material between chip constraint ring 260 and chip constraint lid 340).
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Regarding Claim 13, Ryu/Shen discloses the semiconductor package structure
as claimed in claim 8, wherein a sidewall of the second heat spreader is between opposite sidewalls of the first heat spreader (Shen FIG. 6B, sidewall of chip constraint lid 340 is between opposite sidewalls of chip constraint ring 260, [0029]).
Regarding Claim 14, Ryu/Shen discloses the semiconductor package structure as claimed in claim 8, wherein the first heat spreader comprises an inner portion and an outer portion, and the inner portion of the first heat spreader is thicker than the outer portion of the first heat spreader (Shen FIG. 6B, chip constraint ring 260 has an L-shape in cross-section, i.e., an “inner” portion over which the lid is secured and an outer portion exposed, and as understood and seen by the L-shape, the inner portion is thicker than the outer portion, [0030]).
Regarding Claim 15, Ryu discloses a semiconductor package structure,
comprising (FIG. 2A, semiconductor package 100, [0015]):
a first die and a second die disposed over a package substrate (FIG. 2A, first and second semiconductor chips 134, 136 over substrate 110, [0015, 0019]);
a first heat spreader (FIG. 2A, stiffener 140 surrounding semiconductor stack 130)
Ryu does not explicitly disclose an encapsulating layer surrounding the first die and the second die; a first heat spreader surrounding the encapsulating layer; and a second heat spreader partially overlapping a first top surface of the first heat spreader and exposing a second top surface of the first heat spreader, wherein the second top surface of the first heat spreader is higher than a bottom surface of the second heat spreader.
However, Shen, which is directed to a chip package with chip constraint rings and a lid to help reduce package stress (thermal and mechanical), shows chip constraint rings of various sizes and shapes, including an L-shaped ring in cross-sectional view, to accommodate the lid inside of the step, i.e., where a first top surface of chip constraint ring 260 is overlapped by chip constraint lid 340 with a second top surface of chip constraint ring 260 exposed and higher than a bottom surface of the chip constraint lid 340.
One of ordinary skill would recognize such a configuration as advantageous for providing a secure connection between the rings, lid, and chip while minimizing chip size and, indeed, would be a simple substitution of one chip constraint ring shape for another. The L-shaped chip constraint ring would still achieve the known and predictable result of providing stability for, and connection to and between, the chip constraint lid and package substrate (Shen FIGs. 6A-6B, chip constraint ring 260, chip constraint lid 340 inside the “step” or over the “inner” portion of 260, [0029-0030]).
Further, while Ryu does not explicitly disclose an encapsulant surrounding the dies, it does disclose that the semiconductor stack 130 can be a 3D semiconductor device and, as seen in the annotated FIG. 2A above, one of ordinary skill would recognize the material indicated by the solid arrows as an encapsulant. Shen also discloses an underfill material surrounding the chip 100 to fill any gaps and provide mechanical bonding between encapsulated parts of the package structure and it is well-known that semiconductor chip packages contain encapsulation surrounding the die to protect from moisture and contaminants to prevent warpage of the package structure.
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the stiffener of Ryu with the L-shaped chip constraint ring teachings of Shen such that
an encapsulating layer surrounding the first die and the second die (See annotated Ryu FIG. 2A above (i.e., used in the discussion of claim 11), semiconductor stack 130 with encapsulation not explicitly described but observed by, e.g., solid arrows (see also Shen FIG. 6B with underfill material 400/440 surrounding chip 100);
a first heat spreader surrounding the encapsulating layer (Ryu FIG. 2A, stiffener 140 surrounding semiconductor stack 130 and therefore encapsulation (see also, e.g., Shen FIG. 6B wherein chip constraint ring 260 similarly surrounds underfill material 400/440), [Ryu 0023, 0030]);
and a second heat spreader partially overlapping a first top surface of the first heat spreader and exposing a second top surface of the first heat spreader, wherein the second top surface of the first heat spreader is higher than a bottom surface of the second heat spreader (Shen FIGs. 6A-6B, chip constraint lid 340 overlapping chip constraint ring 260 and exposing a top surface of ring 260 where the exposed top surface of ring 260 is higher than a bottom surface of chip constraint lid 340, [0029-0030]),
for the benefits of minimizing device size while maintaining structural integrity and as a simple substitution between a pillar shaped constraint ring, as seen in both Ryu and in Shen’s FIG. 6A, and an L-shaped chip constraint ring 260 as shown in Shen’s FIG. 6B, which would provide the known and predictable result of still providing connection to and between the chip constraint lid 340 (i.e., the heat dissipation plate 150 of Ryu) and the substrate 120 (i.e., the substrate 110 of Ryu).
Regarding Claim 20, Ryu/Shen discloses the semiconductor package structure
as claimed in claim 15, as discussed above.
Ryu/Shen further disclose further comprising a thermal interface material (TIM) structure connecting the second heat spreader and the first die and the second die (Ryu FIG. 2A, third thermal transfer material 152 connecting heat dissipation plate 150 and first and second semiconductor chips 134, 136, [0019, 0030]).
Claims 12 and 17 are rejected under 35 U.S.C. 103 as being unpatentable over Ryu in view of Shen as applied to claims 8 and 15, respectively, above, and further in view of Wang et al., US Patent No. 7585702 B1 (hereinafter referred to as “Wang”).
Regarding Claim 12, Ryu/Shen discloses the semiconductor package structure as claimed in claim 8, as discussed above.
Ryu/Shen further disclose wherein the second heat spreader has an inner portion and an outer portion (Ryu FIG. 2A, heat dissipation plate 150 has inner and outer portions (e.g., “inner portion above semiconductor stack 130 and “outer” portion above stiffener 140), [0030]).
Neither Ryu nor Shen explicitly disclose and a bottom surface of the inner portion of the second heat spreader is lower than a bottom surface of the outer portion of the second heat spreader.
However, Wang, which is directed to flip chip packages designed to minimize package stress, has stiffeners and a heat spreader, where the heat spreader has a thicker portion for attaching to the die, i.e., where the heat spreader has an inner and outer portion, with the inner portion having a greater thickness, or a lower bottom surface, than the outer portion, and wherein such a configuration of the heat spreader allows for “better heat dissipation of die 102” (Wang FIGs. 3B, 5A-5C, two-piece stiffener 213b, heat spreader 312b with center portion 307 with a thickness 305 greater than of edge portion 309, col 10 lines 22-42 and col 9 lines 16-35).
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the structure of Ryu with the heat spreader shape teachings of Wang such that
and a bottom surface of the inner portion of the second heat spreader is lower than a bottom surface of the outer portion of the second heat spreader (Wang FIGs. 3B, 5A-5C, two-piece stiffener 213b, heat spreader 312b with center portion 307, i.e., bottom surface of 312b, col 10 lines 22-42 and col 9 lines 16-35)
for the benefit of increased heat transfer and heat dissipation of attached dies or semiconductor chips.
Regarding Claim 17, Ryu/Shen discloses the semiconductor package structure as claimed in claim 15 as discussed above.
Neither Ryu nor Shen disclose wherein the first top surface of the first heat spreader is higher than the bottom surface of the second heat spreader.
However, Wang, which is directed to flip chip packages designed to minimize package stress, has stiffeners and a heat spreader, where the heat spreader has a thicker portion for attaching to the die, i.e., wherein a top surface of the two-piece stiffener 213b is higher than a bottom surface of the heat spreader 312b. In other words, the top surface of the stiffener 213b is higher than the bottom surface of the center portion 307 of the heat spreader 312b. Such a configuration of the heat spreader allows for “better heat dissipation of die 102” (Wang FIGs. 3B, 5A-5C, two-piece stiffener 213b, heat spreader 312b with center portion 307 with a thickness 305 greater than of edge portion 309, col 10 lines 22-42 and col 9 lines 16-35).
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the structure of Ryu with the heat spreader shape teachings of Wang such that
wherein the first top surface of the first heat spreader is higher than the bottom surface of the second heat spreader (Wang FIGs. 3B, 5A-5C, two-piece stiffener 213b, heat spreader 312b with center portion 307, i.e., bottom surface of 312b, col 10 lines 22-42 and col 9 lines 16-35)
for the benefit of increased heat transfer and heat dissipation of attached dies or semiconductor chips.
Allowable Subject Matter
Claim 18 is objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
Claim 19 is objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims and if the rejection under 35 USC § 112(a) was overcome.
Regarding Claim 18, Ryu/Shen and further in view of Wang disclose the semiconductor package structure as claimed in claim 17, as discussed above.
However, none of the prior art taken alone or in combination disclose wherein the first top surface of the first heat spreader is higher than the second top surface of the first heat spreader.
Regarding Claim 19, Ryu/Shen discloses the semiconductor package structure as claimed in claim 15 as discussed above.
However, none of the prior art taken alone or in combination disclose wherein the first top surface of the first heat spreader is coplanar with the second top surface of the first heat spreader. None of the prior art discloses the vertical height relationships as recited in claim 19, particularly the combination of limitations from claim 15 upon which claim 19 depends where a second top surface of the first heat spreader is exposed from a second heat spreader and the top surfaces of the first heat spreader are coplanar and the second top surface of the first heat spreader is higher than a bottom surface of the second heat spreader.
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure.
Refai-Ahmed et al., US PGPub 2020/0152546 A1, which is directed to a package substrate with heat sink, stiffener ring, and related die support.
Syu et al., US PGPub 2018/0082936 A1, which is directed to a similar semiconductor package structure with heat spreaders and a similar semiconductor stack, for encapsulation and why it’s a known benefit to semiconductor stacks in package structures.
Lee et al., US PGPub 2021/0305117 A1, which is directed to a semiconductor package with multiple die, interposer, and heat spreaders (i.e., stiffeners, heat spreaders, heat sinks, etc.)
Any inquiry concerning this communication or earlier communications from the examiner should be directed to Austin T. Woodard whose telephone number is (571)270-1958. The examiner can normally be reached M-F, 8am to 5pm ET.
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/Austin T Woodard/Examiner, Art Unit 2893
/SHAUN M CAMPBELL/Primary Examiner, Art Unit 2893 10/13/2026
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