DETAILED ACTION
This Notice is responsive to communication filed on 06/01/2026.
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Election/Restrictions
Applicant’s election without traverse of Group 1 and Species 1, reading on Fig. 1B, and claims 1-16, and new claims 21-24 in the reply filed on 06/01/2026 is acknowledged.
Claims 17-20 have been cancelled. New claims 21 – 24 have been included in the present examination.
Information Disclosure Statement
The information disclosure statement (IDS) submitted on 01/12/2024 is in compliance with the provisions of 37 CFR 1.97. Accordingly, the information disclosure statement is being considered by the examiner.
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claims 1-4, 6, 7, 9-16, and 21-24 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Chang et al. (US 20210358804).
Regarding claim 1, Chang discloses a method, comprising:
forming a nanostructured layer on a substrate Fig. 1: 12 (i.e. fins);
forming a gate structure surrounding the nanostructured layer Fig. 1: 12 (i.e. gate stack);
forming a source/drain (S/D) region adjacent to the nanostructured layer Fig. 1: 12 (shown in Fig. 2);
forming a contact opening on the S/D region Fig. 1: 14 (i.e. holes);
depositing a first conductive layer in the contact opening using a first deposition process Fig. 1: 18 (para. 0032 teaches a CVD process);
performing a plasma etch process on the first conductive layer Fig. 1: 20;
depositing a second conductive layer on the first conductive layer using a second deposition process different from the first deposition process Fig. 1: 22 (i.e. ALD process); and
depositing a metal layer on the second conductive layer Fig. 1: 24.
Regarding claim 2, Chang discloses the method of claim 1, wherein depositing the first conductive layer Fig. 5: 124 comprises depositing a conductive nitride layer using a chemical vapor deposition process (para. 0032 teaches Titanium nitride and a CVD process).
Regarding claim 3, Chang discloses the method of claim 1, wherein depositing the second conductive layer Fig. 6: 126 comprises depositing a conductive nitride layer using an atomic layer deposition process (para. 0040 teaches titanium nitride and an ALD process).
Regarding claim 4, Chang discloses the method of claim 1, wherein performing the plasma etch process Fig. 1: 20 comprises etching a native oxide layer from a surface of the first conductive layer Fig. 5: 124 (para. 0035 teaches removal oxide compounds from the conductive layer 124).
Regarding claim 6, Chang discloses the method of claim 1, wherein performing the plasma etch process Fig. 1: 20 comprises etching a native oxide layer from a surface of the first conductive layer Fig. 5: 124 using a gas mixture comprising a concentration ratio of hydrogen to nitrogen of about 4:1 to about 6:1 (para. 0034 teaches the N2 and H2 gas mixture, and para. 0035 teaches a flow rate ratio in a range of 0.22-0.28, which gives a ratio of hydrogen to nitrogen or about 4.5:1, which falls in the range limitation of claim 6).
Regarding claim 7, Chang discloses the method of claim 1, wherein performing the plasma etch process Fig. 1: 20 comprises etching a native oxide layer from a surface of the first conductive layer at a temperature of about 350 °C to about 450 °C (para. 0036 teaches temperatures in the range of 300-500 degrees Celsius which includes the range limitation of claim 7).
Regarding claim 9, Chang discloses the method of claim 1, wherein performing the plasma etch process Fig. 1: 20, depositing the second conductive layer Fig. 6: 126, and depositing the metal layer Fig. 7: 128 are performed in-situ (para. 0045 teaches an atomic ratio of the oxygen to metal nitride between layers 126 and 128 is measured to be about 0.15 to 1.0 which indicates an in-situ deposition).
Regarding claim 10, Chang discloses the method of claim 1, further comprising depositing an oxygen-free nitride layer Fig. 1: 16/Fig. 4: 122 in the contact opening Fig. 4: 120 prior to depositing the first conductive layer Fig. 5: 124 (para. 0031 teaches a silicide layer).
Regarding claim 11, Chang discloses a method, comprising:
forming a nanostructured layer on a substrate Fig. 1: 12;
forming a gate structure on the nanostructured layer Fig. 1: 12 (i.e. gate stack);
forming a source/drain (S/D) region adjacent to the gate structure Fig. 1: 12 (shown in Fig. 2); and
forming a contact structure Fig. 1: 14-24, comprising:
forming a contact opening on the S/D region Fig. 1: 14;
depositing a first nitride layer in the contact opening Fig. 1: 18 (para. 0032);
removing a native oxide layer from a surface of the first nitride layer Fig. 1: 20 (i.e. plasma cleaning process; para. 0034-0035);
depositing a second nitride layer on the first nitride layer Fig. 1: 22 (para. 0040); and
depositing a metal layer on the second nitride layer Fig. 1: 24 (para. 0041).
Regarding claim 12, Chang discloses the method of claim 11, wherein depositing the first nitride layer Fig. 5: 124 comprises depositing a titanium nitride layer a chemical vapor deposition process (para. 0032 teaches titanium nitride and a CVD process).
Regarding claim 13, Chang discloses the method of claim 11, wherein depositing the second nitride layer Fig. 6: 126 comprises depositing a titanium nitride using an atomic layer deposition process (para. 0040 teaches titanium nitride and an ALD process).
Regarding claim 14, Chang discloses the method of claim 11, wherein removing the native oxide layer comprises performing an etch process Fig. 1: 20 using a gas mixture comprising a concentration ratio of hydrogen to nitrogen of about 4:1 to about 6:1 (para. 0034 teaches the N2 and H2 gas mixture, and para. 0035 teaches a flow rate ratio in a range of 0.22-0.28, which gives a ratio of hydrogen to nitrogen or about 4.5:1, which falls in the range limitation of claim 6).
Regarding claim 15, Chang discloses the method of claim 11, wherein removing the native oxide layer comprises performing an etch process Fig. 1: 20 at a temperature of about 350 °C to about 450 °C (para. 0036 teaches temperatures in the range of 300-500 degrees Celsius which includes the range limitation of claim 7).
Regarding claim 16, Chang discloses the method of claim 11, wherein removing the native oxide layer Fig. 1: 20, depositing the second nitride layer Fig. 6: 126, and depositing the metal layer Fig. 7: 128 are performed in-situ (para. 0045 teaches an atomic ratio of the oxygen to metal nitride between layers 126 and 128 is measured to be about 0.15 to 1.0 as a result of the plasma cleaning process, which indicates an in-situ deposition).
Regarding claim 21, Chang discloses a method, comprising:
forming a nanostructured layer on a substrate Fig. 1: 12;
forming a source/drain (S/D) region adjacent to the nanostructured layer Fig. 1: 12;
forming a contact opening on the S/D region Fig. 1: 14;
depositing a first conductive nitride layer in the contact opening using a first deposition process Fig. 1: 18 (para. 0032);
depositing a second conductive nitride layer on the first conductive nitride layer using a second deposition process different from the first deposition process Fig. 1: 22 (para. 40);
depositing a first metal layer Fig. 7: 128 on the second conductive nitride layer Fig. 7: 126 using the first deposition process (para. 0041 teaches a CVD process deposition); and
depositing a second metal layer Fig. 7: 128 on the first metal layer Fig. 7: 128 using a third deposition process different from the first and second deposition processes (para. 0041 teaches multiple metal layers, where another process such as PVD, which is different from CVD/ALD can be used).
Regarding claim 22, Chang discloses the method of claim 21, wherein depositing the second metal layer Fig. 7: 128 comprises depositing a cobalt layer using an electroplating process (para. 0041).
Regarding claim 23, Chang discloses the method of claim 21, further comprising depositing an oxygen-free nitride layer Fig. 1: 16/Fig. 4: 122 in the contact opening Fig. 4: 120 prior to depositing the first conductive nitride layer Fig. 5: 124 (para. 0031 teaches a silicide layer).
Regarding claim 24, Chang discloses the method of claim 21, further comprising performing a plasma etch process Fig. 1: 20 on the first conductive nitride layer Fig. 5: 124 prior to depositing the second conductive nitride layer (para. 0035 teaches removal oxide compounds from the conductive layer 124).
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Rejection Note: Italicized claim limitations indicate limitations that are not explicitly disclosed in the primary reference(s).
Claim 5 is rejected under 35 U.S.C. 103 as being unpatentable over Chang et al. (US 20210358804) as applied to claim 1 above, and further in view of Cheng et al. (US 20190273147).
Regarding claim 5, Cheng discloses the following claim limitations not explicitly disclosed by Chang:
the method of claim 1, wherein performing the plasma etch process comprises etching a native oxide layer from a surface of the first conductive layer Fig. 11A: 219 (para. 0044) using hydrogen radicals (para. 0054-0055 teaches a plasma treatment using hydrogen radicals as a reducing agent to remove oxygen from the oxidized surface layer).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to modify Chang with Cheng’s teachings as it is well known in the art to use hydrogen radicals initiate a plasma and remove oxygen from an oxidized surface layer in a cleaning process (para. 0054).
Claim 8 is rejected under 35 U.S.C. 103 as being unpatentable over Chang et al. (US 20210358804) as applied to claim 1 above, and further in view of Kramer et al. (US 20170236954).
Regarding claim 8, Kramer discloses the following claim limitation not disclosed by Cheng:
the method of claim 1, wherein depositing the first conductive layer and depositing the second conductive layer (para. 0372, metal 1 and metal 2 layers) are performed ex-situ (para. 0374 teaches this ex-situ process).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to modify Chang with Kramer’s teachings in order to reduce the stringency of matching the thermal expansion coefficients between all the materials involved (para. 0374).
Conclusion
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/Nkechinyere Esiaba/Examiner, Art Unit 2817
/Kretelia Graham/Supervisory Patent Examiner, Art Unit 2817
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